--- ./callback/trampoline_r/cache-armel.c.orig	2009-04-27 10:44:13.000000000 -0600
+++ ./callback/trampoline_r/cache-armel.c	2013-09-04 14:40:00.000000000 -0600
@@ -15,5 +15,5 @@ void __TR_clear_cache (char *first_addr,
     register unsigned long _beg __asm ("a1") = first_addr;
     register unsigned long _end __asm ("a2") = last_addr;
     register unsigned long _flg __asm ("a3") = 0; 
-    __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
+    __asm __volatile__ ("swi 0x0f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
 }
--- ./callback/trampoline_r/cache-armel.s.orig	2009-04-27 10:44:13.000000000 -0600
+++ ./callback/trampoline_r/cache-armel.s	2013-09-04 14:40:00.000000000 -0600
@@ -12,7 +12,7 @@ __TR_clear_cache:
 	@ lr needed for prologue
 	mov	r2, #0
 #APP
-	swi 0x9f0002
+	swi 0x0f0002
 	bx	lr
 	.size	__TR_clear_cache, .-__TR_clear_cache
 	.ident	"GCC: (GNU) 3.4.4 (release) (CodeSourcery ARM 2005q3-2)"
--- ./trampoline/cache-armel.c.orig	2009-04-27 10:44:14.000000000 -0600
+++ ./trampoline/cache-armel.c	2013-09-04 14:40:00.000000000 -0600
@@ -15,5 +15,5 @@ void __TR_clear_cache (char *first_addr,
     register unsigned long _beg __asm ("a1") = first_addr;
     register unsigned long _end __asm ("a2") = last_addr;
     register unsigned long _flg __asm ("a3") = 0; 
-    __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
+    __asm __volatile__ ("swi 0x0f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
 }
--- ./trampoline/cache-armel.s.orig	2009-04-27 10:44:14.000000000 -0600
+++ ./trampoline/cache-armel.s	2013-09-04 14:40:00.000000000 -0600
@@ -17,7 +17,7 @@ __TR_clear_cache:
 	ldr	r1, [sp, #0]
 	mov	r2, #0
 #APP
-	swi 0x9f0002
+	swi 0x0f0002
 	add	sp, sp, #8
 	bx	lr
 	.size	__TR_clear_cache, .-__TR_clear_cache