Blob Blame History Raw
diff -Naur documentation/tutorials/synthesis/src/amd2901/Makefile tutorials/synthesis/src/amd2901/Makefile
--- documentation/tutorials/synthesis/src/amd2901/Makefile	2002-07-25 14:50:18.000000000 +0200
+++ tutorials/synthesis/src/amd2901/Makefile	2007-07-18 19:34:53.000000000 +0200
@@ -2,17 +2,17 @@
 all: EXAMPLE VAR  CATAL02 res.pat
 
 
-VAR: 
+VAR:
 	MBK_IN_LO=vst;export MBK_IN_LO ;\
-	MBK_CATA_LIB=/asim/alliance/cells/sxlib;export MBK_CATA_LIB
+	MBK_CATA_LIB=$ALLIANCE_TOP/cells/sxlib;export MBK_CATA_LIB
 
 CATAL01:
-	echo amd2901_ctl C >CATAL  
+	echo amd2901_ctl C >CATAL
 	echo amd2901_dpt C >>CATAL
 
 CATAL02:
 	echo amd2901_dpt C >CATAL
-	
+
 EXAMPLE:
 	genlib circuit
 
@@ -38,7 +38,7 @@
 
 res2.pat: amd2901_chip.vst pattern.pat amd2901_core.vst CATAL
 	asimut amd2901_chip pattern res2
-	touch amd2901_chip.vst 
+	touch amd2901_chip.vst
 
 clean :
 	rm -f Makefile-*                 \