diff --git a/radeon-6.12.0-git-fixes.patch b/radeon-6.12.0-git-fixes.patch new file mode 100644 index 0000000..8b3f0f9 --- /dev/null +++ b/radeon-6.12.0-git-fixes.patch @@ -0,0 +1,514 @@ +diff --git a/src/atombios_output.c b/src/atombios_output.c +index 130ab93..70e716c 100644 +--- a/src/atombios_output.c ++++ b/src/atombios_output.c +@@ -1019,30 +1019,11 @@ static void atom_rv515_force_tv_scaler(ScrnInfoPtr pScrn) + static int + atombios_output_yuv_setup(xf86OutputPtr output, Bool enable) + { +- RADEONOutputPrivatePtr radeon_output = output->driver_private; + RADEONInfoPtr info = RADEONPTR(output->scrn); + RADEONCrtcPrivatePtr radeon_crtc = output->crtc->driver_private; + ENABLE_YUV_PS_ALLOCATION disp_data; + AtomBiosArgRec data; + unsigned char *space; +- unsigned char *RADEONMMIO = info->MMIO; +- uint32_t temp, reg; +- +- if (info->ChipFamily >= CHIP_FAMILY_R600) +- reg = R600_BIOS_3_SCRATCH; +- else +- reg = RADEON_BIOS_3_SCRATCH; +- +- //fix up scratch reg handling +- temp = INREG(reg); +- if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT)) +- OUTREG(reg, (ATOM_S3_TV1_ACTIVE | +- (radeon_crtc->crtc_id << 18))); +- else if (radeon_output->active_device & (ATOM_DEVICE_CV_SUPPORT)) +- OUTREG(reg, (ATOM_S3_CV_ACTIVE | +- (radeon_crtc->crtc_id << 24))); +- else +- OUTREG(reg, 0); + + memset(&disp_data, 0, sizeof(disp_data)); + +@@ -1055,15 +1036,10 @@ atombios_output_yuv_setup(xf86OutputPtr output, Bool enable) + data.exec.pspace = &disp_data; + + if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) { +- +- OUTREG(reg, temp); +- + ErrorF("crtc %d YUV %s setup success\n", radeon_crtc->crtc_id, enable ? "enable" : "disable"); + return ATOM_SUCCESS; + } + +- OUTREG(reg, temp); +- + ErrorF("crtc %d YUV %s setup failed\n", radeon_crtc->crtc_id, enable ? "enable" : "disable"); + return ATOM_NOT_IMPLEMENTED; + +diff --git a/src/radeon_accel.c b/src/radeon_accel.c +index dffbc57..a9a4848 100644 +--- a/src/radeon_accel.c ++++ b/src/radeon_accel.c +@@ -688,8 +688,6 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard) + drmBufPtr buffer = info->cp->indirectBuffer; + int start = info->cp->indirectStart; + drm_radeon_indirect_t indirect; +- RING_LOCALS; +- RADEONCP_REFRESH(pScrn, info); + + if (!buffer) return; + if (start == buffer->used && !discard) return; +@@ -700,10 +698,14 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard) + } + + if (info->ChipFamily >= CHIP_FAMILY_R600) { +- while (buffer->used & 0x3c){ +- BEGIN_RING(1); +- OUT_RING(CP_PACKET2()); /* fill up to multiple of 16 dwords */ +- ADVANCE_RING(); ++ if (buffer->used & 0x3c) { ++ RING_LOCALS; ++ ++ while (buffer->used & 0x3c) { ++ BEGIN_RING(1); ++ OUT_RING(CP_PACKET2()); /* fill up to multiple of 16 dwords */ ++ ADVANCE_RING(); ++ } + } + } + +@@ -735,12 +737,11 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn) + drmBufPtr buffer = info->cp->indirectBuffer; + int start = info->cp->indirectStart; + drm_radeon_indirect_t indirect; +- RING_LOCALS; +- RADEONCP_REFRESH(pScrn, info); +- + + if (info->ChipFamily >= CHIP_FAMILY_R600) { +- if (buffer) { ++ if (buffer && (buffer->used & 0x3c)) { ++ RING_LOCALS; ++ + while (buffer->used & 0x3c) { + BEGIN_RING(1); + OUT_RING(CP_PACKET2()); /* fill up to multiple of 16 dwords */ +diff --git a/src/radeon_output.c b/src/radeon_output.c +index aab88fb..3931db4 100644 +--- a/src/radeon_output.c ++++ b/src/radeon_output.c +@@ -631,93 +631,60 @@ radeon_bios_output_dpms(xf86OutputPtr output, int mode) + + if (info->IsAtomBios) { + if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_TV1_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_CV_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_CV_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP4_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP5_SUPPORT) { +- if (mode == DPMSModeOn) { ++ if (mode == DPMSModeOn) + save->bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE; +- save->bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; +- } else { ++ else + save->bios_2_scratch |= ATOM_S2_DFP5_DPMS_STATE; +- save->bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; +- } + } +- if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ if (info->ChipFamily >= CHIP_FAMILY_R600) + OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch); +- OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); +- } else { ++ else + OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch); +- OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); +- } + } else { + if (mode == DPMSModeOn) { + save->bios_6_scratch &= ~(RADEON_DPMS_MASK | RADEON_SCREEN_BLANKING); +@@ -727,55 +694,36 @@ radeon_bios_output_dpms(xf86OutputPtr output, int mode) + save->bios_6_scratch |= (RADEON_DPMS_OFF | RADEON_SCREEN_BLANKING); + } + if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { +- if (mode == DPMSModeOn) { +- save->bios_5_scratch |= RADEON_TV1_ON; ++ if (mode == DPMSModeOn) + save->bios_6_scratch |= RADEON_TV_DPMS_ON; +- } else { +- save->bios_5_scratch &= ~RADEON_TV1_ON; ++ else + save->bios_6_scratch &= ~RADEON_TV_DPMS_ON; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { +- if (mode == DPMSModeOn) { +- save->bios_5_scratch |= RADEON_CRT1_ON; ++ if (mode == DPMSModeOn) + save->bios_6_scratch |= RADEON_CRT_DPMS_ON; +- } else { +- save->bios_5_scratch &= ~RADEON_CRT1_ON; ++ else + save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { +- if (mode == DPMSModeOn) { +- save->bios_5_scratch |= RADEON_CRT2_ON; ++ if (mode == DPMSModeOn) + save->bios_6_scratch |= RADEON_CRT_DPMS_ON; +- } else { +- save->bios_5_scratch &= ~RADEON_CRT2_ON; ++ else + save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { +- if (mode == DPMSModeOn) { +- save->bios_5_scratch |= RADEON_LCD1_ON; ++ if (mode == DPMSModeOn) + save->bios_6_scratch |= RADEON_LCD_DPMS_ON; +- } else { +- save->bios_5_scratch &= ~RADEON_LCD1_ON; ++ else + save->bios_6_scratch &= ~RADEON_LCD_DPMS_ON; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { +- if (mode == DPMSModeOn) { +- save->bios_5_scratch |= RADEON_DFP1_ON; ++ if (mode == DPMSModeOn) + save->bios_6_scratch |= RADEON_DFP_DPMS_ON; +- } else { +- save->bios_5_scratch &= ~RADEON_DFP1_ON; ++ else + save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; +- } + } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { +- if (mode == DPMSModeOn) { +- save->bios_5_scratch |= RADEON_DFP2_ON; ++ if (mode == DPMSModeOn) + save->bios_6_scratch |= RADEON_DFP_DPMS_ON; +- } else { +- save->bios_5_scratch &= ~RADEON_DFP2_ON; ++ else + save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; +- } + } +- OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); + OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); + } + } +@@ -796,25 +744,25 @@ radeon_bios_output_crtc(xf86OutputPtr output) + save->bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 18); + } else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 24); + } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 16); + } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 20); + } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 17); + } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 19); + } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 23); + } else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) { +- save->bios_2_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE; ++ save->bios_3_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE; + save->bios_3_scratch |= (radeon_crtc->crtc_id << 25); + } + if (info->ChipFamily >= CHIP_FAMILY_R600) +@@ -857,66 +805,101 @@ radeon_bios_output_connected(xf86OutputPtr output, Bool connected) + if (info->IsAtomBios) { + switch (radeon_output->active_device) { + case ATOM_DEVICE_TV1_SUPPORT: +- if (!connected) ++ if (connected) ++ save->bios_3_scratch |= ATOM_S3_TV1_ACTIVE; ++ else { + save->bios_0_scratch &= ~ATOM_S0_TV1_MASK; ++ save->bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; ++ } + break; + case ATOM_DEVICE_CV_SUPPORT: +- if (!connected) ++ if (connected) ++ save->bios_3_scratch |= ATOM_S3_CV_ACTIVE; ++ else { + save->bios_0_scratch &= ~ATOM_S0_CV_MASK; ++ save->bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; ++ } + break; + case ATOM_DEVICE_LCD1_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_LCD1; +- else ++ save->bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_LCD1; ++ save->bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; ++ } + break; + case ATOM_DEVICE_CRT1_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_CRT1_COLOR; +- else ++ save->bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_CRT1_MASK; ++ save->bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; ++ } + break; + case ATOM_DEVICE_CRT2_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_CRT2_COLOR; +- else ++ save->bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_CRT2_MASK; ++ save->bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; ++ } + break; + case ATOM_DEVICE_DFP1_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_DFP1; +- else ++ save->bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_DFP1; ++ save->bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; ++ } + break; + case ATOM_DEVICE_DFP2_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_DFP2; +- else ++ save->bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_DFP2; ++ save->bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; ++ } + break; + case ATOM_DEVICE_DFP3_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_DFP3; +- else ++ save->bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_DFP3; ++ save->bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; ++ } + break; + case ATOM_DEVICE_DFP4_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_DFP4; +- else ++ save->bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_DFP4; ++ save->bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; ++ } + break; + case ATOM_DEVICE_DFP5_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_0_scratch |= ATOM_S0_DFP5; +- else ++ save->bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; ++ } else { + save->bios_0_scratch &= ~ATOM_S0_DFP5; ++ save->bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; ++ } + break; + } +- if (info->ChipFamily >= CHIP_FAMILY_R600) ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { + OUTREG(R600_BIOS_0_SCRATCH, save->bios_0_scratch); +- else ++ OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); ++ } else { + OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch); ++ OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); ++ } + } else { + switch (radeon_output->active_device) { + case ATOM_DEVICE_TV1_SUPPORT: +@@ -925,41 +908,60 @@ radeon_bios_output_connected(xf86OutputPtr output, Bool connected) + save->bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; + else if (radeon_output->MonType == MT_CTV) + save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; +- } else ++ save->bios_5_scratch |= RADEON_TV1_ON; ++ } else { + save->bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; ++ save->bios_5_scratch &= ~RADEON_TV1_ON; ++ } + break; + case ATOM_DEVICE_LCD1_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_4_scratch |= RADEON_LCD1_ATTACHED; +- else ++ save->bios_5_scratch |= RADEON_LCD1_ON; ++ } else { + save->bios_4_scratch &= ~RADEON_LCD1_ATTACHED; ++ save->bios_5_scratch &= ~RADEON_LCD1_ON; ++ } + break; + case ATOM_DEVICE_CRT1_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; +- else ++ save->bios_5_scratch |= RADEON_CRT1_ON; ++ } else { + save->bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; ++ save->bios_5_scratch &= ~RADEON_CRT1_ON; ++ } + break; + case ATOM_DEVICE_CRT2_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; +- else ++ save->bios_5_scratch |= RADEON_CRT2_ON; ++ } else { + save->bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; ++ save->bios_5_scratch &= ~RADEON_CRT2_ON; ++ } + break; + case ATOM_DEVICE_DFP1_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_4_scratch |= RADEON_DFP1_ATTACHED; +- else ++ save->bios_5_scratch |= RADEON_DFP1_ON; ++ } else { + save->bios_4_scratch &= ~RADEON_DFP1_ATTACHED; ++ save->bios_5_scratch &= ~RADEON_DFP1_ON; ++ } + break; + case ATOM_DEVICE_DFP2_SUPPORT: +- if (connected) ++ if (connected) { + save->bios_4_scratch |= RADEON_DFP2_ATTACHED; +- else ++ save->bios_5_scratch |= RADEON_DFP2_ON; ++ } else { + save->bios_4_scratch &= ~RADEON_DFP2_ATTACHED; ++ save->bios_5_scratch &= ~RADEON_DFP2_ON; ++ } + break; + } + OUTREG(RADEON_BIOS_4_SCRATCH, save->bios_4_scratch); ++ OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); + } + + } diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index 1a6580f..8f338b6 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.12.0 -Release: 1%{?dist} +Release: 2%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -14,6 +14,7 @@ BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n) Source0: http://www.x.org/pub/individual/driver/%{tarball}-%{version}.tar.bz2 Source1: radeon.xinf +Patch0: radeon-6.12.0-git-fixes.patch Patch1: radeon-modeset.patch #Patch4: radeon-6.9.0-remove-limit-heuristics.patch Patch5: radeon-6.9.0-panel-size-sanity.patch @@ -39,6 +40,7 @@ X.Org X11 ati video driver. %prep %setup -q -n %{tarball}-%{version} +%patch0 -p1 -b .fixes %patch1 -p1 -b .modeset #patch4 -p1 -b .remove-limit-heuristics #%patch5 -p1 -b .panel-size @@ -74,6 +76,9 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Mon Mar 16 2009 Dave Airlie 6.12.0-2 +- radeon-6.12.0-git-fixes: fixes from git upstream + * Sat Mar 14 2009 Dave Airlie 6.12.0-1 - rebase to latest -ati upstream release