diff --git a/acpica-tools.spec b/acpica-tools.spec
index f13be71..6e77d55 100644
--- a/acpica-tools.spec
+++ b/acpica-tools.spec
@@ -96,7 +96,9 @@ gzip -dc %{SOURCE1} | tar -x --strip-components=1 -f -
 %patch2 -p1 -b .OPT_LDFLAGS
 %patch3 -p1 -b .int-format
 %patch4 -p1 -b .f23-harden
-%patch5 -p1 -b .template
+# do not preserve a backup for this patch; it alters the results
+# of the template test case and forces it to fail
+%patch5 -p1
 %patch6 -p1 -b .ppc64le
 %patch7 -p1 -b .arm7hl
 %patch8 -p1 -b .big-endian-v2
@@ -238,7 +240,10 @@ fi
 
 %changelog
 * Mon May 13 2019 Al Stone <ahs3@redhat.com> - 20190509-2
-- Added an arm7hl specific fix to the gcc9 corrections.
+- Added an arm7hl specific fix acenv.h; GCC9 on arm7hl can now deal
+  with misalignments so the unaligned patch could be relaxed a bit
+- the templates test was failing because of the backup left behind
+  by the patch macro, so change the invocation of the macro.
 
 * Sat May 11 2019 Al Stone <ahs3@redhat.com> - 20190509-1
 - Update to 20190509 source tree, including patch refeshes.
diff --git a/gcc9.patch b/gcc9.patch
index 8d6904f..cd190a6 100644
--- a/gcc9.patch
+++ b/gcc9.patch
@@ -63,17 +63,3 @@ diff -Naur acpica-unix2-20190108/source/compiler/aslcodegen.c acpica-unix2-20190
  
      /* OEM Revision */
  
-diff -Naur acpica-unix2-20190509.orig/source/include/platform/aclinux.h acpica-unix2-20190509/source/include/platform/aclinux.h
---- acpica-unix2-20190509.orig/source/include/platform/aclinux.h	2019-05-13 10:15:12.878784098 -0600
-+++ acpica-unix2-20190509/source/include/platform/aclinux.h	2019-05-13 10:33:52.505004418 -0600
-@@ -231,6 +231,10 @@
- #define __cdecl
- #endif
- 
-+#ifdef __ARM_ARCH_7__
-+#undef ACPI_MISALIGNMENT_NOT_SUPPORTED
-+#endif
-+
- #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
- #define ACPI_BIG_ENDIAN
- #endif
diff --git a/unaligned.patch b/unaligned.patch
index 43e4bb6..9a729d3 100644
--- a/unaligned.patch
+++ b/unaligned.patch
@@ -75,7 +75,7 @@ Index: acpica-unix2-20170728/source/include/actypes.h
 + * Note: EM64T and other X86-64 processors support misaligned transfers,
 + * so there is no need to define this flag.
 + */
-+#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) || defined(__arm__)
++#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) 
 +#define ACPI_MISALIGNMENT_NOT_SUPPORTED
 +#endif
 +