mvadkert / rpms / qemu

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From 56018228deac6e704a7ec8befd9e9dc69f2fe73f Mon Sep 17 00:00:00 2001
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From: Blue Swirl <blauwirbel@gmail.com>
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Date: Sun, 2 Sep 2012 07:33:35 +0000
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Subject: [PATCH] target-s390x: rename op_helper.c to misc_helper.c
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Now op_helper.c contains miscellaneous helpers, rename
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it to misc_helper.c.
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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[agraf: fix conflict]
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Signed-off-by: Alexander Graf <agraf@suse.de>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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 target-s390x/Makefile.objs |   6 +-
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 target-s390x/cpu.h         |   2 +-
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 target-s390x/misc_helper.c | 428 +++++++++++++++++++++++++++++++++++++++++++++
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 target-s390x/op_helper.c   | 428 ---------------------------------------------
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 4 files changed, 432 insertions(+), 432 deletions(-)
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 create mode 100644 target-s390x/misc_helper.c
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 delete mode 100644 target-s390x/op_helper.c
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diff --git a/target-s390x/Makefile.objs b/target-s390x/Makefile.objs
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index b9b3061..a87d26f 100644
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--- a/target-s390x/Makefile.objs
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+++ b/target-s390x/Makefile.objs
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@@ -1,10 +1,10 @@
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-obj-y += translate.o op_helper.o helper.o cpu.o interrupt.o
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-obj-y += int_helper.o fpu_helper.o cc_helper.o mem_helper.o
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+obj-y += translate.o helper.o cpu.o interrupt.o
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+obj-y += int_helper.o fpu_helper.o cc_helper.o mem_helper.o misc_helper.o
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 obj-$(CONFIG_SOFTMMU) += machine.o
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 obj-$(CONFIG_KVM) += kvm.o
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-$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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 $(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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 $(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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 $(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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 $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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+$(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
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diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
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index 97fde5e..0ccb551 100644
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--- a/target-s390x/cpu.h
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+++ b/target-s390x/cpu.h
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@@ -1005,7 +1005,7 @@ uint32_t set_cc_f64(float64 v1, float64 v2);
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 uint32_t set_cc_nz_f32(float32 v);
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 uint32_t set_cc_nz_f64(float64 v);
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-/* op_helper.c */
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+/* misc_helper.c */
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 void program_interrupt(CPUS390XState *env, uint32_t code, int ilc);
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 #endif
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diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
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new file mode 100644
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index 0000000..1d5137f
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--- /dev/null
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+++ b/target-s390x/misc_helper.c
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@@ -0,0 +1,428 @@
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+/*
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+ *  S/390 misc helper routines
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+ *
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+ *  Copyright (c) 2009 Ulrich Hecht
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+ *  Copyright (c) 2009 Alexander Graf
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+ *
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+ * This library is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU Lesser General Public
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+ * License as published by the Free Software Foundation; either
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+ * version 2 of the License, or (at your option) any later version.
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+ *
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+ * This library is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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+ * Lesser General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU Lesser General Public
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+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include "cpu.h"
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+#include "memory.h"
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+#include "cputlb.h"
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+#include "dyngen-exec.h"
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+#include "host-utils.h"
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+#include "helper.h"
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+#include <string.h>
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+#include "kvm.h"
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+#include "qemu-timer.h"
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+#ifdef CONFIG_KVM
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+#include <linux/kvm.h>
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+#endif
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+
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+#if !defined(CONFIG_USER_ONLY)
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+#include "softmmu_exec.h"
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+#include "sysemu.h"
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+#endif
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+
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+/* #define DEBUG_HELPER */
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+#ifdef DEBUG_HELPER
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+#define HELPER_LOG(x...) qemu_log(x)
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+#else
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+#define HELPER_LOG(x...)
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+#endif
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+
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+/* raise an exception */
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+void HELPER(exception)(uint32_t excp)
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+{
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+    HELPER_LOG("%s: exception %d\n", __func__, excp);
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+    env->exception_index = excp;
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+    cpu_loop_exit(env);
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+}
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+
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+#ifndef CONFIG_USER_ONLY
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+void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
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+{
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+    qemu_log("program interrupt at %#" PRIx64 "\n", env->psw.addr);
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+
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+    if (kvm_enabled()) {
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+#ifdef CONFIG_KVM
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+        kvm_s390_interrupt(env, KVM_S390_PROGRAM_INT, code);
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+#endif
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+    } else {
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+        env->int_pgm_code = code;
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+        env->int_pgm_ilc = ilc;
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+        env->exception_index = EXCP_PGM;
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+        cpu_loop_exit(env);
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+    }
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+}
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+
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+/*
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+ * ret < 0 indicates program check, ret = 0, 1, 2, 3 -> cc
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+ */
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+int sclp_service_call(CPUS390XState *env, uint32_t sccb, uint64_t code)
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+{
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+    int r = 0;
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+    int shift = 0;
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+
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+#ifdef DEBUG_HELPER
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+    printf("sclp(0x%x, 0x%" PRIx64 ")\n", sccb, code);
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+#endif
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+
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+    /* basic checks */
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+    if (!memory_region_is_ram(phys_page_find(sccb >> TARGET_PAGE_BITS)->mr)) {
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+        return -PGM_ADDRESSING;
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+    }
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+    if (sccb & ~0x7ffffff8ul) {
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+        return -PGM_SPECIFICATION;
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+    }
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+
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+    switch (code) {
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+    case SCLP_CMDW_READ_SCP_INFO:
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+    case SCLP_CMDW_READ_SCP_INFO_FORCED:
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+        while ((ram_size >> (20 + shift)) > 65535) {
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+            shift++;
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+        }
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+        stw_phys(sccb + SCP_MEM_CODE, ram_size >> (20 + shift));
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+        stb_phys(sccb + SCP_INCREMENT, 1 << shift);
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+        stw_phys(sccb + SCP_RESPONSE_CODE, 0x10);
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+
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+        s390_sclp_extint(sccb & ~3);
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+        break;
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+    default:
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+#ifdef DEBUG_HELPER
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+        printf("KVM: invalid sclp call 0x%x / 0x%" PRIx64 "x\n", sccb, code);
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+#endif
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+        r = 3;
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+        break;
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+    }
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+
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+    return r;
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+}
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+
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+/* SCLP service call */
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+uint32_t HELPER(servc)(uint32_t r1, uint64_t r2)
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+{
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+    int r;
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+
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+    r = sclp_service_call(env, r1, r2);
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+    if (r < 0) {
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+        program_interrupt(env, -r, 4);
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+        return 0;
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+    }
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+    return r;
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+}
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+
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+/* DIAG */
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+uint64_t HELPER(diag)(uint32_t num, uint64_t mem, uint64_t code)
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+{
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+    uint64_t r;
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+
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+    switch (num) {
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+    case 0x500:
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+        /* KVM hypercall */
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+        r = s390_virtio_hypercall(env, mem, code);
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+        break;
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+    case 0x44:
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+        /* yield */
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+        r = 0;
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+        break;
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+    case 0x308:
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+        /* ipl */
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+        r = 0;
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+        break;
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+    default:
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+        r = -1;
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+        break;
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+    }
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+
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+    if (r) {
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+        program_interrupt(env, PGM_OPERATION, ILC_LATER_INC);
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+    }
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+
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+    return r;
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+}
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+
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+/* Store CPU ID */
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+void HELPER(stidp)(uint64_t a1)
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+{
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+    stq(a1, env->cpu_num);
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+}
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+
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+/* Set Prefix */
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+void HELPER(spx)(uint64_t a1)
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+{
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+    uint32_t prefix;
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+
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+    prefix = ldl(a1);
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+    env->psa = prefix & 0xfffff000;
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+    qemu_log("prefix: %#x\n", prefix);
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+    tlb_flush_page(env, 0);
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+    tlb_flush_page(env, TARGET_PAGE_SIZE);
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+}
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+
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+/* Set Clock */
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+uint32_t HELPER(sck)(uint64_t a1)
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+{
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+    /* XXX not implemented - is it necessary? */
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+
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+    return 0;
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+}
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+
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+static inline uint64_t clock_value(CPUS390XState *env)
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+{
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+    uint64_t time;
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+
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+    time = env->tod_offset +
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+        time2tod(qemu_get_clock_ns(vm_clock) - env->tod_basetime);
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+
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+    return time;
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+}
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+
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+/* Store Clock */
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+uint32_t HELPER(stck)(uint64_t a1)
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+{
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+    stq(a1, clock_value(env));
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+
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+    return 0;
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+}
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+
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+/* Store Clock Extended */
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+uint32_t HELPER(stcke)(uint64_t a1)
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+{
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+    stb(a1, 0);
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+    /* basically the same value as stck */
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+    stq(a1 + 1, clock_value(env) | env->cpu_num);
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+    /* more fine grained than stck */
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+    stq(a1 + 9, 0);
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+    /* XXX programmable fields */
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+    stw(a1 + 17, 0);
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+
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+    return 0;
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+}
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+
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+/* Set Clock Comparator */
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+void HELPER(sckc)(uint64_t a1)
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+{
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+    uint64_t time = ldq(a1);
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+
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+    if (time == -1ULL) {
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+        return;
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+    }
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+
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+    /* difference between now and then */
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+    time -= clock_value(env);
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+    /* nanoseconds */
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+    time = (time * 125) >> 9;
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+
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+    qemu_mod_timer(env->tod_timer, qemu_get_clock_ns(vm_clock) + time);
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+}
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+
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+/* Store Clock Comparator */
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+void HELPER(stckc)(uint64_t a1)
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+{
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+    /* XXX implement */
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+    stq(a1, 0);
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+}
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+
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+/* Set CPU Timer */
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+void HELPER(spt)(uint64_t a1)
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+{
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+    uint64_t time = ldq(a1);
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+
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+    if (time == -1ULL) {
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+        return;
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+    }
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+
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+    /* nanoseconds */
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+    time = (time * 125) >> 9;
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+
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+    qemu_mod_timer(env->cpu_timer, qemu_get_clock_ns(vm_clock) + time);
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+}
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+
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+/* Store CPU Timer */
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+void HELPER(stpt)(uint64_t a1)
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+{
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+    /* XXX implement */
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+    stq(a1, 0);
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+}
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+
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+/* Store System Information */
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+uint32_t HELPER(stsi)(uint64_t a0, uint32_t r0, uint32_t r1)
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+{
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+    int cc = 0;
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+    int sel1, sel2;
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+
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+    if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
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+        ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
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+        /* valid function code, invalid reserved bits */
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+        program_interrupt(env, PGM_SPECIFICATION, 2);
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+    }
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+
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+    sel1 = r0 & STSI_R0_SEL1_MASK;
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+    sel2 = r1 & STSI_R1_SEL2_MASK;
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+
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+    /* XXX: spec exception if sysib is not 4k-aligned */
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+
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+    switch (r0 & STSI_LEVEL_MASK) {
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+    case STSI_LEVEL_1:
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+        if ((sel1 == 1) && (sel2 == 1)) {
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+            /* Basic Machine Configuration */
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+            struct sysib_111 sysib;
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+
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+            memset(&sysib, 0, sizeof(sysib));
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+            ebcdic_put(sysib.manuf, "QEMU            ", 16);
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+            /* same as machine type number in STORE CPU ID */
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+            ebcdic_put(sysib.type, "QEMU", 4);
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+            /* same as model number in STORE CPU ID */
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+            ebcdic_put(sysib.model, "QEMU            ", 16);
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+            ebcdic_put(sysib.sequence, "QEMU            ", 16);
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+            ebcdic_put(sysib.plant, "QEMU", 4);
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+            cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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+        } else if ((sel1 == 2) && (sel2 == 1)) {
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+            /* Basic Machine CPU */
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+            struct sysib_121 sysib;
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+
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+            memset(&sysib, 0, sizeof(sysib));
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+            /* XXX make different for different CPUs? */
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+            ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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+            ebcdic_put(sysib.plant, "QEMU", 4);
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+            stw_p(&sysib.cpu_addr, env->cpu_num);
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+            cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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+        } else if ((sel1 == 2) && (sel2 == 2)) {
5544c1b
+            /* Basic Machine CPUs */
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+            struct sysib_122 sysib;
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+
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+            memset(&sysib, 0, sizeof(sysib));
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+            stl_p(&sysib.capability, 0x443afc29);
5544c1b
+            /* XXX change when SMP comes */
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+            stw_p(&sysib.total_cpus, 1);
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+            stw_p(&sysib.active_cpus, 1);
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+            stw_p(&sysib.standby_cpus, 0);
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+            stw_p(&sysib.reserved_cpus, 0);
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+            cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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+        } else {
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+            cc = 3;
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+        }
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+        break;
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+    case STSI_LEVEL_2:
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+        {
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+            if ((sel1 == 2) && (sel2 == 1)) {
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+                /* LPAR CPU */
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+                struct sysib_221 sysib;
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+
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+                memset(&sysib, 0, sizeof(sysib));
5544c1b
+                /* XXX make different for different CPUs? */
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+                ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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+                ebcdic_put(sysib.plant, "QEMU", 4);
5544c1b
+                stw_p(&sysib.cpu_addr, env->cpu_num);
5544c1b
+                stw_p(&sysib.cpu_id, 0);
5544c1b
+                cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
+            } else if ((sel1 == 2) && (sel2 == 2)) {
5544c1b
+                /* LPAR CPUs */
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+                struct sysib_222 sysib;
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+
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+                memset(&sysib, 0, sizeof(sysib));
5544c1b
+                stw_p(&sysib.lpar_num, 0);
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+                sysib.lcpuc = 0;
5544c1b
+                /* XXX change when SMP comes */
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+                stw_p(&sysib.total_cpus, 1);
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+                stw_p(&sysib.conf_cpus, 1);
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+                stw_p(&sysib.standby_cpus, 0);
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+                stw_p(&sysib.reserved_cpus, 0);
5544c1b
+                ebcdic_put(sysib.name, "QEMU    ", 8);
5544c1b
+                stl_p(&sysib.caf, 1000);
5544c1b
+                stw_p(&sysib.dedicated_cpus, 0);
5544c1b
+                stw_p(&sysib.shared_cpus, 0);
5544c1b
+                cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
+            } else {
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+                cc = 3;
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+            }
5544c1b
+            break;
5544c1b
+        }
5544c1b
+    case STSI_LEVEL_3:
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+        {
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+            if ((sel1 == 2) && (sel2 == 2)) {
5544c1b
+                /* VM CPUs */
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+                struct sysib_322 sysib;
5544c1b
+
5544c1b
+                memset(&sysib, 0, sizeof(sysib));
5544c1b
+                sysib.count = 1;
5544c1b
+                /* XXX change when SMP comes */
5544c1b
+                stw_p(&sysib.vm[0].total_cpus, 1);
5544c1b
+                stw_p(&sysib.vm[0].conf_cpus, 1);
5544c1b
+                stw_p(&sysib.vm[0].standby_cpus, 0);
5544c1b
+                stw_p(&sysib.vm[0].reserved_cpus, 0);
5544c1b
+                ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
5544c1b
+                stl_p(&sysib.vm[0].caf, 1000);
5544c1b
+                ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
5544c1b
+                cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
+            } else {
5544c1b
+                cc = 3;
5544c1b
+            }
5544c1b
+            break;
5544c1b
+        }
5544c1b
+    case STSI_LEVEL_CURRENT:
5544c1b
+        env->regs[0] = STSI_LEVEL_3;
5544c1b
+        break;
5544c1b
+    default:
5544c1b
+        cc = 3;
5544c1b
+        break;
5544c1b
+    }
5544c1b
+
5544c1b
+    return cc;
5544c1b
+}
5544c1b
+
5544c1b
+uint32_t HELPER(sigp)(uint64_t order_code, uint32_t r1, uint64_t cpu_addr)
5544c1b
+{
5544c1b
+    int cc = 0;
5544c1b
+
5544c1b
+    HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
5544c1b
+               __func__, order_code, r1, cpu_addr);
5544c1b
+
5544c1b
+    /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
5544c1b
+       as parameter (input). Status (output) is always R1. */
5544c1b
+
5544c1b
+    switch (order_code) {
5544c1b
+    case SIGP_SET_ARCH:
5544c1b
+        /* switch arch */
5544c1b
+        break;
5544c1b
+    case SIGP_SENSE:
5544c1b
+        /* enumerate CPU status */
5544c1b
+        if (cpu_addr) {
5544c1b
+            /* XXX implement when SMP comes */
5544c1b
+            return 3;
5544c1b
+        }
5544c1b
+        env->regs[r1] &= 0xffffffff00000000ULL;
5544c1b
+        cc = 1;
5544c1b
+        break;
5544c1b
+#if !defined(CONFIG_USER_ONLY)
5544c1b
+    case SIGP_RESTART:
5544c1b
+        qemu_system_reset_request();
5544c1b
+        cpu_loop_exit(env);
5544c1b
+        break;
5544c1b
+    case SIGP_STOP:
5544c1b
+        qemu_system_shutdown_request();
5544c1b
+        cpu_loop_exit(env);
5544c1b
+        break;
5544c1b
+#endif
5544c1b
+    default:
5544c1b
+        /* unknown sigp */
5544c1b
+        fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
5544c1b
+        cc = 3;
5544c1b
+    }
5544c1b
+
5544c1b
+    return cc;
5544c1b
+}
5544c1b
+#endif
5544c1b
diff --git a/target-s390x/op_helper.c b/target-s390x/op_helper.c
5544c1b
deleted file mode 100644
5544c1b
index bb8dbf5..0000000
5544c1b
--- a/target-s390x/op_helper.c
5544c1b
+++ /dev/null
5544c1b
@@ -1,428 +0,0 @@
5544c1b
-/*
5544c1b
- *  S/390 helper routines
5544c1b
- *
5544c1b
- *  Copyright (c) 2009 Ulrich Hecht
5544c1b
- *  Copyright (c) 2009 Alexander Graf
5544c1b
- *
5544c1b
- * This library is free software; you can redistribute it and/or
5544c1b
- * modify it under the terms of the GNU Lesser General Public
5544c1b
- * License as published by the Free Software Foundation; either
5544c1b
- * version 2 of the License, or (at your option) any later version.
5544c1b
- *
5544c1b
- * This library is distributed in the hope that it will be useful,
5544c1b
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
5544c1b
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
5544c1b
- * Lesser General Public License for more details.
5544c1b
- *
5544c1b
- * You should have received a copy of the GNU Lesser General Public
5544c1b
- * License along with this library; if not, see <http://www.gnu.org/licenses/>.
5544c1b
- */
5544c1b
-
5544c1b
-#include "cpu.h"
5544c1b
-#include "memory.h"
5544c1b
-#include "cputlb.h"
5544c1b
-#include "dyngen-exec.h"
5544c1b
-#include "host-utils.h"
5544c1b
-#include "helper.h"
5544c1b
-#include <string.h>
5544c1b
-#include "kvm.h"
5544c1b
-#include "qemu-timer.h"
5544c1b
-#ifdef CONFIG_KVM
5544c1b
-#include <linux/kvm.h>
5544c1b
-#endif
5544c1b
-
5544c1b
-#if !defined(CONFIG_USER_ONLY)
5544c1b
-#include "softmmu_exec.h"
5544c1b
-#include "sysemu.h"
5544c1b
-#endif
5544c1b
-
5544c1b
-/* #define DEBUG_HELPER */
5544c1b
-#ifdef DEBUG_HELPER
5544c1b
-#define HELPER_LOG(x...) qemu_log(x)
5544c1b
-#else
5544c1b
-#define HELPER_LOG(x...)
5544c1b
-#endif
5544c1b
-
5544c1b
-/* raise an exception */
5544c1b
-void HELPER(exception)(uint32_t excp)
5544c1b
-{
5544c1b
-    HELPER_LOG("%s: exception %d\n", __func__, excp);
5544c1b
-    env->exception_index = excp;
5544c1b
-    cpu_loop_exit(env);
5544c1b
-}
5544c1b
-
5544c1b
-#ifndef CONFIG_USER_ONLY
5544c1b
-void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
5544c1b
-{
5544c1b
-    qemu_log("program interrupt at %#" PRIx64 "\n", env->psw.addr);
5544c1b
-
5544c1b
-    if (kvm_enabled()) {
5544c1b
-#ifdef CONFIG_KVM
5544c1b
-        kvm_s390_interrupt(env, KVM_S390_PROGRAM_INT, code);
5544c1b
-#endif
5544c1b
-    } else {
5544c1b
-        env->int_pgm_code = code;
5544c1b
-        env->int_pgm_ilc = ilc;
5544c1b
-        env->exception_index = EXCP_PGM;
5544c1b
-        cpu_loop_exit(env);
5544c1b
-    }
5544c1b
-}
5544c1b
-
5544c1b
-/*
5544c1b
- * ret < 0 indicates program check, ret = 0, 1, 2, 3 -> cc
5544c1b
- */
5544c1b
-int sclp_service_call(CPUS390XState *env, uint32_t sccb, uint64_t code)
5544c1b
-{
5544c1b
-    int r = 0;
5544c1b
-    int shift = 0;
5544c1b
-
5544c1b
-#ifdef DEBUG_HELPER
5544c1b
-    printf("sclp(0x%x, 0x%" PRIx64 ")\n", sccb, code);
5544c1b
-#endif
5544c1b
-
5544c1b
-    /* basic checks */
5544c1b
-    if (!memory_region_is_ram(phys_page_find(sccb >> TARGET_PAGE_BITS)->mr)) {
5544c1b
-        return -PGM_ADDRESSING;
5544c1b
-    }
5544c1b
-    if (sccb & ~0x7ffffff8ul) {
5544c1b
-        return -PGM_SPECIFICATION;
5544c1b
-    }
5544c1b
-
5544c1b
-    switch (code) {
5544c1b
-    case SCLP_CMDW_READ_SCP_INFO:
5544c1b
-    case SCLP_CMDW_READ_SCP_INFO_FORCED:
5544c1b
-        while ((ram_size >> (20 + shift)) > 65535) {
5544c1b
-            shift++;
5544c1b
-        }
5544c1b
-        stw_phys(sccb + SCP_MEM_CODE, ram_size >> (20 + shift));
5544c1b
-        stb_phys(sccb + SCP_INCREMENT, 1 << shift);
5544c1b
-        stw_phys(sccb + SCP_RESPONSE_CODE, 0x10);
5544c1b
-
5544c1b
-        s390_sclp_extint(sccb & ~3);
5544c1b
-        break;
5544c1b
-    default:
5544c1b
-#ifdef DEBUG_HELPER
5544c1b
-        printf("KVM: invalid sclp call 0x%x / 0x%" PRIx64 "x\n", sccb, code);
5544c1b
-#endif
5544c1b
-        r = 3;
5544c1b
-        break;
5544c1b
-    }
5544c1b
-
5544c1b
-    return r;
5544c1b
-}
5544c1b
-
5544c1b
-/* SCLP service call */
5544c1b
-uint32_t HELPER(servc)(uint32_t r1, uint64_t r2)
5544c1b
-{
5544c1b
-    int r;
5544c1b
-
5544c1b
-    r = sclp_service_call(env, r1, r2);
5544c1b
-    if (r < 0) {
5544c1b
-        program_interrupt(env, -r, 4);
5544c1b
-        return 0;
5544c1b
-    }
5544c1b
-    return r;
5544c1b
-}
5544c1b
-
5544c1b
-/* DIAG */
5544c1b
-uint64_t HELPER(diag)(uint32_t num, uint64_t mem, uint64_t code)
5544c1b
-{
5544c1b
-    uint64_t r;
5544c1b
-
5544c1b
-    switch (num) {
5544c1b
-    case 0x500:
5544c1b
-        /* KVM hypercall */
5544c1b
-        r = s390_virtio_hypercall(env, mem, code);
5544c1b
-        break;
5544c1b
-    case 0x44:
5544c1b
-        /* yield */
5544c1b
-        r = 0;
5544c1b
-        break;
5544c1b
-    case 0x308:
5544c1b
-        /* ipl */
5544c1b
-        r = 0;
5544c1b
-        break;
5544c1b
-    default:
5544c1b
-        r = -1;
5544c1b
-        break;
5544c1b
-    }
5544c1b
-
5544c1b
-    if (r) {
5544c1b
-        program_interrupt(env, PGM_OPERATION, ILC_LATER_INC);
5544c1b
-    }
5544c1b
-
5544c1b
-    return r;
5544c1b
-}
5544c1b
-
5544c1b
-/* Store CPU ID */
5544c1b
-void HELPER(stidp)(uint64_t a1)
5544c1b
-{
5544c1b
-    stq(a1, env->cpu_num);
5544c1b
-}
5544c1b
-
5544c1b
-/* Set Prefix */
5544c1b
-void HELPER(spx)(uint64_t a1)
5544c1b
-{
5544c1b
-    uint32_t prefix;
5544c1b
-
5544c1b
-    prefix = ldl(a1);
5544c1b
-    env->psa = prefix & 0xfffff000;
5544c1b
-    qemu_log("prefix: %#x\n", prefix);
5544c1b
-    tlb_flush_page(env, 0);
5544c1b
-    tlb_flush_page(env, TARGET_PAGE_SIZE);
5544c1b
-}
5544c1b
-
5544c1b
-/* Set Clock */
5544c1b
-uint32_t HELPER(sck)(uint64_t a1)
5544c1b
-{
5544c1b
-    /* XXX not implemented - is it necessary? */
5544c1b
-
5544c1b
-    return 0;
5544c1b
-}
5544c1b
-
5544c1b
-static inline uint64_t clock_value(CPUS390XState *env)
5544c1b
-{
5544c1b
-    uint64_t time;
5544c1b
-
5544c1b
-    time = env->tod_offset +
5544c1b
-        time2tod(qemu_get_clock_ns(vm_clock) - env->tod_basetime);
5544c1b
-
5544c1b
-    return time;
5544c1b
-}
5544c1b
-
5544c1b
-/* Store Clock */
5544c1b
-uint32_t HELPER(stck)(uint64_t a1)
5544c1b
-{
5544c1b
-    stq(a1, clock_value(env));
5544c1b
-
5544c1b
-    return 0;
5544c1b
-}
5544c1b
-
5544c1b
-/* Store Clock Extended */
5544c1b
-uint32_t HELPER(stcke)(uint64_t a1)
5544c1b
-{
5544c1b
-    stb(a1, 0);
5544c1b
-    /* basically the same value as stck */
5544c1b
-    stq(a1 + 1, clock_value(env) | env->cpu_num);
5544c1b
-    /* more fine grained than stck */
5544c1b
-    stq(a1 + 9, 0);
5544c1b
-    /* XXX programmable fields */
5544c1b
-    stw(a1 + 17, 0);
5544c1b
-
5544c1b
-    return 0;
5544c1b
-}
5544c1b
-
5544c1b
-/* Set Clock Comparator */
5544c1b
-void HELPER(sckc)(uint64_t a1)
5544c1b
-{
5544c1b
-    uint64_t time = ldq(a1);
5544c1b
-
5544c1b
-    if (time == -1ULL) {
5544c1b
-        return;
5544c1b
-    }
5544c1b
-
5544c1b
-    /* difference between now and then */
5544c1b
-    time -= clock_value(env);
5544c1b
-    /* nanoseconds */
5544c1b
-    time = (time * 125) >> 9;
5544c1b
-
5544c1b
-    qemu_mod_timer(env->tod_timer, qemu_get_clock_ns(vm_clock) + time);
5544c1b
-}
5544c1b
-
5544c1b
-/* Store Clock Comparator */
5544c1b
-void HELPER(stckc)(uint64_t a1)
5544c1b
-{
5544c1b
-    /* XXX implement */
5544c1b
-    stq(a1, 0);
5544c1b
-}
5544c1b
-
5544c1b
-/* Set CPU Timer */
5544c1b
-void HELPER(spt)(uint64_t a1)
5544c1b
-{
5544c1b
-    uint64_t time = ldq(a1);
5544c1b
-
5544c1b
-    if (time == -1ULL) {
5544c1b
-        return;
5544c1b
-    }
5544c1b
-
5544c1b
-    /* nanoseconds */
5544c1b
-    time = (time * 125) >> 9;
5544c1b
-
5544c1b
-    qemu_mod_timer(env->cpu_timer, qemu_get_clock_ns(vm_clock) + time);
5544c1b
-}
5544c1b
-
5544c1b
-/* Store CPU Timer */
5544c1b
-void HELPER(stpt)(uint64_t a1)
5544c1b
-{
5544c1b
-    /* XXX implement */
5544c1b
-    stq(a1, 0);
5544c1b
-}
5544c1b
-
5544c1b
-/* Store System Information */
5544c1b
-uint32_t HELPER(stsi)(uint64_t a0, uint32_t r0, uint32_t r1)
5544c1b
-{
5544c1b
-    int cc = 0;
5544c1b
-    int sel1, sel2;
5544c1b
-
5544c1b
-    if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
5544c1b
-        ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
5544c1b
-        /* valid function code, invalid reserved bits */
5544c1b
-        program_interrupt(env, PGM_SPECIFICATION, 2);
5544c1b
-    }
5544c1b
-
5544c1b
-    sel1 = r0 & STSI_R0_SEL1_MASK;
5544c1b
-    sel2 = r1 & STSI_R1_SEL2_MASK;
5544c1b
-
5544c1b
-    /* XXX: spec exception if sysib is not 4k-aligned */
5544c1b
-
5544c1b
-    switch (r0 & STSI_LEVEL_MASK) {
5544c1b
-    case STSI_LEVEL_1:
5544c1b
-        if ((sel1 == 1) && (sel2 == 1)) {
5544c1b
-            /* Basic Machine Configuration */
5544c1b
-            struct sysib_111 sysib;
5544c1b
-
5544c1b
-            memset(&sysib, 0, sizeof(sysib));
5544c1b
-            ebcdic_put(sysib.manuf, "QEMU            ", 16);
5544c1b
-            /* same as machine type number in STORE CPU ID */
5544c1b
-            ebcdic_put(sysib.type, "QEMU", 4);
5544c1b
-            /* same as model number in STORE CPU ID */
5544c1b
-            ebcdic_put(sysib.model, "QEMU            ", 16);
5544c1b
-            ebcdic_put(sysib.sequence, "QEMU            ", 16);
5544c1b
-            ebcdic_put(sysib.plant, "QEMU", 4);
5544c1b
-            cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
-        } else if ((sel1 == 2) && (sel2 == 1)) {
5544c1b
-            /* Basic Machine CPU */
5544c1b
-            struct sysib_121 sysib;
5544c1b
-
5544c1b
-            memset(&sysib, 0, sizeof(sysib));
5544c1b
-            /* XXX make different for different CPUs? */
5544c1b
-            ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
5544c1b
-            ebcdic_put(sysib.plant, "QEMU", 4);
5544c1b
-            stw_p(&sysib.cpu_addr, env->cpu_num);
5544c1b
-            cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
-        } else if ((sel1 == 2) && (sel2 == 2)) {
5544c1b
-            /* Basic Machine CPUs */
5544c1b
-            struct sysib_122 sysib;
5544c1b
-
5544c1b
-            memset(&sysib, 0, sizeof(sysib));
5544c1b
-            stl_p(&sysib.capability, 0x443afc29);
5544c1b
-            /* XXX change when SMP comes */
5544c1b
-            stw_p(&sysib.total_cpus, 1);
5544c1b
-            stw_p(&sysib.active_cpus, 1);
5544c1b
-            stw_p(&sysib.standby_cpus, 0);
5544c1b
-            stw_p(&sysib.reserved_cpus, 0);
5544c1b
-            cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
-        } else {
5544c1b
-            cc = 3;
5544c1b
-        }
5544c1b
-        break;
5544c1b
-    case STSI_LEVEL_2:
5544c1b
-        {
5544c1b
-            if ((sel1 == 2) && (sel2 == 1)) {
5544c1b
-                /* LPAR CPU */
5544c1b
-                struct sysib_221 sysib;
5544c1b
-
5544c1b
-                memset(&sysib, 0, sizeof(sysib));
5544c1b
-                /* XXX make different for different CPUs? */
5544c1b
-                ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
5544c1b
-                ebcdic_put(sysib.plant, "QEMU", 4);
5544c1b
-                stw_p(&sysib.cpu_addr, env->cpu_num);
5544c1b
-                stw_p(&sysib.cpu_id, 0);
5544c1b
-                cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
-            } else if ((sel1 == 2) && (sel2 == 2)) {
5544c1b
-                /* LPAR CPUs */
5544c1b
-                struct sysib_222 sysib;
5544c1b
-
5544c1b
-                memset(&sysib, 0, sizeof(sysib));
5544c1b
-                stw_p(&sysib.lpar_num, 0);
5544c1b
-                sysib.lcpuc = 0;
5544c1b
-                /* XXX change when SMP comes */
5544c1b
-                stw_p(&sysib.total_cpus, 1);
5544c1b
-                stw_p(&sysib.conf_cpus, 1);
5544c1b
-                stw_p(&sysib.standby_cpus, 0);
5544c1b
-                stw_p(&sysib.reserved_cpus, 0);
5544c1b
-                ebcdic_put(sysib.name, "QEMU    ", 8);
5544c1b
-                stl_p(&sysib.caf, 1000);
5544c1b
-                stw_p(&sysib.dedicated_cpus, 0);
5544c1b
-                stw_p(&sysib.shared_cpus, 0);
5544c1b
-                cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
5544c1b
-            } else {
5544c1b
-                cc = 3;
5544c1b
-            }
5544c1b
-            break;
5544c1b
-        }
5544c1b
-    case STSI_LEVEL_3:
5544c1b
-        {
5544c1b
-            if ((sel1 == 2) && (sel2 == 2)) {
5544c1b
-                /* VM CPUs */
5544c1b
-                struct sysib_322 sysib;
5544c1b
-
5544c1b
-                memset(&sysib, 0, sizeof(sysib));
5544c1b
-                sysib.count = 1;
5544c1b
-                /* XXX change when SMP comes */
5544c1b
-                stw_p(&sysib.vm[0].total_cpus, 1);
5544c1b
-                stw_p(&sysib.vm[0].conf_cpus, 1);
5544c1b
-                stw_p(&sysib.vm[0].standby_cpus, 0);
5544c1b
-                stw_p(&sysib.vm[0].reserved_cpus, 0);
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-                ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
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-                stl_p(&sysib.vm[0].caf, 1000);
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-                ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
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-                cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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-            } else {
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-                cc = 3;
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-            }
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-            break;
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-        }
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-    case STSI_LEVEL_CURRENT:
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-        env->regs[0] = STSI_LEVEL_3;
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-        break;
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-    default:
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-        cc = 3;
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-        break;
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-    }
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-
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-    return cc;
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-}
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-
5544c1b
-uint32_t HELPER(sigp)(uint64_t order_code, uint32_t r1, uint64_t cpu_addr)
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-{
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-    int cc = 0;
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-
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-    HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
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-               __func__, order_code, r1, cpu_addr);
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-
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-    /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
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-       as parameter (input). Status (output) is always R1. */
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-
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-    switch (order_code) {
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-    case SIGP_SET_ARCH:
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-        /* switch arch */
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-        break;
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-    case SIGP_SENSE:
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-        /* enumerate CPU status */
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-        if (cpu_addr) {
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-            /* XXX implement when SMP comes */
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-            return 3;
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-        }
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-        env->regs[r1] &= 0xffffffff00000000ULL;
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-        cc = 1;
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-        break;
5544c1b
-#if !defined(CONFIG_USER_ONLY)
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-    case SIGP_RESTART:
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-        qemu_system_reset_request();
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-        cpu_loop_exit(env);
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-        break;
5544c1b
-    case SIGP_STOP:
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-        qemu_system_shutdown_request();
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-        cpu_loop_exit(env);
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-        break;
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-#endif
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-    default:
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-        /* unknown sigp */
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-        fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
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-        cc = 3;
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-    }
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-
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-    return cc;
5544c1b
-}
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-#endif
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-- 
f375e62
1.8.0.2
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