From c6ca7ce89b5b75086f48fcd700d57f05b8a67d68 Mon Sep 17 00:00:00 2001 From: Justin M. Forbes Date: Aug 07 2017 23:19:41 +0000 Subject: Linux v4.12.5 rebase --- diff --git a/0001-ACPI-LPSS-Only-call-pwm_add_table-for-the-first-PWM-.patch b/0001-ACPI-LPSS-Only-call-pwm_add_table-for-the-first-PWM-.patch deleted file mode 100644 index ecfc34c..0000000 --- a/0001-ACPI-LPSS-Only-call-pwm_add_table-for-the-first-PWM-.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 92fe05e58babf15d7ddadfccd8bc383ea7e46e55 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Wed, 5 Jul 2017 22:02:59 +0200 -Subject: [PATCH] ACPI / LPSS: Only call pwm_add_table for the first PWM - controller - -At least on the UP board SBC both PWMs are enabled leading to us -trying to add the same pwm_lookup twice, which leads to the following: - -[ 0.902224] list_add double add: new=ffffffffb8efd400, - prev=ffffffffb8efd400, next=ffffffffb8eeede0. -[ 0.912466] ------------[ cut here ]------------ -[ 0.917624] kernel BUG at lib/list_debug.c:31! -[ 0.922588] invalid opcode: 0000 [#1] SMP -... -[ 1.027450] Call Trace: -[ 1.030185] pwm_add_table+0x4c/0x90 -[ 1.034181] bsw_pwm_setup+0x1a/0x20 -[ 1.038175] acpi_lpss_create_device+0xfe/0x420 -... - -This commit fixes this by only calling pwm_add_table for the first -PWM controller (which is the one used for the backlight). - -Cc: stable@vger.kernel.org -BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1458599 -Fixes: bf7696a12071 ("acpi: lpss: call pwm_add_table() for BSW...") -Fixes: 04434ab5120a ("ACPI / LPSS: Call pwm_add_table() for Bay Trail...") -[labbott@redhat.com: Rebase to 4.11] -Signed-off-by: Hans de Goede ---- - drivers/acpi/acpi_lpss.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c -index 5edfd9c..d973e56 100644 ---- a/drivers/acpi/acpi_lpss.c -+++ b/drivers/acpi/acpi_lpss.c -@@ -85,6 +85,7 @@ static const struct lpss_device_desc lpss_dma_desc = { - }; - - struct lpss_private_data { -+ struct acpi_device *adev; - void __iomem *mmio_base; - resource_size_t mmio_size; - unsigned int fixed_clk_rate; -@@ -164,6 +165,12 @@ static struct pwm_lookup bsw_pwm_lookup[] = { - - static void bsw_pwm_setup(struct lpss_private_data *pdata) - { -+ struct acpi_device *adev = pdata->adev; -+ -+ /* Only call pwm_add_table for the first PWM controller */ -+ if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1")) -+ return; -+ - pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup)); - } - -@@ -439,6 +446,7 @@ static int acpi_lpss_create_device(struct acpi_device *adev, - goto err_out; - } - -+ pdata->adev = adev; - pdata->dev_desc = dev_desc; - - if (dev_desc->setup) --- -2.7.5 - diff --git a/0001-SUNRPC-Refactor-svc_set_num_threads.patch b/0001-SUNRPC-Refactor-svc_set_num_threads.patch deleted file mode 100644 index d29b5fc..0000000 --- a/0001-SUNRPC-Refactor-svc_set_num_threads.patch +++ /dev/null @@ -1,156 +0,0 @@ -From 9e0d87680d689f1758185851c3da6eafb16e71e1 Mon Sep 17 00:00:00 2001 -From: Trond Myklebust -Date: Wed, 26 Apr 2017 11:55:26 -0400 -Subject: [PATCH] SUNRPC: Refactor svc_set_num_threads() - -Refactor to separate out the functions of starting and stopping threads -so that they can be used in other helpers. - -Signed-off-by: Trond Myklebust -Tested-and-reviewed-by: Kinglong Mee -Signed-off-by: J. Bruce Fields ---- - net/sunrpc/svc.c | 96 ++++++++++++++++++++++++++++++++++---------------------- - 1 file changed, 58 insertions(+), 38 deletions(-) - -diff --git a/net/sunrpc/svc.c b/net/sunrpc/svc.c -index a08aeb5..98dc33a 100644 ---- a/net/sunrpc/svc.c -+++ b/net/sunrpc/svc.c -@@ -702,59 +702,32 @@ choose_victim(struct svc_serv *serv, struct svc_pool *pool, unsigned int *state) - return task; - } - --/* -- * Create or destroy enough new threads to make the number -- * of threads the given number. If `pool' is non-NULL, applies -- * only to threads in that pool, otherwise round-robins between -- * all pools. Caller must ensure that mutual exclusion between this and -- * server startup or shutdown. -- * -- * Destroying threads relies on the service threads filling in -- * rqstp->rq_task, which only the nfs ones do. Assumes the serv -- * has been created using svc_create_pooled(). -- * -- * Based on code that used to be in nfsd_svc() but tweaked -- * to be pool-aware. -- */ --int --svc_set_num_threads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) -+/* create new threads */ -+static int -+svc_start_kthreads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) - { - struct svc_rqst *rqstp; - struct task_struct *task; - struct svc_pool *chosen_pool; -- int error = 0; - unsigned int state = serv->sv_nrthreads-1; - int node; - -- if (pool == NULL) { -- /* The -1 assumes caller has done a svc_get() */ -- nrservs -= (serv->sv_nrthreads-1); -- } else { -- spin_lock_bh(&pool->sp_lock); -- nrservs -= pool->sp_nrthreads; -- spin_unlock_bh(&pool->sp_lock); -- } -- -- /* create new threads */ -- while (nrservs > 0) { -+ do { - nrservs--; - chosen_pool = choose_pool(serv, pool, &state); - - node = svc_pool_map_get_node(chosen_pool->sp_id); - rqstp = svc_prepare_thread(serv, chosen_pool, node); -- if (IS_ERR(rqstp)) { -- error = PTR_ERR(rqstp); -- break; -- } -+ if (IS_ERR(rqstp)) -+ return PTR_ERR(rqstp); - - __module_get(serv->sv_ops->svo_module); - task = kthread_create_on_node(serv->sv_ops->svo_function, rqstp, - node, "%s", serv->sv_name); - if (IS_ERR(task)) { -- error = PTR_ERR(task); - module_put(serv->sv_ops->svo_module); - svc_exit_thread(rqstp); -- break; -+ return PTR_ERR(task); - } - - rqstp->rq_task = task; -@@ -763,15 +736,62 @@ svc_set_num_threads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) - - svc_sock_update_bufs(serv); - wake_up_process(task); -- } -+ } while (nrservs > 0); -+ -+ return 0; -+} -+ -+ -+/* destroy old threads */ -+static int -+svc_signal_kthreads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) -+{ -+ struct task_struct *task; -+ unsigned int state = serv->sv_nrthreads-1; -+ - /* destroy old threads */ -- while (nrservs < 0 && -- (task = choose_victim(serv, pool, &state)) != NULL) { -+ do { -+ task = choose_victim(serv, pool, &state); -+ if (task == NULL) -+ break; - send_sig(SIGINT, task, 1); - nrservs++; -+ } while (nrservs < 0); -+ -+ return 0; -+} -+ -+/* -+ * Create or destroy enough new threads to make the number -+ * of threads the given number. If `pool' is non-NULL, applies -+ * only to threads in that pool, otherwise round-robins between -+ * all pools. Caller must ensure that mutual exclusion between this and -+ * server startup or shutdown. -+ * -+ * Destroying threads relies on the service threads filling in -+ * rqstp->rq_task, which only the nfs ones do. Assumes the serv -+ * has been created using svc_create_pooled(). -+ * -+ * Based on code that used to be in nfsd_svc() but tweaked -+ * to be pool-aware. -+ */ -+int -+svc_set_num_threads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) -+{ -+ if (pool == NULL) { -+ /* The -1 assumes caller has done a svc_get() */ -+ nrservs -= (serv->sv_nrthreads-1); -+ } else { -+ spin_lock_bh(&pool->sp_lock); -+ nrservs -= pool->sp_nrthreads; -+ spin_unlock_bh(&pool->sp_lock); - } - -- return error; -+ if (nrservs > 0) -+ return svc_start_kthreads(serv, pool, nrservs); -+ if (nrservs < 0) -+ return svc_signal_kthreads(serv, pool, nrservs); -+ return 0; - } - EXPORT_SYMBOL_GPL(svc_set_num_threads); - --- -2.9.4 - diff --git a/0001-platform-x86-Add-driver-for-ACPI-INT0002-Virtual-GPI.patch b/0001-platform-x86-Add-driver-for-ACPI-INT0002-Virtual-GPI.patch new file mode 100644 index 0000000..a0b6ff0 --- /dev/null +++ b/0001-platform-x86-Add-driver-for-ACPI-INT0002-Virtual-GPI.patch @@ -0,0 +1,339 @@ +From 3bbfe49a1d965b951527cde0da48f5d7677db264 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 21 May 2017 13:15:11 +0200 +Subject: [PATCH 01/16] platform/x86: Add driver for ACPI INT0002 Virtual GPIO + device + +Some peripherals on Bay Trail and Cherry Trail platforms signal a +Power Management Event (PME) to the Power Management Controller (PMC) +to wakeup the system. When this happens software needs to explicitly +clear the PME bus 0 status bit in the GPE0a_STS register to avoid an +IRQ storm on IRQ 9. + +This is modelled in ACPI through the INT0002 ACPI device, which is +called a "Virtual GPIO controller" in ACPI because it defines the +event handler to call when the PME triggers through _AEI and _L02 +methods as would be done for a real GPIO interrupt in ACPI. + +This commit adds a driver which registers the Virtual GPIOs expected +by the DSDT on these devices, letting gpiolib-acpi claim the +virtual GPIO and install a GPIO-interrupt handler which call the _L02 +handler as it would for a real GPIO controller. + +Cc: joeyli +Cc: Takashi Iwai +Signed-off-by: Hans de Goede +Reviewed-by: Andy Shevchenko +Acked-by: Rafael J. Wysocki +Reviewed-by: Linus Walleij +--- +Changes in v2: +-Remove dev_err after malloc failure +-Remove unused empty runtime pm callbacks +-s/GPE0A_PME_/GPE0A_PME_B0_/ +-Fixed some checkpatch warnings (I forgot to run checkpatch on v1) + +Changes in v3: +-Rewrite as gpiochip driver letting gpiolib-acpi deal with claiming the pin + 0x0002 and calling the _L02 event handler when the virtual gpio-irq triggers +-Rebase on 4.12-rc1 + +Changes in v4: +-Drop device_init_wakeup() from _probe(), use pm_system_wakeup() instead + of pm_wakeup_hard_event(chip->parent) +-Improve commit message + +Changes in v5: +-Use BIT() macro for FOO_BIT defines +-Drop unneeded ACPI_PTR macro usage + +Changes in v6: +-Move back to drivers/platform/x86 +-Expand certain acronyms (PME, PMC) +-Use linux/gpio/driver.h include instead of linux/gpio.h +-Document why the get / set / direction_output functions are dummys +-No functional changes + +Changes in v7: +-Some minor cleanups from Andy: + -Move asm/ includes below linux/ includes + -s/APCI/ACPI/ + -Use bitmap_clear on chip->irq_valid_mask +-Add Linus Walleij's Reviewed-by +--- + drivers/platform/x86/Kconfig | 19 +++ + drivers/platform/x86/Makefile | 1 + + drivers/platform/x86/intel_int0002_vgpio.c | 219 +++++++++++++++++++++++++++++ + 3 files changed, 239 insertions(+) + create mode 100644 drivers/platform/x86/intel_int0002_vgpio.c + +diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig +index 8489020ecf44..a3ccc3c795a5 100644 +--- a/drivers/platform/x86/Kconfig ++++ b/drivers/platform/x86/Kconfig +@@ -794,6 +794,25 @@ config INTEL_CHT_INT33FE + This driver instantiates i2c-clients for these, so that standard + i2c drivers for these chips can bind to the them. + ++config INTEL_INT0002_VGPIO ++ tristate "Intel ACPI INT0002 Virtual GPIO driver" ++ depends on GPIOLIB && ACPI ++ select GPIOLIB_IRQCHIP ++ ---help--- ++ Some peripherals on Bay Trail and Cherry Trail platforms signal a ++ Power Management Event (PME) to the Power Management Controller (PMC) ++ to wakeup the system. When this happens software needs to explicitly ++ clear the PME bus 0 status bit in the GPE0a_STS register to avoid an ++ IRQ storm on IRQ 9. ++ ++ This is modelled in ACPI through the INT0002 ACPI device, which is ++ called a "Virtual GPIO controller" in ACPI because it defines the ++ event handler to call when the PME triggers through _AEI and _L02 ++ methods as would be done for a real GPIO interrupt in ACPI. ++ ++ To compile this driver as a module, choose M here: the module will ++ be called intel_int0002_vgpio. ++ + config INTEL_HID_EVENT + tristate "INTEL HID Event" + depends on ACPI +diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile +index 182a3ed6605a..ab22ce77fb66 100644 +--- a/drivers/platform/x86/Makefile ++++ b/drivers/platform/x86/Makefile +@@ -46,6 +46,7 @@ obj-$(CONFIG_TOSHIBA_BT_RFKILL) += toshiba_bluetooth.o + obj-$(CONFIG_TOSHIBA_HAPS) += toshiba_haps.o + obj-$(CONFIG_TOSHIBA_WMI) += toshiba-wmi.o + obj-$(CONFIG_INTEL_CHT_INT33FE) += intel_cht_int33fe.o ++obj-$(CONFIG_INTEL_INT0002_VGPIO) += intel_int0002_vgpio.o + obj-$(CONFIG_INTEL_HID_EVENT) += intel-hid.o + obj-$(CONFIG_INTEL_VBTN) += intel-vbtn.o + obj-$(CONFIG_INTEL_SCU_IPC) += intel_scu_ipc.o +diff --git a/drivers/platform/x86/intel_int0002_vgpio.c b/drivers/platform/x86/intel_int0002_vgpio.c +new file mode 100644 +index 000000000000..92dc230ef5b2 +--- /dev/null ++++ b/drivers/platform/x86/intel_int0002_vgpio.c +@@ -0,0 +1,219 @@ ++/* ++ * Intel INT0002 "Virtual GPIO" driver ++ * ++ * Copyright (C) 2017 Hans de Goede ++ * ++ * Loosely based on android x86 kernel code which is: ++ * ++ * Copyright (c) 2014, Intel Corporation. ++ * ++ * Author: Dyut Kumar Sil ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Some peripherals on Bay Trail and Cherry Trail platforms signal a Power ++ * Management Event (PME) to the Power Management Controller (PMC) to wakeup ++ * the system. When this happens software needs to clear the PME bus 0 status ++ * bit in the GPE0a_STS register to avoid an IRQ storm on IRQ 9. ++ * ++ * This is modelled in ACPI through the INT0002 ACPI device, which is ++ * called a "Virtual GPIO controller" in ACPI because it defines the event ++ * handler to call when the PME triggers through _AEI and _L02 / _E02 ++ * methods as would be done for a real GPIO interrupt in ACPI. Note this ++ * is a hack to define an AML event handler for the PME while using existing ++ * ACPI mechanisms, this is not a real GPIO at all. ++ * ++ * This driver will bind to the INT0002 device, and register as a GPIO ++ * controller, letting gpiolib-acpi.c call the _L02 handler as it would ++ * for a real GPIO controller. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define DRV_NAME "INT0002 Virtual GPIO" ++ ++/* For some reason the virtual GPIO pin tied to the GPE is numbered pin 2 */ ++#define GPE0A_PME_B0_VIRT_GPIO_PIN 2 ++ ++#define GPE0A_PME_B0_STS_BIT BIT(13) ++#define GPE0A_PME_B0_EN_BIT BIT(13) ++#define GPE0A_STS_PORT 0x420 ++#define GPE0A_EN_PORT 0x428 ++ ++#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } ++ ++static const struct x86_cpu_id int0002_cpu_ids[] = { ++/* ++ * Limit ourselves to Cherry Trail for now, until testing shows we ++ * need to handle the INT0002 device on Baytrail too. ++ * ICPU(INTEL_FAM6_ATOM_SILVERMONT1), * Valleyview, Bay Trail * ++ */ ++ ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */ ++ {} ++}; ++ ++/* ++ * As this is not a real GPIO at all, but just a hack to model an event in ++ * ACPI the get / set functions are dummy functions. ++ */ ++ ++static int int0002_gpio_get(struct gpio_chip *chip, unsigned int offset) ++{ ++ return 0; ++} ++ ++static void int0002_gpio_set(struct gpio_chip *chip, unsigned int offset, ++ int value) ++{ ++} ++ ++static int int0002_gpio_direction_output(struct gpio_chip *chip, ++ unsigned int offset, int value) ++{ ++ return 0; ++} ++ ++static void int0002_irq_ack(struct irq_data *data) ++{ ++ outl(GPE0A_PME_B0_STS_BIT, GPE0A_STS_PORT); ++} ++ ++static void int0002_irq_unmask(struct irq_data *data) ++{ ++ u32 gpe_en_reg; ++ ++ gpe_en_reg = inl(GPE0A_EN_PORT); ++ gpe_en_reg |= GPE0A_PME_B0_EN_BIT; ++ outl(gpe_en_reg, GPE0A_EN_PORT); ++} ++ ++static void int0002_irq_mask(struct irq_data *data) ++{ ++ u32 gpe_en_reg; ++ ++ gpe_en_reg = inl(GPE0A_EN_PORT); ++ gpe_en_reg &= ~GPE0A_PME_B0_EN_BIT; ++ outl(gpe_en_reg, GPE0A_EN_PORT); ++} ++ ++static irqreturn_t int0002_irq(int irq, void *data) ++{ ++ struct gpio_chip *chip = data; ++ u32 gpe_sts_reg; ++ ++ gpe_sts_reg = inl(GPE0A_STS_PORT); ++ if (!(gpe_sts_reg & GPE0A_PME_B0_STS_BIT)) ++ return IRQ_NONE; ++ ++ generic_handle_irq(irq_find_mapping(chip->irqdomain, ++ GPE0A_PME_B0_VIRT_GPIO_PIN)); ++ ++ pm_system_wakeup(); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irq_chip int0002_irqchip = { ++ .name = DRV_NAME, ++ .irq_ack = int0002_irq_ack, ++ .irq_mask = int0002_irq_mask, ++ .irq_unmask = int0002_irq_unmask, ++}; ++ ++static int int0002_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ const struct x86_cpu_id *cpu_id; ++ struct gpio_chip *chip; ++ int irq, ret; ++ ++ /* Menlow has a different INT0002 device? */ ++ cpu_id = x86_match_cpu(int0002_cpu_ids); ++ if (!cpu_id) ++ return -ENODEV; ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(dev, "Error getting IRQ: %d\n", irq); ++ return irq; ++ } ++ ++ chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); ++ if (!chip) ++ return -ENOMEM; ++ ++ chip->label = DRV_NAME; ++ chip->parent = dev; ++ chip->owner = THIS_MODULE; ++ chip->get = int0002_gpio_get; ++ chip->set = int0002_gpio_set; ++ chip->direction_input = int0002_gpio_get; ++ chip->direction_output = int0002_gpio_direction_output; ++ chip->base = -1; ++ chip->ngpio = GPE0A_PME_B0_VIRT_GPIO_PIN + 1; ++ chip->irq_need_valid_mask = true; ++ ++ ret = devm_gpiochip_add_data(&pdev->dev, chip, NULL); ++ if (ret) { ++ dev_err(dev, "Error adding gpio chip: %d\n", ret); ++ return ret; ++ } ++ ++ bitmap_clear(chip->irq_valid_mask, 0, GPE0A_PME_B0_VIRT_GPIO_PIN); ++ ++ /* ++ * We manually request the irq here instead of passing a flow-handler ++ * to gpiochip_set_chained_irqchip, because the irq is shared. ++ */ ++ ret = devm_request_irq(dev, irq, int0002_irq, ++ IRQF_SHARED | IRQF_NO_THREAD, "INT0002", chip); ++ if (ret) { ++ dev_err(dev, "Error requesting IRQ %d: %d\n", irq, ret); ++ return ret; ++ } ++ ++ ret = gpiochip_irqchip_add(chip, &int0002_irqchip, 0, handle_edge_irq, ++ IRQ_TYPE_NONE); ++ if (ret) { ++ dev_err(dev, "Error adding irqchip: %d\n", ret); ++ return ret; ++ } ++ ++ gpiochip_set_chained_irqchip(chip, &int0002_irqchip, irq, NULL); ++ ++ return 0; ++} ++ ++static const struct acpi_device_id int0002_acpi_ids[] = { ++ { "INT0002", 0 }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(acpi, int0002_acpi_ids); ++ ++static struct platform_driver int0002_driver = { ++ .driver = { ++ .name = DRV_NAME, ++ .acpi_match_table = int0002_acpi_ids, ++ }, ++ .probe = int0002_probe, ++}; ++ ++module_platform_driver(int0002_driver); ++ ++MODULE_AUTHOR("Hans de Goede "); ++MODULE_DESCRIPTION("Intel INT0002 Virtual GPIO driver"); ++MODULE_LICENSE("GPL"); +-- +2.13.0 + diff --git a/0001-platform-x86-thinkpad_acpi-guard-generic-hotkey-case.patch b/0001-platform-x86-thinkpad_acpi-guard-generic-hotkey-case.patch deleted file mode 100644 index 847c70c..0000000 --- a/0001-platform-x86-thinkpad_acpi-guard-generic-hotkey-case.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 6bb84c0f9da1144e0d443798a76d5769b7d554af Mon Sep 17 00:00:00 2001 -From: Christian Kellner -Date: Tue, 28 Feb 2017 17:10:56 +0100 -Subject: [PATCH 1/2] platform/x86: thinkpad_acpi: guard generic hotkey case - -Currently when dispatching hotkeys we check if the scancode is in -the range of 0 and TPACPI_HOTKEY_MAP_LEN, although the bottom 20 -entries in the hotkey keymap are already adaptive keycodes. -Therefore we introduce a TP_ACPI_HOTKEYSCAN_ADAPTIVE_START and -ensure that we are in the range 0 and ADAPTIVE_START for the generic -keycode case. - -Signed-off-by: Christian Kellner -Reviewed-by: Hans de Goede -Acked-by: Henrique de Moraes Holschuh -Signed-off-by: Andy Shevchenko ---- - drivers/platform/x86/thinkpad_acpi.c | 12 +++++++----- - 1 file changed, 7 insertions(+), 5 deletions(-) - -diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c -index 1d18b32..e2b962f 100644 ---- a/drivers/platform/x86/thinkpad_acpi.c -+++ b/drivers/platform/x86/thinkpad_acpi.c -@@ -1922,7 +1922,9 @@ enum { /* hot key scan codes (derived from ACPI DSDT) */ - TP_ACPI_HOTKEYSCAN_UNK7, - TP_ACPI_HOTKEYSCAN_UNK8, - -- TP_ACPI_HOTKEYSCAN_MUTE2, -+ /* Adaptive keyboard keycodes */ -+ TP_ACPI_HOTKEYSCAN_ADAPTIVE_START, -+ TP_ACPI_HOTKEYSCAN_MUTE2 = TP_ACPI_HOTKEYSCAN_ADAPTIVE_START, - TP_ACPI_HOTKEYSCAN_BRIGHTNESS_ZERO, - TP_ACPI_HOTKEYSCAN_CLIPPING_TOOL, - TP_ACPI_HOTKEYSCAN_CLOUD, -@@ -3656,7 +3658,6 @@ static const int adaptive_keyboard_modes[] = { - #define DFR_CHANGE_ROW 0x101 - #define DFR_SHOW_QUICKVIEW_ROW 0x102 - #define FIRST_ADAPTIVE_KEY 0x103 --#define ADAPTIVE_KEY_OFFSET 0x020 - - /* press Fn key a while second, it will switch to Function Mode. Then - * release Fn key, previous mode be restored. -@@ -3747,12 +3748,13 @@ static bool adaptive_keyboard_hotkey_notify_hotkey(unsigned int scancode) - default: - if (scancode < FIRST_ADAPTIVE_KEY || - scancode >= FIRST_ADAPTIVE_KEY + TPACPI_HOTKEY_MAP_LEN - -- ADAPTIVE_KEY_OFFSET) { -+ TP_ACPI_HOTKEYSCAN_ADAPTIVE_START) { - pr_info("Unhandled adaptive keyboard key: 0x%x\n", - scancode); - return false; - } -- keycode = hotkey_keycode_map[scancode - FIRST_ADAPTIVE_KEY + ADAPTIVE_KEY_OFFSET]; -+ keycode = hotkey_keycode_map[scancode - FIRST_ADAPTIVE_KEY + -+ TP_ACPI_HOTKEYSCAN_ADAPTIVE_START]; - if (keycode != KEY_RESERVED) { - mutex_lock(&tpacpi_inputdev_send_mutex); - -@@ -3778,7 +3780,7 @@ static bool hotkey_notify_hotkey(const u32 hkey, - *ignore_acpi_ev = false; - - /* HKEY event 0x1001 is scancode 0x00 */ -- if (scancode > 0 && scancode <= TPACPI_HOTKEY_MAP_LEN) { -+ if (scancode > 0 && scancode <= TP_ACPI_HOTKEYSCAN_ADAPTIVE_START) { - scancode--; - if (!(hotkey_source_mask & (1 << scancode))) { - tpacpi_input_send_key_masked(scancode); --- -2.9.4 - diff --git a/0002-NFSv4-Fix-callback-server-shutdown.patch b/0002-NFSv4-Fix-callback-server-shutdown.patch deleted file mode 100644 index e5745bf..0000000 --- a/0002-NFSv4-Fix-callback-server-shutdown.patch +++ /dev/null @@ -1,155 +0,0 @@ -From ed6473ddc704a2005b9900ca08e236ebb2d8540a Mon Sep 17 00:00:00 2001 -From: Trond Myklebust -Date: Wed, 26 Apr 2017 11:55:27 -0400 -Subject: [PATCH] NFSv4: Fix callback server shutdown - -We want to use kthread_stop() in order to ensure the threads are -shut down before we tear down the nfs_callback_info in nfs_callback_down. - -Tested-and-reviewed-by: Kinglong Mee -Reported-by: Kinglong Mee -Fixes: bb6aeba736ba9 ("NFSv4.x: Switch to using svc_set_num_threads()...") -Signed-off-by: Trond Myklebust -Signed-off-by: J. Bruce Fields ---- - fs/nfs/callback.c | 24 ++++++++++++++++-------- - include/linux/sunrpc/svc.h | 1 + - net/sunrpc/svc.c | 38 ++++++++++++++++++++++++++++++++++++++ - 3 files changed, 55 insertions(+), 8 deletions(-) - -diff --git a/fs/nfs/callback.c b/fs/nfs/callback.c -index c5e27eb..73a1f92 100644 ---- a/fs/nfs/callback.c -+++ b/fs/nfs/callback.c -@@ -76,7 +76,10 @@ nfs4_callback_svc(void *vrqstp) - - set_freezable(); - -- while (!kthread_should_stop()) { -+ while (!kthread_freezable_should_stop(NULL)) { -+ -+ if (signal_pending(current)) -+ flush_signals(current); - /* - * Listen for a request on the socket - */ -@@ -85,6 +88,8 @@ nfs4_callback_svc(void *vrqstp) - continue; - svc_process(rqstp); - } -+ svc_exit_thread(rqstp); -+ module_put_and_exit(0); - return 0; - } - -@@ -103,9 +108,10 @@ nfs41_callback_svc(void *vrqstp) - - set_freezable(); - -- while (!kthread_should_stop()) { -- if (try_to_freeze()) -- continue; -+ while (!kthread_freezable_should_stop(NULL)) { -+ -+ if (signal_pending(current)) -+ flush_signals(current); - - prepare_to_wait(&serv->sv_cb_waitq, &wq, TASK_INTERRUPTIBLE); - spin_lock_bh(&serv->sv_cb_lock); -@@ -121,11 +127,13 @@ nfs41_callback_svc(void *vrqstp) - error); - } else { - spin_unlock_bh(&serv->sv_cb_lock); -- schedule(); -+ if (!kthread_should_stop()) -+ schedule(); - finish_wait(&serv->sv_cb_waitq, &wq); - } -- flush_signals(current); - } -+ svc_exit_thread(rqstp); -+ module_put_and_exit(0); - return 0; - } - -@@ -221,14 +229,14 @@ static int nfs_callback_up_net(int minorversion, struct svc_serv *serv, - static struct svc_serv_ops nfs40_cb_sv_ops = { - .svo_function = nfs4_callback_svc, - .svo_enqueue_xprt = svc_xprt_do_enqueue, -- .svo_setup = svc_set_num_threads, -+ .svo_setup = svc_set_num_threads_sync, - .svo_module = THIS_MODULE, - }; - #if defined(CONFIG_NFS_V4_1) - static struct svc_serv_ops nfs41_cb_sv_ops = { - .svo_function = nfs41_callback_svc, - .svo_enqueue_xprt = svc_xprt_do_enqueue, -- .svo_setup = svc_set_num_threads, -+ .svo_setup = svc_set_num_threads_sync, - .svo_module = THIS_MODULE, - }; - -diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h -index 6ef19cf..9463102 100644 ---- a/include/linux/sunrpc/svc.h -+++ b/include/linux/sunrpc/svc.h -@@ -473,6 +473,7 @@ void svc_pool_map_put(void); - struct svc_serv * svc_create_pooled(struct svc_program *, unsigned int, - struct svc_serv_ops *); - int svc_set_num_threads(struct svc_serv *, struct svc_pool *, int); -+int svc_set_num_threads_sync(struct svc_serv *, struct svc_pool *, int); - int svc_pool_stats_open(struct svc_serv *serv, struct file *file); - void svc_destroy(struct svc_serv *); - void svc_shutdown_net(struct svc_serv *, struct net *); -diff --git a/net/sunrpc/svc.c b/net/sunrpc/svc.c -index 98dc33a..bc0f5a0 100644 ---- a/net/sunrpc/svc.c -+++ b/net/sunrpc/svc.c -@@ -795,6 +795,44 @@ svc_set_num_threads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) - } - EXPORT_SYMBOL_GPL(svc_set_num_threads); - -+/* destroy old threads */ -+static int -+svc_stop_kthreads(struct svc_serv *serv, struct svc_pool *pool, int nrservs) -+{ -+ struct task_struct *task; -+ unsigned int state = serv->sv_nrthreads-1; -+ -+ /* destroy old threads */ -+ do { -+ task = choose_victim(serv, pool, &state); -+ if (task == NULL) -+ break; -+ kthread_stop(task); -+ nrservs++; -+ } while (nrservs < 0); -+ return 0; -+} -+ -+int -+svc_set_num_threads_sync(struct svc_serv *serv, struct svc_pool *pool, int nrservs) -+{ -+ if (pool == NULL) { -+ /* The -1 assumes caller has done a svc_get() */ -+ nrservs -= (serv->sv_nrthreads-1); -+ } else { -+ spin_lock_bh(&pool->sp_lock); -+ nrservs -= pool->sp_nrthreads; -+ spin_unlock_bh(&pool->sp_lock); -+ } -+ -+ if (nrservs > 0) -+ return svc_start_kthreads(serv, pool, nrservs); -+ if (nrservs < 0) -+ return svc_stop_kthreads(serv, pool, nrservs); -+ return 0; -+} -+EXPORT_SYMBOL_GPL(svc_set_num_threads_sync); -+ - /* - * Called from a server thread as it's exiting. Caller must hold the "service - * mutex" for the service. --- -2.9.4 - diff --git a/0002-mfd-Add-Cherry-Trail-Whiskey-Cove-PMIC-driver.patch b/0002-mfd-Add-Cherry-Trail-Whiskey-Cove-PMIC-driver.patch new file mode 100644 index 0000000..4997581 --- /dev/null +++ b/0002-mfd-Add-Cherry-Trail-Whiskey-Cove-PMIC-driver.patch @@ -0,0 +1,355 @@ +From c0f9254fdd0703ade018b2ff3a8cca433f781a11 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 26 Feb 2017 21:07:29 +0100 +Subject: [PATCH 02/16] mfd: Add Cherry Trail Whiskey Cove PMIC driver + +Add mfd driver for Intel CHT Whiskey Cove PMIC, based on various non +upstreamed CHT Whiskey Cove PMIC patches. + +This is a somewhat minimal version which adds irqchip support and cells +for: ACPI PMIC opregion support, the i2c-controller driving the external +charger irc and the pwrsrc/extcon block. + +Further cells can be added in the future if/when drivers are upstreamed +for them. + +Cc: Bin Gao +Cc: Felipe Balbi +Cc: Andy Shevchenko +Signed-off-by: Hans de Goede +Reviewed-by: Andy Shevchenko +--- +Changes in v2: +-Since this uses plain mfd and not the intel_soc_pmic stuff give it + its own Kconfig and allow this to be built as a module +-Add missing #include + +Changes in v3: +-Drop #include again, not the right fix for the build errors +-Error out when the upper byte of the register-address passed to the regmap + functions is 0 rather then hardcoding an address in that case +-Various minor style tweaks / cleanups +-Move defines of regulator register addresses to intel_pmic_chtwc.c, + it is the only place where they are used +-Drop now empty include/linux/mfd/intel_chtwc.h +-Rename intel_soc_pmic_chtwc.c to intel_cht_wc.c to match Kconfig option name +-Add irqchip support +-Add external charger cell +-Add pwrsrc cell + +Changes in v4: +-Use PLATFORM_DEVID_NONE + +Changes in v5: +-Change Kconfig option from tristate to boolean and add a select for the + i2c-bus driver, this is necessary because the chtwc PMIC provides an ACPI + OPRegion handler, which must be available before other drivers using it + are loaded, which can only be ensured if the mfd, opregion and i2c-bus + drivers are built in. This fixes errors like these during boot: + mmc0: SDHCI controller on ACPI [80860F14:00] using ADMA + ACPI Error: No handler for Region [REGS] (ffff93543b0cc3a8) [UserDefinedRegion] (20170119/evregion-166) + ACPI Error: Region UserDefinedRegion (ID=143) has no handler (20170119/exfldio-299) + ACPI Error: Method parse/execution failed [\_SB.PCI0.I2C7.PMI5.GET] (Node ffff93543b0cde10), AE_NOT_EXIST (20170119/psparse-543) + ACPI Error: Method parse/execution failed [\_SB.PCI0.SHC1._PS0] (Node ffff93543b0b5cd0), AE_NOT_EXIST (20170119/psparse-543) + acpi 80860F14:02: Failed to change power state to D0 +-Some minor style and capitalization fixes from review by Lee Jones + +Changes in v6: +-Fix Kconfig depends and selects to fix warning reported by kbuild test robot + +Changes in v7: +-Add explanation why this is a bool and why it selects i2c-designwaree + to the help text rather then as comments in the Kconfig + +Changes in v8: +-Remove MODULE macros, etc. now that this driver is a bool in Kconfig + +Changes in v9: +-Some whitespace tweaks +-Return -EINVAL from probe on invalid irq +-Use probe_new i2c_driver callback +--- + drivers/mfd/Kconfig | 16 +++ + drivers/mfd/Makefile | 1 + + drivers/mfd/intel_soc_pmic_chtwc.c | 230 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 247 insertions(+) + create mode 100644 drivers/mfd/intel_soc_pmic_chtwc.c + +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index 3eb5c93595f6..5203a86b8f6c 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -470,6 +470,22 @@ config INTEL_SOC_PMIC_BXTWC + thermal, charger and related power management functions + on these systems. + ++config INTEL_SOC_PMIC_CHTWC ++ bool "Support for Intel Cherry Trail Whiskey Cove PMIC" ++ depends on ACPI && HAS_IOMEM && I2C=y && COMMON_CLK ++ depends on X86 || COMPILE_TEST ++ select MFD_CORE ++ select REGMAP_I2C ++ select REGMAP_IRQ ++ select I2C_DESIGNWARE_PLATFORM ++ help ++ Select this option to enable support for the Intel Cherry Trail ++ Whiskey Cove PMIC found on some Intel Cherry Trail systems. ++ ++ This option is a bool as it provides an ACPI OpRegion which must be ++ available before any devices using it are probed. This option also ++ causes the designware-i2c driver to be builtin for the same reason. ++ + config MFD_INTEL_LPSS + tristate + select COMMON_CLK +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index c16bf1ea0ea9..6f6aed8cfccc 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -214,6 +214,7 @@ obj-$(CONFIG_MFD_SKY81452) += sky81452.o + intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o + obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o + obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o ++obj-$(CONFIG_INTEL_SOC_PMIC_CHTWC) += intel_soc_pmic_chtwc.o + obj-$(CONFIG_MFD_MT6397) += mt6397-core.o + + obj-$(CONFIG_MFD_ALTERA_A10SR) += altera-a10sr.o +diff --git a/drivers/mfd/intel_soc_pmic_chtwc.c b/drivers/mfd/intel_soc_pmic_chtwc.c +new file mode 100644 +index 000000000000..b35da01d5bcf +--- /dev/null ++++ b/drivers/mfd/intel_soc_pmic_chtwc.c +@@ -0,0 +1,230 @@ ++/* ++ * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC ++ * ++ * Copyright (C) 2017 Hans de Goede ++ * ++ * Based on various non upstream patches to support the CHT Whiskey Cove PMIC: ++ * Copyright (C) 2013-2015 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* PMIC device registers */ ++#define REG_OFFSET_MASK GENMASK(7, 0) ++#define REG_ADDR_MASK GENMASK(15, 8) ++#define REG_ADDR_SHIFT 8 ++ ++#define CHT_WC_IRQLVL1 0x6e02 ++#define CHT_WC_IRQLVL1_MASK 0x6e0e ++ ++/* Whiskey Cove PMIC share same ACPI ID between different platforms */ ++#define CHT_WC_HRV 3 ++ ++/* Level 1 IRQs (level 2 IRQs are handled in the child device drivers) */ ++enum { ++ CHT_WC_PWRSRC_IRQ = 0, ++ CHT_WC_THRM_IRQ, ++ CHT_WC_BCU_IRQ, ++ CHT_WC_ADC_IRQ, ++ CHT_WC_EXT_CHGR_IRQ, ++ CHT_WC_GPIO_IRQ, ++ /* There is no irq 6 */ ++ CHT_WC_CRIT_IRQ = 7, ++}; ++ ++static struct resource cht_wc_pwrsrc_resources[] = { ++ DEFINE_RES_IRQ(CHT_WC_PWRSRC_IRQ), ++}; ++ ++static struct resource cht_wc_ext_charger_resources[] = { ++ DEFINE_RES_IRQ(CHT_WC_EXT_CHGR_IRQ), ++}; ++ ++static struct mfd_cell cht_wc_dev[] = { ++ { ++ .name = "cht_wcove_pwrsrc", ++ .num_resources = ARRAY_SIZE(cht_wc_pwrsrc_resources), ++ .resources = cht_wc_pwrsrc_resources, ++ }, { ++ .name = "cht_wcove_ext_chgr", ++ .num_resources = ARRAY_SIZE(cht_wc_ext_charger_resources), ++ .resources = cht_wc_ext_charger_resources, ++ }, ++ { .name = "cht_wcove_region", }, ++}; ++ ++/* ++ * The CHT Whiskey Cove covers multiple I2C addresses, with a 1 Byte ++ * register address space per I2C address, so we use 16 bit register ++ * addresses where the high 8 bits contain the I2C client address. ++ */ ++static int cht_wc_byte_reg_read(void *context, unsigned int reg, ++ unsigned int *val) ++{ ++ struct i2c_client *client = context; ++ int ret, orig_addr = client->addr; ++ ++ if (!(reg & REG_ADDR_MASK)) { ++ dev_err(&client->dev, "Error I2C address not specified\n"); ++ return -EINVAL; ++ } ++ ++ client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT; ++ ret = i2c_smbus_read_byte_data(client, reg & REG_OFFSET_MASK); ++ client->addr = orig_addr; ++ ++ if (ret < 0) ++ return ret; ++ ++ *val = ret; ++ return 0; ++} ++ ++static int cht_wc_byte_reg_write(void *context, unsigned int reg, ++ unsigned int val) ++{ ++ struct i2c_client *client = context; ++ int ret, orig_addr = client->addr; ++ ++ if (!(reg & REG_ADDR_MASK)) { ++ dev_err(&client->dev, "Error I2C address not specified\n"); ++ return -EINVAL; ++ } ++ ++ client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT; ++ ret = i2c_smbus_write_byte_data(client, reg & REG_OFFSET_MASK, val); ++ client->addr = orig_addr; ++ ++ return ret; ++} ++ ++static const struct regmap_config cht_wc_regmap_cfg = { ++ .reg_bits = 16, ++ .val_bits = 8, ++ .reg_write = cht_wc_byte_reg_write, ++ .reg_read = cht_wc_byte_reg_read, ++}; ++ ++static const struct regmap_irq cht_wc_regmap_irqs[] = { ++ REGMAP_IRQ_REG(CHT_WC_PWRSRC_IRQ, 0, BIT(CHT_WC_PWRSRC_IRQ)), ++ REGMAP_IRQ_REG(CHT_WC_THRM_IRQ, 0, BIT(CHT_WC_THRM_IRQ)), ++ REGMAP_IRQ_REG(CHT_WC_BCU_IRQ, 0, BIT(CHT_WC_BCU_IRQ)), ++ REGMAP_IRQ_REG(CHT_WC_ADC_IRQ, 0, BIT(CHT_WC_ADC_IRQ)), ++ REGMAP_IRQ_REG(CHT_WC_EXT_CHGR_IRQ, 0, BIT(CHT_WC_EXT_CHGR_IRQ)), ++ REGMAP_IRQ_REG(CHT_WC_GPIO_IRQ, 0, BIT(CHT_WC_GPIO_IRQ)), ++ REGMAP_IRQ_REG(CHT_WC_CRIT_IRQ, 0, BIT(CHT_WC_CRIT_IRQ)), ++}; ++ ++static const struct regmap_irq_chip cht_wc_regmap_irq_chip = { ++ .name = "cht_wc_irq_chip", ++ .status_base = CHT_WC_IRQLVL1, ++ .mask_base = CHT_WC_IRQLVL1_MASK, ++ .irqs = cht_wc_regmap_irqs, ++ .num_irqs = ARRAY_SIZE(cht_wc_regmap_irqs), ++ .num_regs = 1, ++}; ++ ++static int cht_wc_probe(struct i2c_client *client) ++{ ++ struct device *dev = &client->dev; ++ struct intel_soc_pmic *pmic; ++ acpi_status status; ++ unsigned long long hrv; ++ int ret; ++ ++ status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv); ++ if (ACPI_FAILURE(status)) { ++ dev_err(dev, "Failed to get PMIC hardware revision\n"); ++ return -ENODEV; ++ } ++ if (hrv != CHT_WC_HRV) { ++ dev_err(dev, "Invalid PMIC hardware revision: %llu\n", hrv); ++ return -ENODEV; ++ } ++ if (client->irq < 0) { ++ dev_err(dev, "Invalid IRQ\n"); ++ return -EINVAL; ++ } ++ ++ pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); ++ if (!pmic) ++ return -ENOMEM; ++ ++ pmic->irq = client->irq; ++ pmic->dev = dev; ++ i2c_set_clientdata(client, pmic); ++ ++ pmic->regmap = devm_regmap_init(dev, NULL, client, &cht_wc_regmap_cfg); ++ if (IS_ERR(pmic->regmap)) ++ return PTR_ERR(pmic->regmap); ++ ++ ret = devm_regmap_add_irq_chip(dev, pmic->regmap, pmic->irq, ++ IRQF_ONESHOT | IRQF_SHARED, 0, ++ &cht_wc_regmap_irq_chip, ++ &pmic->irq_chip_data); ++ if (ret) ++ return ret; ++ ++ return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, ++ cht_wc_dev, ARRAY_SIZE(cht_wc_dev), NULL, 0, ++ regmap_irq_get_domain(pmic->irq_chip_data)); ++} ++ ++static void cht_wc_shutdown(struct i2c_client *client) ++{ ++ struct intel_soc_pmic *pmic = i2c_get_clientdata(client); ++ ++ disable_irq(pmic->irq); ++} ++ ++static int __maybe_unused cht_wc_suspend(struct device *dev) ++{ ++ struct intel_soc_pmic *pmic = dev_get_drvdata(dev); ++ ++ disable_irq(pmic->irq); ++ ++ return 0; ++} ++ ++static int __maybe_unused cht_wc_resume(struct device *dev) ++{ ++ struct intel_soc_pmic *pmic = dev_get_drvdata(dev); ++ ++ enable_irq(pmic->irq); ++ ++ return 0; ++} ++static SIMPLE_DEV_PM_OPS(cht_wc_pm_ops, cht_wc_suspend, cht_wc_resume); ++ ++static const struct i2c_device_id cht_wc_i2c_id[] = { ++ { } ++}; ++ ++static const struct acpi_device_id cht_wc_acpi_ids[] = { ++ { "INT34D3", }, ++ { } ++}; ++ ++static struct i2c_driver cht_wc_driver = { ++ .driver = { ++ .name = "CHT Whiskey Cove PMIC", ++ .pm = &cht_wc_pm_ops, ++ .acpi_match_table = cht_wc_acpi_ids, ++ }, ++ .probe_new = cht_wc_probe, ++ .shutdown = cht_wc_shutdown, ++ .id_table = cht_wc_i2c_id, ++}; ++builtin_i2c_driver(cht_wc_driver); +-- +2.13.0 + diff --git a/0002-platform-x86-thinkpad_acpi-add-mapping-for-new-hotke.patch b/0002-platform-x86-thinkpad_acpi-add-mapping-for-new-hotke.patch deleted file mode 100644 index 2c9bcbb..0000000 --- a/0002-platform-x86-thinkpad_acpi-add-mapping-for-new-hotke.patch +++ /dev/null @@ -1,158 +0,0 @@ -From 82e71b57b1b4347126b1ffd7b2beed2bc8b795bd Mon Sep 17 00:00:00 2001 -From: Christian Kellner -Date: Tue, 28 Feb 2017 17:10:57 +0100 -Subject: [PATCH 2/2] platform/x86: thinkpad_acpi: add mapping for new hotkeys - -The T470, X270 emits new hkey events in the 0x1311 - 0x1315 range. -According to the user manual they should launch a user selected -favorite application (star icon, 0x1311), snipping tool (0x1312, -currently ignored), enable/disable bluetooth (0x1314) and open they -keyboard settings (0x1315). - -The third nibble (0xf00) is used to differentiate between the original -hotkeys, the adaptive keyboard codes and the new, additional ones. - -Signed-off-by: Christian Kellner -Reviewed-by: Hans de Goede -Acked-by: Henrique de Moraes Holschuh -Signed-off-by: Andy Shevchenko ---- - drivers/platform/x86/thinkpad_acpi.c | 91 +++++++++++++++++++++++++++++++----- - 1 file changed, 79 insertions(+), 12 deletions(-) - -diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c -index e2b962f..7b6cb0c 100644 ---- a/drivers/platform/x86/thinkpad_acpi.c -+++ b/drivers/platform/x86/thinkpad_acpi.c -@@ -1945,6 +1945,15 @@ enum { /* hot key scan codes (derived from ACPI DSDT) */ - TP_ACPI_HOTKEYSCAN_CAMERA_MODE, - TP_ACPI_HOTKEYSCAN_ROTATE_DISPLAY, - -+ /* Lenovo extended keymap, starting at 0x1300 */ -+ TP_ACPI_HOTKEYSCAN_EXTENDED_START, -+ /* first new observed key (star, favorites) is 0x1311 */ -+ TP_ACPI_HOTKEYSCAN_STAR = 69, -+ TP_ACPI_HOTKEYSCAN_CLIPPING_TOOL2, -+ TP_ACPI_HOTKEYSCAN_UNK25, -+ TP_ACPI_HOTKEYSCAN_BLUETOOTH, -+ TP_ACPI_HOTKEYSCAN_KEYBOARD, -+ - /* Hotkey keymap size */ - TPACPI_HOTKEY_MAP_LEN - }; -@@ -3252,6 +3261,15 @@ static int __init hotkey_init(struct ibm_init_struct *iibm) - KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, - KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, - KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ -+ /* No assignment, used for newer Lenovo models */ -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN -+ - }, - - /* Generic keymap for Lenovo ThinkPads */ -@@ -3337,6 +3355,29 @@ static int __init hotkey_init(struct ibm_init_struct *iibm) - KEY_RESERVED, /* Microphone cancellation */ - KEY_RESERVED, /* Camera mode */ - KEY_RESERVED, /* Rotate display, 0x116 */ -+ -+ /* -+ * These are found in 2017 models (e.g. T470s, X270). -+ * The lowest known value is 0x311, which according to -+ * the manual should launch a user defined favorite -+ * application. -+ * -+ * The offset for these is TP_ACPI_HOTKEYSCAN_EXTENDED_START, -+ * corresponding to 0x34. -+ */ -+ -+ /* (assignments unknown, please report if found) */ -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN, -+ KEY_UNKNOWN, -+ -+ KEY_FAVORITES, /* Favorite app, 0x311 */ -+ KEY_RESERVED, /* Clipping tool */ -+ KEY_RESERVED, -+ KEY_BLUETOOTH, /* Bluetooth */ -+ KEY_KEYBOARD /* Keyboard, 0x315 */ - }, - }; - -@@ -3747,8 +3788,9 @@ static bool adaptive_keyboard_hotkey_notify_hotkey(unsigned int scancode) - - default: - if (scancode < FIRST_ADAPTIVE_KEY || -- scancode >= FIRST_ADAPTIVE_KEY + TPACPI_HOTKEY_MAP_LEN - -- TP_ACPI_HOTKEYSCAN_ADAPTIVE_START) { -+ scancode >= FIRST_ADAPTIVE_KEY + -+ TP_ACPI_HOTKEYSCAN_EXTENDED_START - -+ TP_ACPI_HOTKEYSCAN_ADAPTIVE_START) { - pr_info("Unhandled adaptive keyboard key: 0x%x\n", - scancode); - return false; -@@ -3779,19 +3821,44 @@ static bool hotkey_notify_hotkey(const u32 hkey, - *send_acpi_ev = true; - *ignore_acpi_ev = false; - -- /* HKEY event 0x1001 is scancode 0x00 */ -- if (scancode > 0 && scancode <= TP_ACPI_HOTKEYSCAN_ADAPTIVE_START) { -- scancode--; -- if (!(hotkey_source_mask & (1 << scancode))) { -- tpacpi_input_send_key_masked(scancode); -- *send_acpi_ev = false; -- } else { -- *ignore_acpi_ev = true; -+ /* -+ * Original events are in the 0x10XX range, the adaptive keyboard -+ * found in 2014 X1 Carbon emits events are of 0x11XX. In 2017 -+ * models, additional keys are emitted through 0x13XX. -+ */ -+ switch ((hkey >> 8) & 0xf) { -+ case 0: -+ if (scancode > 0 && -+ scancode <= TP_ACPI_HOTKEYSCAN_ADAPTIVE_START) { -+ /* HKEY event 0x1001 is scancode 0x00 */ -+ scancode--; -+ if (!(hotkey_source_mask & (1 << scancode))) { -+ tpacpi_input_send_key_masked(scancode); -+ *send_acpi_ev = false; -+ } else { -+ *ignore_acpi_ev = true; -+ } -+ return true; - } -- return true; -- } else { -+ break; -+ -+ case 1: - return adaptive_keyboard_hotkey_notify_hotkey(scancode); -+ -+ case 3: -+ /* Extended keycodes start at 0x300 and our offset into the map -+ * TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode -+ * will be positive, but might not be in the correct range. -+ */ -+ scancode -= (0x300 - TP_ACPI_HOTKEYSCAN_EXTENDED_START); -+ if (scancode >= TP_ACPI_HOTKEYSCAN_EXTENDED_START && -+ scancode < TPACPI_HOTKEY_MAP_LEN) { -+ tpacpi_input_send_key(scancode); -+ return true; -+ } -+ break; - } -+ - return false; - } - --- -2.9.4 - diff --git a/0003-power-supply-core-Add-support-for-supplied-from-devi.patch b/0003-power-supply-core-Add-support-for-supplied-from-devi.patch new file mode 100644 index 0000000..ab646e2 --- /dev/null +++ b/0003-power-supply-core-Add-support-for-supplied-from-devi.patch @@ -0,0 +1,57 @@ +From 69dd0606a0d8680fe0a5e9b959f6662e582e1674 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 2 May 2017 13:43:34 +0200 +Subject: [PATCH 03/16] power: supply: core: Add support for supplied-from + device-property + +On devicetree using platforms the devicetree can provide info on which +power-supplies supply another power-supply through phandles. + +This commit adds support for providing this info on non devicetree +platforms through the platform code setting a supplied-from +device-property on the power-supplies parent device. + +Signed-off-by: Hans de Goede +--- + drivers/power/supply/power_supply_core.c | 24 +++++++++++++++++++++++- + 1 file changed, 23 insertions(+), 1 deletion(-) + +diff --git a/drivers/power/supply/power_supply_core.c b/drivers/power/supply/power_supply_core.c +index 7ec7c7c202bd..0c09144193a6 100644 +--- a/drivers/power/supply/power_supply_core.c ++++ b/drivers/power/supply/power_supply_core.c +@@ -274,8 +274,30 @@ static int power_supply_check_supplies(struct power_supply *psy) + return power_supply_populate_supplied_from(psy); + } + #else +-static inline int power_supply_check_supplies(struct power_supply *psy) ++static int power_supply_check_supplies(struct power_supply *psy) + { ++ int nval, ret; ++ ++ if (!psy->dev.parent) ++ return 0; ++ ++ nval = device_property_read_string_array(psy->dev.parent, ++ "supplied-from", NULL, 0); ++ if (nval <= 0) ++ return 0; ++ ++ psy->supplied_from = devm_kmalloc_array(&psy->dev, nval, ++ sizeof(char *), GFP_KERNEL); ++ if (!psy->supplied_from) ++ return -ENOMEM; ++ ++ ret = device_property_read_string_array(psy->dev.parent, ++ "supplied-from", (const char **)psy->supplied_from, nval); ++ if (ret < 0) ++ return ret; ++ ++ psy->num_supplies = nval; ++ + return 0; + } + #endif +-- +2.13.0 + diff --git a/0004-platform-x86-intel_cht_int33fe-Set-supplied-from-pro.patch b/0004-platform-x86-intel_cht_int33fe-Set-supplied-from-pro.patch new file mode 100644 index 0000000..342a48c --- /dev/null +++ b/0004-platform-x86-intel_cht_int33fe-Set-supplied-from-pro.patch @@ -0,0 +1,48 @@ +From 99c44df299d96db6a170ccce9b8108fc2e7f8bae Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 2 May 2017 13:40:44 +0200 +Subject: [PATCH 04/16] platform/x86: intel_cht_int33fe: Set supplied-from + property on max17047 dev + +Devices with the intel_cht_int33fe ACPI device use a max17047 fuel-gauge +combined with a bq24272i charger, in order for the fuel-gauge driver to +correctly display charging / discharging status it needs to know which +charger is supplying the battery. + +This commit sets the supplied-from device property to the name of the +bq24272i charger for this. + +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/intel_cht_int33fe.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/platform/x86/intel_cht_int33fe.c b/drivers/platform/x86/intel_cht_int33fe.c +index 6a1b2ca5b6fe..da706e2c4232 100644 +--- a/drivers/platform/x86/intel_cht_int33fe.c ++++ b/drivers/platform/x86/intel_cht_int33fe.c +@@ -34,6 +34,13 @@ struct cht_int33fe_data { + struct i2c_client *pi3usb30532; + }; + ++static const char * const max17047_suppliers[] = { "bq24190-charger" }; ++ ++static const struct property_entry max17047_props[] = { ++ PROPERTY_ENTRY_STRING_ARRAY("supplied-from", max17047_suppliers), ++ { } ++}; ++ + static int cht_int33fe_probe(struct i2c_client *client) + { + struct device *dev = &client->dev; +@@ -70,6 +77,7 @@ static int cht_int33fe_probe(struct i2c_client *client) + + memset(&board_info, 0, sizeof(board_info)); + strlcpy(board_info.type, "max17047", I2C_NAME_SIZE); ++ board_info.properties = max17047_props; + + data->max17047 = i2c_acpi_new_device(dev, 1, &board_info); + if (!data->max17047) +-- +2.13.0 + diff --git a/0005-ACPI-PMIC-xpower-Add-support-for-the-GPI1-regulator-.patch b/0005-ACPI-PMIC-xpower-Add-support-for-the-GPI1-regulator-.patch new file mode 100644 index 0000000..c6f299c --- /dev/null +++ b/0005-ACPI-PMIC-xpower-Add-support-for-the-GPI1-regulator-.patch @@ -0,0 +1,80 @@ +From cc2b0e2c164d02ab42efa736f91f53baf8d8bc36 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Thu, 20 Apr 2017 22:41:20 +0200 +Subject: [PATCH 05/16] ACPI / PMIC: xpower: Add support for the GPI1 regulator + to the OpRegion handler + +Some Bay Trail devices use a GPI1 regulator field (address 0x4c) in +their 0x8d power OpRegion, add support for this. + +This fixes AE_BAD_PARAMETER errors getting thrown on these devices and +fixes these errors causing these devices to not suspend. + +Signed-off-by: Hans de Goede +Reviewed-by: Andy Shevchenko +--- +Changes in v2: +-Simplify reg == 0x92 handling (suggested by Andy Shevchenko) +-Add special handling for reg == 0x92 to intel_xpower_pmic_get_power() too +Changes in v3: +-Use defines for GPI1 reg and bits, rather then hardcoded hex values +--- + drivers/acpi/pmic/intel_pmic_xpower.c | 21 ++++++++++++++++++++- + 1 file changed, 20 insertions(+), 1 deletion(-) + +diff --git a/drivers/acpi/pmic/intel_pmic_xpower.c b/drivers/acpi/pmic/intel_pmic_xpower.c +index 1a76c784cd4c..3b7d5be5b7ed 100644 +--- a/drivers/acpi/pmic/intel_pmic_xpower.c ++++ b/drivers/acpi/pmic/intel_pmic_xpower.c +@@ -21,6 +21,11 @@ + #include "intel_pmic.h" + + #define XPOWER_GPADC_LOW 0x5b ++#define XPOWER_GPI1_CTRL 0x92 ++ ++#define GPI1_LDO_MASK GENMASK(2, 0) ++#define GPI1_LDO_ON (3 << 0) ++#define GPI1_LDO_OFF (4 << 0) + + static struct pmic_table power_table[] = { + { +@@ -118,6 +123,10 @@ static struct pmic_table power_table[] = { + .reg = 0x10, + .bit = 0x00 + }, /* BUC6 */ ++ { ++ .address = 0x4c, ++ .reg = 0x92, ++ }, /* GPI1 */ + }; + + /* TMP0 - TMP5 are the same, all from GPADC */ +@@ -156,7 +165,12 @@ static int intel_xpower_pmic_get_power(struct regmap *regmap, int reg, + if (regmap_read(regmap, reg, &data)) + return -EIO; + +- *value = (data & BIT(bit)) ? 1 : 0; ++ /* GPIO1 LDO regulator needs special handling */ ++ if (reg == XPOWER_GPI1_CTRL) ++ *value = ((data & GPI1_LDO_MASK) == GPI1_LDO_ON); ++ else ++ *value = (data & BIT(bit)) ? 1 : 0; ++ + return 0; + } + +@@ -165,6 +179,11 @@ static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg, + { + int data; + ++ /* GPIO1 LDO regulator needs special handling */ ++ if (reg == XPOWER_GPI1_CTRL) ++ return regmap_update_bits(regmap, reg, GPI1_LDO_MASK, ++ on ? GPI1_LDO_ON : GPI1_LDO_OFF); ++ + if (regmap_read(regmap, reg, &data)) + return -EIO; + +-- +2.13.0 + diff --git a/0006-Input-axp20x-pek-Add-wakeup-support.patch b/0006-Input-axp20x-pek-Add-wakeup-support.patch new file mode 100644 index 0000000..1ec9659 --- /dev/null +++ b/0006-Input-axp20x-pek-Add-wakeup-support.patch @@ -0,0 +1,67 @@ +From fbac4c05ec1d7c2d949f50baf1e934cbfbb6a494 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Mon, 17 Apr 2017 22:06:25 +0200 +Subject: [PATCH 06/16] Input: axp20x-pek - Add wakeup support + +At least on devices with the AXP288 PMIC the device is expected to +wakeup from suspend when the power-button gets pressed, add support +for this. + +Signed-off-by: Hans de Goede +--- + drivers/input/misc/axp20x-pek.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/drivers/input/misc/axp20x-pek.c b/drivers/input/misc/axp20x-pek.c +index 400869e61a06..5f16fceaae83 100644 +--- a/drivers/input/misc/axp20x-pek.c ++++ b/drivers/input/misc/axp20x-pek.c +@@ -253,6 +253,9 @@ static int axp20x_pek_probe_input_device(struct axp20x_pek *axp20x_pek, + return error; + } + ++ if (axp20x_pek->axp20x->variant == AXP288_ID) ++ enable_irq_wake(axp20x_pek->irq_dbr); ++ + return 0; + } + +@@ -331,10 +334,35 @@ static int axp20x_pek_probe(struct platform_device *pdev) + return 0; + } + ++static int __maybe_unused axp20x_pek_resume_noirq(struct device *dev) ++{ ++ struct axp20x_pek *axp20x_pek = dev_get_drvdata(dev); ++ ++ if (axp20x_pek->axp20x->variant != AXP288_ID) ++ return 0; ++ ++ /* ++ * Clear interrupts from button presses during suspend, to avoid ++ * a wakeup power-button press getting reported to userspace. ++ */ ++ regmap_write(axp20x_pek->axp20x->regmap, ++ AXP20X_IRQ1_STATE + AXP288_IRQ_POKN / 8, ++ BIT(AXP288_IRQ_POKN % 8)); ++ ++ return 0; ++} ++ ++const struct dev_pm_ops axp20x_pek_pm_ops = { ++#ifdef CONFIG_PM_SLEEP ++ .resume_noirq = axp20x_pek_resume_noirq, ++#endif ++}; ++ + static struct platform_driver axp20x_pek_driver = { + .probe = axp20x_pek_probe, + .driver = { + .name = "axp20x-pek", ++ .pm = &axp20x_pek_pm_ops, + }, + }; + module_platform_driver(axp20x_pek_driver); +-- +2.13.0 + diff --git a/0007-platform-x86-silead_dmi-Add-touchscreen-info-for-GP-.patch b/0007-platform-x86-silead_dmi-Add-touchscreen-info-for-GP-.patch new file mode 100644 index 0000000..0b76334 --- /dev/null +++ b/0007-platform-x86-silead_dmi-Add-touchscreen-info-for-GP-.patch @@ -0,0 +1,56 @@ +From d95c127c48ef784214671359a41ac505ac30098a Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 7 May 2017 12:32:11 +0200 +Subject: [PATCH 07/16] platform/x86: silead_dmi: Add touchscreen info for + GP-electronic T701 + +Add touchscreen info for the GP-electronic T701 tablet. + +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/silead_dmi.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platform/x86/silead_dmi.c +index a3a57d93cf06..db3a877d2160 100644 +--- a/drivers/platform/x86/silead_dmi.c ++++ b/drivers/platform/x86/silead_dmi.c +@@ -80,6 +80,19 @@ static const struct silead_ts_dmi_data surftab_wintron70_st70416_6_data = { + .properties = surftab_wintron70_st70416_6_props, + }; + ++static const struct property_entry gp_electronic_t701_props[] = { ++ PROPERTY_ENTRY_U32("touchscreen-size-x", 960), ++ PROPERTY_ENTRY_U32("touchscreen-size-y", 640), ++ PROPERTY_ENTRY_STRING("firmware-name", ++ "gsl1680-gp-electronic-t701.fw"), ++ { } ++}; ++ ++static const struct silead_ts_dmi_data gp_electronic_t701_data = { ++ .acpi_name = "MSSL1680:00", ++ .properties = gp_electronic_t701_props, ++}; ++ + static const struct dmi_system_id silead_ts_dmi_table[] = { + { + /* CUBE iwork8 Air */ +@@ -117,6 +130,15 @@ static const struct dmi_system_id silead_ts_dmi_table[] = { + DMI_MATCH(DMI_BIOS_VERSION, "TREK.G.WI71C.JGBMRBA04"), + }, + }, ++ { ++ /* GP-electronic T701 */ ++ .driver_data = (void *)&gp_electronic_t701_data, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Insyde"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "T701"), ++ DMI_MATCH(DMI_BIOS_VERSION, "BYT70A.YNCHENG.WIN.007"), ++ }, ++ }, + { }, + }; + +-- +2.13.0 + diff --git a/0008-platform-x86-silead_dmi-Add-touchscreen-info-for-PoV.patch b/0008-platform-x86-silead_dmi-Add-touchscreen-info-for-PoV.patch new file mode 100644 index 0000000..975deb8 --- /dev/null +++ b/0008-platform-x86-silead_dmi-Add-touchscreen-info-for-PoV.patch @@ -0,0 +1,59 @@ +From 55b347c61b2850d1e11e159ab02dc71f13b06481 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 11 Jun 2017 17:42:31 +0200 +Subject: [PATCH 08/16] platform/x86: silead_dmi: Add touchscreen info for PoV + mobii wintab p800w + +Add touchscreen info for the Point of View mobii wintab p800w tablet. + +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/silead_dmi.c | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platform/x86/silead_dmi.c +index db3a877d2160..46c5e1ebfb53 100644 +--- a/drivers/platform/x86/silead_dmi.c ++++ b/drivers/platform/x86/silead_dmi.c +@@ -93,6 +93,20 @@ static const struct silead_ts_dmi_data gp_electronic_t701_data = { + .properties = gp_electronic_t701_props, + }; + ++static const struct property_entry pov_mobii_wintab_p800w_props[] = { ++ PROPERTY_ENTRY_U32("touchscreen-size-x", 1800), ++ PROPERTY_ENTRY_U32("touchscreen-size-y", 1150), ++ PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"), ++ PROPERTY_ENTRY_STRING("firmware-name", ++ "gsl3692-pov-mobii-wintab-p800w.fw"), ++ { } ++}; ++ ++static const struct silead_ts_dmi_data pov_mobii_wintab_p800w_data = { ++ .acpi_name = "MSSL1680:00", ++ .properties = pov_mobii_wintab_p800w_props, ++}; ++ + static const struct dmi_system_id silead_ts_dmi_table[] = { + { + /* CUBE iwork8 Air */ +@@ -139,6 +153,17 @@ static const struct dmi_system_id silead_ts_dmi_table[] = { + DMI_MATCH(DMI_BIOS_VERSION, "BYT70A.YNCHENG.WIN.007"), + }, + }, ++ { ++ /* Point of View mobii wintab p800w */ ++ .driver_data = (void *)&pov_mobii_wintab_p800w_data, ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), ++ DMI_MATCH(DMI_BOARD_NAME, "Aptio CRB"), ++ DMI_MATCH(DMI_BIOS_VERSION, "3BAIR1013"), ++ /* Above matches are too generic, add bios-date match */ ++ DMI_MATCH(DMI_BIOS_DATE, "08/22/2014"), ++ }, ++ }, + { }, + }; + +-- +2.13.0 + diff --git a/0009-platform-x86-silead_dmi-Add-touchscreen-info-for-Pip.patch b/0009-platform-x86-silead_dmi-Add-touchscreen-info-for-Pip.patch new file mode 100644 index 0000000..0770395 --- /dev/null +++ b/0009-platform-x86-silead_dmi-Add-touchscreen-info-for-Pip.patch @@ -0,0 +1,57 @@ +From b239a7a0c2a1435aa5cbab3f233e0c37e82943dd Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 13 Jun 2017 18:17:07 +0200 +Subject: [PATCH 09/16] platform/x86: silead_dmi: Add touchscreen info for Pipo + W2S tablet + +Add touchscreen info for Pipo W2S tablet. + +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/silead_dmi.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platform/x86/silead_dmi.c +index 46c5e1ebfb53..25cbea307a5e 100644 +--- a/drivers/platform/x86/silead_dmi.c ++++ b/drivers/platform/x86/silead_dmi.c +@@ -107,6 +107,21 @@ static const struct silead_ts_dmi_data pov_mobii_wintab_p800w_data = { + .properties = pov_mobii_wintab_p800w_props, + }; + ++static const struct property_entry pipo_w2s_props[] = { ++ PROPERTY_ENTRY_U32("touchscreen-size-x", 1660), ++ PROPERTY_ENTRY_U32("touchscreen-size-y", 880), ++ PROPERTY_ENTRY_BOOL("touchscreen-inverted-x"), ++ PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"), ++ PROPERTY_ENTRY_STRING("firmware-name", ++ "gsl1680-pipo-w2s.fw"), ++ { } ++}; ++ ++static const struct silead_ts_dmi_data pipo_w2s_data = { ++ .acpi_name = "MSSL1680:00", ++ .properties = pipo_w2s_props, ++}; ++ + static const struct dmi_system_id silead_ts_dmi_table[] = { + { + /* CUBE iwork8 Air */ +@@ -164,6 +179,14 @@ static const struct dmi_system_id silead_ts_dmi_table[] = { + DMI_MATCH(DMI_BIOS_DATE, "08/22/2014"), + }, + }, ++ { ++ /* Pipo W2S */ ++ .driver_data = (void *)&pipo_w2s_data, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "PIPO"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "W2S"), ++ }, ++ }, + { }, + }; + +-- +2.13.0 + diff --git a/0010-Input-silead-Add-support-for-capactive-home-button-f.patch b/0010-Input-silead-Add-support-for-capactive-home-button-f.patch new file mode 100644 index 0000000..ce9be37 --- /dev/null +++ b/0010-Input-silead-Add-support-for-capactive-home-button-f.patch @@ -0,0 +1,114 @@ +From 33fc16fd8aa3684e19b1d1f0a712593e2e570ab1 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 11 Jun 2017 21:24:50 +0200 +Subject: [PATCH 10/16] Input: silead: Add support for capactive home button + found on some x86 tablets + +On some x86 tablets with a silead touchscreen the windows logo on the +front is a capacitive home button. Touching this button results in a touch +with bits 12-15 of the Y coordinates set, while normally only the lower 12 +are used. + +Detect this and report a KEY_LEFTMETA press when this happens. Note for +now we only respond to the Y coordinate bits 12-15 containing 0x01, on some +tablets *without* a capacative button I've noticed these bits containing +0x04 when crossing the edges of the screen. + +Signed-off-by: Hans de Goede +--- + drivers/input/touchscreen/silead.c | 45 ++++++++++++++++++++++++++++---------- + 1 file changed, 34 insertions(+), 11 deletions(-) + +diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c +index 0dbcf105f7db..c0ba40c09699 100644 +--- a/drivers/input/touchscreen/silead.c ++++ b/drivers/input/touchscreen/silead.c +@@ -56,7 +56,7 @@ + #define SILEAD_POINT_Y_MSB_OFF 0x01 + #define SILEAD_POINT_X_OFF 0x02 + #define SILEAD_POINT_X_MSB_OFF 0x03 +-#define SILEAD_TOUCH_ID_MASK 0xF0 ++#define SILEAD_EXTRA_DATA_MASK 0xF0 + + #define SILEAD_CMD_SLEEP_MIN 10000 + #define SILEAD_CMD_SLEEP_MAX 20000 +@@ -109,6 +109,8 @@ static int silead_ts_request_input_dev(struct silead_ts_data *data) + INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED | + INPUT_MT_TRACK); + ++ input_set_capability(data->input, EV_KEY, KEY_LEFTMETA); ++ + data->input->name = SILEAD_TS_NAME; + data->input->phys = "input/ts"; + data->input->id.bustype = BUS_I2C; +@@ -139,7 +141,8 @@ static void silead_ts_read_data(struct i2c_client *client) + struct input_dev *input = data->input; + struct device *dev = &client->dev; + u8 *bufp, buf[SILEAD_TS_DATA_LEN]; +- int touch_nr, error, i; ++ int touch_nr, softbutton, error, i; ++ bool softbutton_pressed = false; + + error = i2c_smbus_read_i2c_block_data(client, SILEAD_REG_DATA, + SILEAD_TS_DATA_LEN, buf); +@@ -148,21 +151,40 @@ static void silead_ts_read_data(struct i2c_client *client) + return; + } + +- touch_nr = buf[0]; +- if (touch_nr > data->max_fingers) { ++ if (buf[0] > data->max_fingers) { + dev_warn(dev, "More touches reported then supported %d > %d\n", +- touch_nr, data->max_fingers); +- touch_nr = data->max_fingers; ++ buf[0], data->max_fingers); ++ buf[0] = data->max_fingers; + } + ++ touch_nr = 0; + bufp = buf + SILEAD_POINT_DATA_LEN; +- for (i = 0; i < touch_nr; i++, bufp += SILEAD_POINT_DATA_LEN) { +- /* Bits 4-7 are the touch id */ +- data->id[i] = (bufp[SILEAD_POINT_X_MSB_OFF] & +- SILEAD_TOUCH_ID_MASK) >> 4; +- touchscreen_set_mt_pos(&data->pos[i], &data->prop, ++ for (i = 0; i < buf[0]; i++, bufp += SILEAD_POINT_DATA_LEN) { ++ softbutton = (bufp[SILEAD_POINT_Y_MSB_OFF] & ++ SILEAD_EXTRA_DATA_MASK) >> 4; ++ ++ if (softbutton) { ++ /* ++ * For now only respond to softbutton == 0x01, some ++ * tablets *without* a capacative button send 0x04 ++ * when crossing the edges of the screen. ++ */ ++ if (softbutton == 0x01) ++ softbutton_pressed = true; ++ ++ continue; ++ } ++ ++ /* ++ * Bits 4-7 are the touch id, note not all models have ++ * hardware touch ids so atm we don't use these. ++ */ ++ data->id[touch_nr] = (bufp[SILEAD_POINT_X_MSB_OFF] & ++ SILEAD_EXTRA_DATA_MASK) >> 4; ++ touchscreen_set_mt_pos(&data->pos[touch_nr], &data->prop, + get_unaligned_le16(&bufp[SILEAD_POINT_X_OFF]) & 0xfff, + get_unaligned_le16(&bufp[SILEAD_POINT_Y_OFF]) & 0xfff); ++ touch_nr++; + } + + input_mt_assign_slots(input, data->slots, data->pos, touch_nr, 0); +@@ -178,6 +200,7 @@ static void silead_ts_read_data(struct i2c_client *client) + } + + input_mt_sync_frame(input); ++ input_report_key(input, KEY_LEFTMETA, softbutton_pressed); + input_sync(input); + } + +-- +2.13.0 + diff --git a/0011-Input-goodix-Add-support-for-capacitive-home-button.patch b/0011-Input-goodix-Add-support-for-capacitive-home-button.patch new file mode 100644 index 0000000..162357c --- /dev/null +++ b/0011-Input-goodix-Add-support-for-capacitive-home-button.patch @@ -0,0 +1,53 @@ +From 2a99775c336303d2efc43eab4f24b34722a28faa Mon Sep 17 00:00:00 2001 +From: "Sergei A. Trusov" +Date: Tue, 20 Jun 2017 18:08:35 +0200 +Subject: [PATCH 11/16] Input: goodix: Add support for capacitive home button + +On some x86 tablets with a Goodix touchscreen, the Windows logo on the +front is a capacitive home button. Touching this button results in a touch +with bit 4 of the first byte set, while only the lower 4 bits (0-3) are +used to indicate the number of touches. + +Report a KEY_LEFTMETA press when this happens. + +Note that the hardware might support more than one button, in which +case the "id" byte of coor_data would identify the button in question. +This is not implemented as we don't have access to hardware with +multiple buttons. + +Signed-off-by: Sergei A. Trusov +Acked-by: Bastien Nocera +--- + drivers/input/touchscreen/goodix.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c +index 240b16f3ee97..903137d9cf7d 100644 +--- a/drivers/input/touchscreen/goodix.c ++++ b/drivers/input/touchscreen/goodix.c +@@ -267,6 +267,12 @@ static void goodix_process_events(struct goodix_ts_data *ts) + if (touch_num < 0) + return; + ++ /* ++ * Bit 4 of the first byte reports the status of the capacitive ++ * Windows/Home button. ++ */ ++ input_report_key(ts->input_dev, KEY_LEFTMETA, !!(point_data[0] & BIT(4))); ++ + for (i = 0; i < touch_num; i++) + goodix_ts_report_touch(ts, + &point_data[1 + GOODIX_CONTACT_SIZE * i]); +@@ -612,6 +618,9 @@ static int goodix_request_input_dev(struct goodix_ts_data *ts) + ts->input_dev->id.product = ts->id; + ts->input_dev->id.version = ts->version; + ++ /* Capacitive Windows/Home button on some devices */ ++ input_set_capability(ts->input_dev, EV_KEY, KEY_LEFTMETA); ++ + error = input_register_device(ts->input_dev); + if (error) { + dev_err(&ts->client->dev, +-- +2.13.0 + diff --git a/0012-Input-gpio_keys-Do-not-report-wake-button-presses-as.patch b/0012-Input-gpio_keys-Do-not-report-wake-button-presses-as.patch new file mode 100644 index 0000000..9b52e39 --- /dev/null +++ b/0012-Input-gpio_keys-Do-not-report-wake-button-presses-as.patch @@ -0,0 +1,150 @@ +From 02b823a4d28ffb5fde5192799abd934d9de95630 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Fri, 6 Jan 2017 20:08:11 +0100 +Subject: [PATCH 12/16] Input: gpio_keys - Do not report wake button presses as + evdev events + +If a button is a wake button, it may still be bouncing from the press +to wakeup the device by the time the gpio interrupts get enabled again +and / or the gpio_keys_report_state call from gpio_keys_resume may +find the button still pressed and report this as a new press. + +This is undesirable, esp. since the powerbutton on tablets is typically +a wakeup source and uses the gpio_keys driver on some tablets, leading +to userspace immediately re-suspending the tablet after the powerbutton +is pressed, due to it seeing a powerbutton press. + +This commit ignores wakeup button presses for the first 1 second after +resume (and while resumed, as the workqueue may run before the resume +function runs), avoiding this problem. + +Signed-off-by: Hans de Goede +--- +Note: maybe we should make WAKE_DEBOUNCE part of gpio_keys_button and +only do this when drivers / platform-data set this to a non-zero value ? +--- + drivers/input/keyboard/gpio_keys.c | 49 ++++++++++++++++++++++++++++++++++++-- + 1 file changed, 47 insertions(+), 2 deletions(-) + +diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c +index da3d362f21b1..e1488b534e7d 100644 +--- a/drivers/input/keyboard/gpio_keys.c ++++ b/drivers/input/keyboard/gpio_keys.c +@@ -31,6 +31,8 @@ + #include + #include + ++#define WAKE_DEBOUNCE msecs_to_jiffies(1000) ++ + struct gpio_button_data { + const struct gpio_keys_button *button; + struct input_dev *input; +@@ -44,10 +46,14 @@ struct gpio_button_data { + struct delayed_work work; + unsigned int software_debounce; /* in msecs, for GPIO-driven buttons */ + ++ unsigned long resume_time; /* in jiffies, for wakeup buttons */ ++ + unsigned int irq; + spinlock_t lock; + bool disabled; + bool key_pressed; ++ bool suspended; ++ bool resume_time_valid; + }; + + struct gpio_keys_drvdata { +@@ -356,6 +362,27 @@ static struct attribute_group gpio_keys_attr_group = { + .attrs = gpio_keys_attrs, + }; + ++static bool gpio_keys_ignore_wakeup_button_press(struct gpio_button_data *bdata) ++{ ++ unsigned long flags; ++ bool ret = false; ++ ++ if (!bdata->button->wakeup) ++ return ret; ++ ++ spin_lock_irqsave(&bdata->lock, flags); ++ ++ if (bdata->suspended) ++ ret = true; /* Our resume method did not run yet */ ++ else if (bdata->resume_time_valid && ++ time_before(jiffies, bdata->resume_time + WAKE_DEBOUNCE)) ++ ret = true; /* Assume this is a wakeup press and ignore */ ++ ++ spin_unlock_irqrestore(&bdata->lock, flags); ++ ++ return ret; ++} ++ + static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata) + { + const struct gpio_keys_button *button = bdata->button; +@@ -370,6 +397,9 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata) + return; + } + ++ if (state && gpio_keys_ignore_wakeup_button_press(bdata)) ++ return; ++ + if (type == EV_ABS) { + if (state) + input_event(input, type, button->code, button->value); +@@ -429,6 +459,9 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id) + + BUG_ON(irq != bdata->irq); + ++ if (gpio_keys_ignore_wakeup_button_press(bdata)) ++ return IRQ_HANDLED; ++ + spin_lock_irqsave(&bdata->lock, flags); + + if (!bdata->key_pressed) { +@@ -848,13 +881,18 @@ static int __maybe_unused gpio_keys_suspend(struct device *dev) + { + struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev); + struct input_dev *input = ddata->input; ++ unsigned long flags; + int i; + + if (device_may_wakeup(dev)) { + for (i = 0; i < ddata->pdata->nbuttons; i++) { + struct gpio_button_data *bdata = &ddata->data[i]; +- if (bdata->button->wakeup) ++ if (bdata->button->wakeup) { ++ spin_lock_irqsave(&bdata->lock, flags); ++ bdata->suspended = true; ++ spin_unlock_irqrestore(&bdata->lock, flags); + enable_irq_wake(bdata->irq); ++ } + } + } else { + mutex_lock(&input->mutex); +@@ -870,14 +908,21 @@ static int __maybe_unused gpio_keys_resume(struct device *dev) + { + struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev); + struct input_dev *input = ddata->input; ++ unsigned long flags; + int error = 0; + int i; + + if (device_may_wakeup(dev)) { + for (i = 0; i < ddata->pdata->nbuttons; i++) { + struct gpio_button_data *bdata = &ddata->data[i]; +- if (bdata->button->wakeup) ++ if (bdata->button->wakeup) { + disable_irq_wake(bdata->irq); ++ spin_lock_irqsave(&bdata->lock, flags); ++ bdata->resume_time = jiffies; ++ bdata->resume_time_valid = true; ++ bdata->suspended = false; ++ spin_unlock_irqrestore(&bdata->lock, flags); ++ } + } + } else { + mutex_lock(&input->mutex); +-- +2.13.0 + diff --git a/0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch b/0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch new file mode 100644 index 0000000..8eb41ee --- /dev/null +++ b/0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch @@ -0,0 +1,32 @@ +From bf3e9581e10a19b2ce77a45fe001116d269b4c7f Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 18 Jun 2017 12:47:38 +0200 +Subject: [PATCH 13/16] iio: accel: bmc150: Add support for BOSC0200 ACPI + device id + +Add support for the BOSC0200 ACPI device id used on some x86 tablets. +note driver_data is not set to a specific model, driver_data is not +used anyways (instead detection is done on the chip_id reg) and the +2 tablets with a BOSC0200 ACPI device id I've have 2 different chips, +one has a BMA250E, the other a BMA222E. + +Signed-off-by: Hans de Goede +--- + drivers/iio/accel/bmc150-accel-i2c.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/iio/accel/bmc150-accel-i2c.c b/drivers/iio/accel/bmc150-accel-i2c.c +index 8ca8041267ef..f85014fbaa12 100644 +--- a/drivers/iio/accel/bmc150-accel-i2c.c ++++ b/drivers/iio/accel/bmc150-accel-i2c.c +@@ -64,6 +64,7 @@ static const struct acpi_device_id bmc150_accel_acpi_match[] = { + {"BMA250E", bma250e}, + {"BMA222E", bma222e}, + {"BMA0280", bma280}, ++ {"BOSC0200"}, + { }, + }; + MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match); +-- +2.13.0 + diff --git a/0014-mmc-sdhci-acpi-Workaround-conflict-with-PCI-wifi-on-.patch b/0014-mmc-sdhci-acpi-Workaround-conflict-with-PCI-wifi-on-.patch new file mode 100644 index 0000000..b5c717c --- /dev/null +++ b/0014-mmc-sdhci-acpi-Workaround-conflict-with-PCI-wifi-on-.patch @@ -0,0 +1,143 @@ +From 51eb7454942c68c84b82782e47637de3ba37f113 Mon Sep 17 00:00:00 2001 +From: Adrian Hunter +Date: Wed, 21 Jun 2017 15:08:39 +0300 +Subject: [PATCH 14/16] mmc: sdhci-acpi: Workaround conflict with PCI wifi on + GPD Win handheld + +GPDwin uses PCI wifi which conflicts with SDIO's use of +acpi_device_fix_up_power() on child device nodes. Specifically +acpi_device_fix_up_power() causes the wifi module to get turned off. +Identifying GPDwin is problematic, but since SDIO is only used for wifi, +the presence of the PCI wifi card in the expected slot with an ACPI +companion node, is used to indicate that acpi_device_fix_up_power() should +be avoided. + +Signed-off-by: Adrian Hunter +Acked-by: Hans de Goede +Tested-by: Hans de Goede +Cc: stable@vger.kernel.org +--- + drivers/mmc/host/sdhci-acpi.c | 70 +++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 64 insertions(+), 6 deletions(-) + +diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c +index c6a9a1bfaa22..b3fb155f50e4 100644 +--- a/drivers/mmc/host/sdhci-acpi.c ++++ b/drivers/mmc/host/sdhci-acpi.c +@@ -45,6 +45,7 @@ + #include + #include + #include ++#include + #endif + + #include "sdhci.h" +@@ -134,6 +135,16 @@ static bool sdhci_acpi_byt(void) + return x86_match_cpu(byt); + } + ++static bool sdhci_acpi_cht(void) ++{ ++ static const struct x86_cpu_id cht[] = { ++ { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, ++ {} ++ }; ++ ++ return x86_match_cpu(cht); ++} ++ + #define BYT_IOSF_SCCEP 0x63 + #define BYT_IOSF_OCP_NETCTRL0 0x1078 + #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) +@@ -178,6 +189,45 @@ static bool sdhci_acpi_byt_defer(struct device *dev) + return false; + } + ++static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device, ++ unsigned int slot, unsigned int parent_slot) ++{ ++ struct pci_dev *dev, *parent, *from = NULL; ++ ++ while (1) { ++ dev = pci_get_device(vendor, device, from); ++ pci_dev_put(from); ++ if (!dev) ++ break; ++ parent = pci_upstream_bridge(dev); ++ if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot && ++ parent && PCI_SLOT(parent->devfn) == parent_slot && ++ !pci_upstream_bridge(parent)) { ++ pci_dev_put(dev); ++ return true; ++ } ++ from = dev; ++ } ++ ++ return false; ++} ++ ++/* ++ * GPDwin uses PCI wifi which conflicts with SDIO's use of ++ * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is ++ * problematic, but since SDIO is only used for wifi, the presence of the PCI ++ * wifi card in the expected slot with an ACPI companion node, is used to ++ * indicate that acpi_device_fix_up_power() should be avoided. ++ */ ++static inline bool sdhci_acpi_no_fixup_child_power(const char *hid, ++ const char *uid) ++{ ++ return sdhci_acpi_cht() && ++ !strcmp(hid, "80860F14") && ++ !strcmp(uid, "2") && ++ sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28); ++} ++ + #else + + static inline void sdhci_acpi_byt_setting(struct device *dev) +@@ -189,6 +239,12 @@ static inline bool sdhci_acpi_byt_defer(struct device *dev) + return false; + } + ++static inline bool sdhci_acpi_no_fixup_child_power(const char *hid, ++ const char *uid) ++{ ++ return false; ++} ++ + #endif + + static int bxt_get_cd(struct mmc_host *mmc) +@@ -390,11 +446,16 @@ static int sdhci_acpi_probe(struct platform_device *pdev) + if (acpi_bus_get_device(handle, &device)) + return -ENODEV; + ++ hid = acpi_device_hid(device); ++ uid = device->pnp.unique_id; ++ + /* Power on the SDHCI controller and its children */ + acpi_device_fix_up_power(device); +- list_for_each_entry(child, &device->children, node) +- if (child->status.present && child->status.enabled) +- acpi_device_fix_up_power(child); ++ if (!sdhci_acpi_no_fixup_child_power(hid, uid)) { ++ list_for_each_entry(child, &device->children, node) ++ if (child->status.present && child->status.enabled) ++ acpi_device_fix_up_power(child); ++ } + + if (acpi_bus_get_status(device) || !device->status.present) + return -ENODEV; +@@ -402,9 +463,6 @@ static int sdhci_acpi_probe(struct platform_device *pdev) + if (sdhci_acpi_byt_defer(dev)) + return -EPROBE_DEFER; + +- hid = acpi_device_hid(device); +- uid = device->pnp.unique_id; +- + iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!iomem) + return -ENOMEM; +-- +2.13.0 + diff --git a/0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch b/0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch new file mode 100644 index 0000000..5d7497c --- /dev/null +++ b/0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch @@ -0,0 +1,410 @@ +From bd0d7169342e47919f68e75d659968f02b62f84b Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Fri, 3 Mar 2017 23:48:50 +0100 +Subject: [PATCH 15/16] i2c-cht-wc: Add Intel Cherry Trail Whiskey Cove SMBUS + controller driver + +The Intel Cherry Trail Whiskey Cove PMIC does not contain a builtin +battery charger, instead boards with this PMIC use an external TI +bq24292i charger IC, which is connected to a SMBUS controller built into +the PMIC. + +This commit adds an i2c-bus driver for the PMIC's builtin SMBUS +controller. The probe function for this i2c-bus will also register an +i2c-client for the TI bq24292i charger after the i2c-bus has been +registered. + +Note that several device-properties are set on the client-device to +tell the bq24190 power-supply driver to integrate the Whiskey Cove PMIC +and e.g. use the PMIC's BC1.2 detection (through extcon) to determine +the maximum input current. + +Cc: Andy Shevchenko +Signed-off-by: Hans de Goede +--- +Changes in v2: +-Various style (mostly captialization and variable name) fixes +-Use device-properties instead of platform_data for the i2c_board_info +--- + drivers/i2c/busses/Kconfig | 8 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-cht-wc.c | 336 ++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 345 insertions(+) + create mode 100644 drivers/i2c/busses/i2c-cht-wc.c + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index 144cbadc7c72..18c96178b177 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -187,6 +187,14 @@ config I2C_PIIX4 + This driver can also be built as a module. If so, the module + will be called i2c-piix4. + ++config I2C_CHT_WC ++ tristate "Intel Cherry Trail Whiskey Cove PMIC smbus controller" ++ depends on INTEL_SOC_PMIC_CHTWC ++ help ++ If you say yes to this option, support will be included for the ++ SMBus controller found in the Intel Cherry Trail Whiskey Cove PMIC ++ found on some Intel Cherry Trail systems. ++ + config I2C_NFORCE2 + tristate "Nvidia nForce2, nForce3 and nForce4" + depends on PCI +diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile +index 30b60855fbcd..f6443fa44f61 100644 +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -12,6 +12,7 @@ obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o + obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o + obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o + obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o ++obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o + obj-$(CONFIG_I2C_I801) += i2c-i801.o + obj-$(CONFIG_I2C_ISCH) += i2c-isch.o + obj-$(CONFIG_I2C_ISMT) += i2c-ismt.o +diff --git a/drivers/i2c/busses/i2c-cht-wc.c b/drivers/i2c/busses/i2c-cht-wc.c +new file mode 100644 +index 000000000000..ccf0785bcb75 +--- /dev/null ++++ b/drivers/i2c/busses/i2c-cht-wc.c +@@ -0,0 +1,336 @@ ++/* ++ * Intel CHT Whiskey Cove PMIC I2C Master driver ++ * Copyright (C) 2017 Hans de Goede ++ * ++ * Based on various non upstream patches to support the CHT Whiskey Cove PMIC: ++ * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License version ++ * 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define CHT_WC_I2C_CTRL 0x5e24 ++#define CHT_WC_I2C_CTRL_WR BIT(0) ++#define CHT_WC_I2C_CTRL_RD BIT(1) ++#define CHT_WC_I2C_CLIENT_ADDR 0x5e25 ++#define CHT_WC_I2C_REG_OFFSET 0x5e26 ++#define CHT_WC_I2C_WRDATA 0x5e27 ++#define CHT_WC_I2C_RDDATA 0x5e28 ++ ++#define CHT_WC_EXTCHGRIRQ 0x6e0a ++#define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ BIT(0) ++#define CHT_WC_EXTCHGRIRQ_WRITE_IRQ BIT(1) ++#define CHT_WC_EXTCHGRIRQ_READ_IRQ BIT(2) ++#define CHT_WC_EXTCHGRIRQ_NACK_IRQ BIT(3) ++#define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK ((u8)GENMASK(3, 1)) ++#define CHT_WC_EXTCHGRIRQ_MSK 0x6e17 ++ ++struct cht_wc_i2c_adap { ++ struct i2c_adapter adapter; ++ wait_queue_head_t wait; ++ struct irq_chip irqchip; ++ struct mutex irqchip_lock; ++ struct regmap *regmap; ++ struct irq_domain *irq_domain; ++ struct i2c_client *client; ++ int client_irq; ++ u8 irq_mask; ++ u8 old_irq_mask; ++ bool nack; ++ bool done; ++}; ++ ++static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data) ++{ ++ struct cht_wc_i2c_adap *adap = data; ++ int ret, reg; ++ ++ /* Read IRQs */ ++ ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, ®); ++ if (ret) { ++ dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n"); ++ return IRQ_NONE; ++ } ++ ++ reg &= ~adap->irq_mask; ++ ++ /* ++ * Immediately ack IRQs, so that if new IRQs arrives while we're ++ * handling the previous ones our irq will re-trigger when we're done. ++ */ ++ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg); ++ if (ret) ++ dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n"); ++ ++ /* ++ * Do NOT use handle_nested_irq here, the client irq handler will ++ * likely want to do i2c transfers and the i2c controller uses this ++ * interrupt handler as well, so running the client irq handler from ++ * this thread will cause things to lock up. ++ */ ++ if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) { ++ /* ++ * generic_handle_irq expects local IRQs to be disabled ++ * as normally it is called from interrupt context. ++ */ ++ local_irq_disable(); ++ generic_handle_irq(adap->client_irq); ++ local_irq_enable(); ++ } ++ ++ if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) { ++ adap->nack = !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ); ++ adap->done = true; ++ wake_up(&adap->wait); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap) ++{ ++ /* This i2c adapter only supports SMBUS byte transfers */ ++ return I2C_FUNC_SMBUS_BYTE_DATA; ++} ++ ++static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr, ++ unsigned short flags, char read_write, ++ u8 command, int size, ++ union i2c_smbus_data *data) ++{ ++ struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap); ++ int ret, reg; ++ ++ adap->nack = false; ++ adap->done = false; ++ ++ ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr); ++ if (ret) ++ return ret; ++ ++ if (read_write == I2C_SMBUS_WRITE) { ++ ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte); ++ if (ret) ++ return ret; ++ } ++ ++ ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command); ++ if (ret) ++ return ret; ++ ++ ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL, ++ (read_write == I2C_SMBUS_WRITE) ? ++ CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD); ++ if (ret) ++ return ret; ++ ++ /* 3 second timeout, during cable plug the PMIC responds quite slow */ ++ ret = wait_event_timeout(adap->wait, adap->done, 3 * HZ); ++ if (ret == 0) ++ return -ETIMEDOUT; ++ if (adap->nack) ++ return -EIO; ++ ++ if (read_write == I2C_SMBUS_READ) { ++ ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, ®); ++ if (ret) ++ return ret; ++ ++ data->byte = reg; ++ } ++ ++ return 0; ++} ++ ++static const struct i2c_algorithm cht_wc_i2c_adap_algo = { ++ .functionality = cht_wc_i2c_adap_master_func, ++ .smbus_xfer = cht_wc_i2c_adap_smbus_xfer, ++}; ++ ++/**** irqchip for the client connected to the extchgr i2c adapter ****/ ++static void cht_wc_i2c_irq_lock(struct irq_data *data) ++{ ++ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); ++ ++ mutex_lock(&adap->irqchip_lock); ++} ++ ++static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data) ++{ ++ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); ++ int ret; ++ ++ if (adap->irq_mask != adap->old_irq_mask) { ++ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, ++ adap->irq_mask); ++ if (ret == 0) ++ adap->old_irq_mask = adap->irq_mask; ++ else ++ dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n"); ++ } ++ ++ mutex_unlock(&adap->irqchip_lock); ++} ++ ++static void cht_wc_i2c_irq_enable(struct irq_data *data) ++{ ++ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); ++ ++ adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; ++} ++ ++static void cht_wc_i2c_irq_disable(struct irq_data *data) ++{ ++ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); ++ ++ adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; ++} ++ ++static const struct irq_chip cht_wc_i2c_irq_chip = { ++ .irq_bus_lock = cht_wc_i2c_irq_lock, ++ .irq_bus_sync_unlock = cht_wc_i2c_irq_sync_unlock, ++ .irq_disable = cht_wc_i2c_irq_disable, ++ .irq_enable = cht_wc_i2c_irq_enable, ++ .name = "cht_wc_ext_chrg_irq_chip", ++}; ++ ++static const struct property_entry bq24190_props[] = { ++ PROPERTY_ENTRY_STRING("extcon-name", "cht_wcove_pwrsrc"), ++ PROPERTY_ENTRY_BOOL("omit-battery-class"), ++ PROPERTY_ENTRY_BOOL("disable-reset"), ++ { } ++}; ++ ++static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev) ++{ ++ struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent); ++ struct cht_wc_i2c_adap *adap; ++ struct i2c_board_info board_info = { ++ .type = "bq24190", ++ .addr = 0x6b, ++ .properties = bq24190_props, ++ }; ++ int ret, irq; ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "Error missing irq resource\n"); ++ return -EINVAL; ++ } ++ ++ adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL); ++ if (!adap) ++ return -ENOMEM; ++ ++ init_waitqueue_head(&adap->wait); ++ mutex_init(&adap->irqchip_lock); ++ adap->irqchip = cht_wc_i2c_irq_chip; ++ adap->regmap = pmic->regmap; ++ adap->adapter.owner = THIS_MODULE; ++ adap->adapter.class = I2C_CLASS_HWMON; ++ adap->adapter.algo = &cht_wc_i2c_adap_algo; ++ strlcpy(adap->adapter.name, "PMIC I2C Adapter", ++ sizeof(adap->adapter.name)); ++ adap->adapter.dev.parent = &pdev->dev; ++ ++ /* Clear and activate i2c-adapter interrupts, disable client IRQ */ ++ adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK; ++ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask); ++ if (ret) ++ return ret; ++ ++ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask); ++ if (ret) ++ return ret; ++ ++ /* Alloc and register client IRQ */ ++ adap->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 1, ++ &irq_domain_simple_ops, NULL); ++ if (!adap->irq_domain) ++ return -ENOMEM; ++ ++ adap->client_irq = irq_create_mapping(adap->irq_domain, 0); ++ if (!adap->client_irq) { ++ ret = -ENOMEM; ++ goto remove_irq_domain; ++ } ++ ++ irq_set_chip_data(adap->client_irq, adap); ++ irq_set_chip_and_handler(adap->client_irq, &adap->irqchip, ++ handle_simple_irq); ++ ++ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, ++ cht_wc_i2c_adap_thread_handler, ++ IRQF_ONESHOT, "PMIC I2C Adapter", adap); ++ if (ret) ++ goto remove_irq_domain; ++ ++ i2c_set_adapdata(&adap->adapter, adap); ++ ret = i2c_add_adapter(&adap->adapter); ++ if (ret) ++ goto remove_irq_domain; ++ ++ board_info.irq = adap->client_irq; ++ adap->client = i2c_new_device(&adap->adapter, &board_info); ++ if (!adap->client) { ++ ret = -ENOMEM; ++ goto del_adapter; ++ } ++ ++ platform_set_drvdata(pdev, adap); ++ return 0; ++ ++del_adapter: ++ i2c_del_adapter(&adap->adapter); ++remove_irq_domain: ++ irq_domain_remove(adap->irq_domain); ++ return ret; ++} ++ ++static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev) ++{ ++ struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev); ++ ++ i2c_unregister_device(adap->client); ++ i2c_del_adapter(&adap->adapter); ++ irq_domain_remove(adap->irq_domain); ++ ++ return 0; ++} ++ ++static struct platform_device_id cht_wc_i2c_adap_id_table[] = { ++ { .name = "cht_wcove_ext_chgr" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table); ++ ++struct platform_driver cht_wc_i2c_adap_driver = { ++ .probe = cht_wc_i2c_adap_i2c_probe, ++ .remove = cht_wc_i2c_adap_i2c_remove, ++ .driver = { ++ .name = "cht_wcove_ext_chgr", ++ }, ++ .id_table = cht_wc_i2c_adap_id_table, ++}; ++module_platform_driver(cht_wc_i2c_adap_driver); ++ ++MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver"); ++MODULE_AUTHOR("Hans de Goede "); ++MODULE_LICENSE("GPL"); +-- +2.13.0 + diff --git a/0016-Input-silead-Do-not-try-to-directly-access-the-GPIO-.patch b/0016-Input-silead-Do-not-try-to-directly-access-the-GPIO-.patch new file mode 100644 index 0000000..14b4c27 --- /dev/null +++ b/0016-Input-silead-Do-not-try-to-directly-access-the-GPIO-.patch @@ -0,0 +1,54 @@ +From fd4fb1f6633b21042ff084868323e15e708fe1cd Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 1 Jan 2017 22:11:20 +0100 +Subject: [PATCH 16/16] Input: silead: Do not try to directly access the GPIO + when using ACPI pm + +On some x86 tablets we cannot directly access the GPIOs as they are +claimed by the ACPI tables, so check it the i2c client is not being +power-managed by ACPI before trying to get the power pin GPIO. + +Note this is a workaround patch to fix this until Andy' gpiolib-ACPI +patches which make gpiolib more strict land, once those are landed this +patch is no longer needed. + +Signed-off-by: Hans de Goede +--- + drivers/input/touchscreen/silead.c | 22 ++++++++++++++++------ + 1 file changed, 16 insertions(+), 6 deletions(-) + +diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c +index c0ba40c09699..30fba3cbe277 100644 +--- a/drivers/input/touchscreen/silead.c ++++ b/drivers/input/touchscreen/silead.c +@@ -517,12 +518,21 @@ static int silead_ts_probe(struct i2c_client *client, + if (error) + return error; + +- /* Power GPIO pin */ +- data->gpio_power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW); +- if (IS_ERR(data->gpio_power)) { +- if (PTR_ERR(data->gpio_power) != -EPROBE_DEFER) +- dev_err(dev, "Shutdown GPIO request failed\n"); +- return PTR_ERR(data->gpio_power); ++ /* ++ * If device power is not managed by ACPI, get the power_gpio ++ * and manage it ourselves. ++ */ ++#ifdef CONFIG_ACPI ++ if (!acpi_bus_power_manageable(ACPI_HANDLE(dev))) ++#endif ++ { ++ data->gpio_power = devm_gpiod_get_optional(dev, "power", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(data->gpio_power)) { ++ if (PTR_ERR(data->gpio_power) != -EPROBE_DEFER) ++ dev_err(dev, "Power GPIO request failed\n"); ++ return PTR_ERR(data->gpio_power); ++ } + } + + error = silead_ts_setup(client); +-- +2.13.0 + diff --git a/2-2-nvme-Quirk-APST-on-Intel-600P-P3100-devices.patch b/2-2-nvme-Quirk-APST-on-Intel-600P-P3100-devices.patch deleted file mode 100644 index 088d921..0000000 --- a/2-2-nvme-Quirk-APST-on-Intel-600P-P3100-devices.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 596bbd8d3752b0a922b7a5a059f47607a36ecc2e Mon Sep 17 00:00:00 2001 -From: Andrew Lutomirski -Date: Wed, 24 May 2017 15:06:31 -0700 -Subject: [PATCH] nvme: Quirk APST on Intel 600P/P3100 devices - -They have known firmware bugs. A fix is apparently in the works -- -once fixed firmware is available, someone from Intel (Hi, Keith!) -can adjust the quirk accordingly. - -Cc: stable@vger.kernel.org # v4.11 -Cc: Kai-Heng Feng -Cc: Mario Limonciello -Signed-off-by: Andy Lutomirski ---- - drivers/nvme/host/pci.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c -index d8a1707..993d16c 100644 ---- a/drivers/nvme/host/pci.c -+++ b/drivers/nvme/host/pci.c -@@ -2171,6 +2171,8 @@ static const struct pci_device_id nvme_id_table[] = { - { PCI_VDEVICE(INTEL, 0x0a54), - .driver_data = NVME_QUIRK_STRIPE_SIZE | - NVME_QUIRK_DISCARD_ZEROES, }, -+ { PCI_VDEVICE(INTEL, 0xf1a5), /* Intel 600P/P3100 */ -+ .driver_data = NVME_QUIRK_NO_DEEPEST_PS }, - { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ - .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, - { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */ --- -2.7.5 - diff --git a/Add-EFI-signature-data-types.patch b/Add-EFI-signature-data-types.patch index 40d14f9..f7f7c36 100644 --- a/Add-EFI-signature-data-types.patch +++ b/Add-EFI-signature-data-types.patch @@ -1,37 +1,36 @@ -From ba3f737b8521314b62edaa7d4cc4bdc9aeefe394 Mon Sep 17 00:00:00 2001 +From 0451d4e795929a69a0fda6d960aa4b077c5bd179 Mon Sep 17 00:00:00 2001 From: Dave Howells -Date: Tue, 23 Oct 2012 09:30:54 -0400 -Subject: [PATCH 15/20] Add EFI signature data types +Date: Fri, 5 May 2017 08:21:58 +0100 +Subject: [PATCH 1/4] efi: Add EFI signature data types -Add the data types that are used for containing hashes, keys and certificates -for cryptographic verification. - -Bugzilla: N/A -Upstream-status: Fedora mustard for now +Add the data types that are used for containing hashes, keys and +certificates for cryptographic verification along with their corresponding +type GUIDs. Signed-off-by: David Howells --- - include/linux/efi.h | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) + include/linux/efi.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) diff --git a/include/linux/efi.h b/include/linux/efi.h -index 5af91b58afae..190858d62fe3 100644 +index ec36f42..3259ad6 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -603,6 +603,9 @@ void efi_native_runtime_setup(void); - #define LINUX_EFI_LOADER_ENTRY_GUID EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f) - #define LINUX_EFI_RANDOM_SEED_TABLE_GUID EFI_GUID(0x1ce1e5bc, 0x7ceb, 0x42f2, 0x81, 0xe5, 0x8a, 0xad, 0xf1, 0x80, 0xf5, 0x7b) - -+#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) -+#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) +@@ -614,6 +614,10 @@ void efi_native_runtime_setup(void); + #define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) + #define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) + ++#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) ++#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) ++#define EFI_CERT_X509_SHA256_GUID EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed) + - typedef struct { - efi_guid_t guid; - u64 table; -@@ -853,6 +856,20 @@ typedef struct { + /* + * This GUID is used to pass to the kernel proper the struct screen_info + * structure that was populated by the stub based on the GOP protocol instance +@@ -873,6 +877,27 @@ typedef struct { efi_memory_desc_t entry[0]; } efi_memory_attributes_table_t; - + +typedef struct { + efi_guid_t signature_owner; + u8 signature_data[]; @@ -46,6 +45,13 @@ index 5af91b58afae..190858d62fe3 100644 + /* efi_signature_data_t signatures[][] */ +} efi_signature_list_t; + ++typedef u8 efi_sha256_hash_t[32]; ++ ++typedef struct { ++ efi_sha256_hash_t to_be_signed_hash; ++ efi_time_t time_of_revocation; ++} efi_cert_x509_sha256_t; ++ /* * All runtime access to EFI goes through this structure: */ diff --git a/Add-an-EFI-signature-blob-parser-and-key-loader.patch b/Add-an-EFI-signature-blob-parser-and-key-loader.patch index f57abc9..e3941ee 100644 --- a/Add-an-EFI-signature-blob-parser-and-key-loader.patch +++ b/Add-an-EFI-signature-blob-parser-and-key-loader.patch @@ -1,29 +1,38 @@ -From 822b4b3eb76ca451a416a51f0a7bfedfa5c5ea39 Mon Sep 17 00:00:00 2001 +From e4c62c12635a371e43bd17e8d33a936668264491 Mon Sep 17 00:00:00 2001 From: Dave Howells -Date: Tue, 23 Oct 2012 09:36:28 -0400 -Subject: [PATCH 16/20] Add an EFI signature blob parser and key loader. +Date: Fri, 5 May 2017 08:21:58 +0100 +Subject: [PATCH 2/4] efi: Add an EFI signature blob parser -X.509 certificates are loaded into the specified keyring as asymmetric type -keys. +Add a function to parse an EFI signature blob looking for elements of +interest. A list is made up of a series of sublists, where all the +elements in a sublist are of the same type, but sublists can be of +different types. + +For each sublist encountered, the function pointed to by the +get_handler_for_guid argument is called with the type specifier GUID and +returns either a pointer to a function to handle elements of that type or +NULL if the type is not of interest. + +If the sublist is of interest, each element is passed to the handler +function in turn. -[labbott@fedoraproject.org: Drop KEY_ALLOC_TRUSTED] Signed-off-by: David Howells --- - crypto/asymmetric_keys/Kconfig | 8 +++ - crypto/asymmetric_keys/Makefile | 1 + - crypto/asymmetric_keys/efi_parser.c | 108 ++++++++++++++++++++++++++++++++++++ - include/linux/efi.h | 4 ++ - 4 files changed, 121 insertions(+) - create mode 100644 crypto/asymmetric_keys/efi_parser.c + certs/Kconfig | 8 ++++ + certs/Makefile | 1 + + certs/efi_parser.c | 112 ++++++++++++++++++++++++++++++++++++++++++++++++++++ + include/linux/efi.h | 9 +++++ + 4 files changed, 130 insertions(+) + create mode 100644 certs/efi_parser.c + +diff --git a/certs/Kconfig b/certs/Kconfig +index 6ce51ed..630ae09 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -82,4 +82,12 @@ config SYSTEM_BLACKLIST_HASH_LIST + wrapper to incorporate the list into the kernel. Each should + be a string of hex digits. -diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig -index 331f6baf2df8..5f9002d3192e 100644 ---- a/crypto/asymmetric_keys/Kconfig -+++ b/crypto/asymmetric_keys/Kconfig -@@ -61,4 +61,12 @@ config SIGNED_PE_FILE_VERIFICATION - This option provides support for verifying the signature(s) on a - signed PE binary. - +config EFI_SIGNATURE_LIST_PARSER + bool "EFI signature list parser" + depends on EFI @@ -32,28 +41,28 @@ index 331f6baf2df8..5f9002d3192e 100644 + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + - endif # ASYMMETRIC_KEY_TYPE -diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile -index 6516855bec18..c099fe15ed6d 100644 ---- a/crypto/asymmetric_keys/Makefile -+++ b/crypto/asymmetric_keys/Makefile -@@ -10,6 +10,7 @@ asymmetric_keys-y := \ - signature.o - - obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 4119bb3..738151a 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -9,6 +9,7 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_hashes.o + else + obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif +obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o - - # - # X.509 Certificate handling -diff --git a/crypto/asymmetric_keys/efi_parser.c b/crypto/asymmetric_keys/efi_parser.c + + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + +diff --git a/certs/efi_parser.c b/certs/efi_parser.c new file mode 100644 -index 000000000000..636feb18b733 +index 0000000..4e396f9 --- /dev/null -+++ b/crypto/asymmetric_keys/efi_parser.c -@@ -0,0 +1,108 @@ ++++ b/certs/efi_parser.c +@@ -0,0 +1,112 @@ +/* EFI signature/key/certificate list parser + * -+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. ++ * Copyright (C) 2012, 2016 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or @@ -67,27 +76,44 @@ index 000000000000..636feb18b733 +#include +#include +#include -+#include -+ -+static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; + +/** + * parse_efi_signature_list - Parse an EFI signature list for certificates ++ * @source: The source of the key + * @data: The data blob to parse + * @size: The size of the data blob -+ * @keyring: The keyring to add extracted keys to ++ * @get_handler_for_guid: Get the handler func for the sig type (or NULL) ++ * ++ * Parse an EFI signature list looking for elements of interest. A list is ++ * made up of a series of sublists, where all the elements in a sublist are of ++ * the same type, but sublists can be of different types. ++ * ++ * For each sublist encountered, the @get_handler_for_guid function is called ++ * with the type specifier GUID and returns either a pointer to a function to ++ * handle elements of that type or NULL if the type is not of interest. ++ * ++ * If the sublist is of interest, each element is passed to the handler ++ * function in turn. ++ * ++ * Error EBADMSG is returned if the list doesn't parse correctly and 0 is ++ * returned if the list was parsed correctly. No error can be returned from ++ * the @get_handler_for_guid function or the element handler function it ++ * returns. + */ -+int __init parse_efi_signature_list(const void *data, size_t size, struct key *keyring) ++int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)) +{ ++ efi_element_handler_t handler; + unsigned offs = 0; -+ size_t lsize, esize, hsize, elsize; + + pr_devel("-->%s(,%zu)\n", __func__, size); + + while (size > 0) { -+ efi_signature_list_t list; + const efi_signature_data_t *elem; -+ key_ref_t key; ++ efi_signature_list_t list; ++ size_t lsize, esize, hsize, elsize; + + if (size < sizeof(list)) + return -EBADMSG; @@ -108,6 +134,7 @@ index 000000000000..636feb18b733 + __func__, offs); + return -EBADMSG; + } ++ + if (lsize < sizeof(list) || + lsize - sizeof(list) < hsize || + esize < sizeof(*elem) || @@ -117,7 +144,8 @@ index 000000000000..636feb18b733 + return -EBADMSG; + } + -+ if (efi_guidcmp(list.signature_type, efi_cert_x509_guid) != 0) { ++ handler = get_handler_for_guid(&list.signature_type); ++ if (!handler) { + data += lsize; + size -= lsize; + offs += lsize; @@ -132,24 +160,9 @@ index 000000000000..636feb18b733 + elem = data; + + pr_devel("ELEM[%04x]\n", offs); -+ -+ key = key_create_or_update( -+ make_key_ref(keyring, 1), -+ "asymmetric", -+ NULL, ++ handler(source, + &elem->signature_data, -+ esize - sizeof(*elem), -+ (KEY_POS_ALL & ~KEY_POS_SETATTR) | -+ KEY_USR_VIEW, -+ KEY_ALLOC_NOT_IN_QUOTA); -+ -+ if (IS_ERR(key)) -+ pr_err("Problem loading in-kernel X.509 certificate (%ld)\n", -+ PTR_ERR(key)); -+ else -+ pr_notice("Loaded cert '%s' linked to '%s'\n", -+ key_ref_to_ptr(key)->description, -+ keyring->description); ++ esize - sizeof(*elem)); + + data += esize; + size -= esize; @@ -160,16 +173,21 @@ index 000000000000..636feb18b733 + return 0; +} diff --git a/include/linux/efi.h b/include/linux/efi.h -index 190858d62fe3..668aa1244885 100644 +index 3259ad6..08024c6 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -1025,6 +1025,10 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, +@@ -1055,6 +1055,15 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, char * __init efi_md_typeattr_format(char *buf, size_t size, const efi_memory_desc_t *md); - -+struct key; -+extern int __init parse_efi_signature_list(const void *data, size_t size, -+ struct key *keyring); + ++ ++typedef void (*efi_element_handler_t)(const char *source, ++ const void *element_data, ++ size_t element_size); ++extern int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)); + /** * efi_range_is_wc - check the WC bit on an address range diff --git a/AllWinner-h3.patch b/AllWinner-h3.patch deleted file mode 100644 index c75da8a..0000000 --- a/AllWinner-h3.patch +++ /dev/null @@ -1,1080 +0,0 @@ -From patchwork Mon Mar 6 17:17:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, 1/6] ARM: dts: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607205 -Message-Id: <20170306171750.7491-2-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:45 +0800 - -The skeleton.dtsi file is now deprecated, and do not exist in ARM64 -environment. - -Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 -chip, drop skeleton.dtsi inclusion now. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 27780b97c863..9a3435527fde 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -40,8 +40,6 @@ - * OTHER DEALINGS IN THE SOFTWARE. - */ - --#include "skeleton.dtsi" -- - #include - #include - #include -From patchwork Mon Mar 6 17:17:46 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 2/6] ARM: dts: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607207 -Message-Id: <20170306171750.7491-3-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:46 +0800 - -After converting to generic pinconf binding, pinctrl-a10.h is now not -used at all. - -Drop its inclusion for H3 DTSI. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 9a3435527fde..b250e6d03b57 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -42,7 +42,6 @@ - - #include - #include --#include - #include - - / { -From patchwork Mon Mar 6 17:17:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 3/6] ARM: dts: sun8i: h3: correct the GIC compatible in H3 to gic-400 -From: Icenowy Zheng -X-Patchwork-Id: 9607209 -Message-Id: <20170306171750.7491-4-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:47 +0800 - -According to the datasheets provided by Allwinner, both Allwinner H3 and -H5 use GIC-400 as their interrupt controller. - -For better device tree reusing, correct the GIC compatible in H3 DTSI to -"arm,gic-400", thus this node can be reused in H5. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index b250e6d03b57..c13fbfb92592 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -586,7 +586,7 @@ - }; - - gic: interrupt-controller@01c81000 { -- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -From patchwork Mon Mar 6 17:17:48 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8,4/6] arm: dts: sun8i: h3: split Allwinner H3 .dtsi -From: Icenowy Zheng -X-Patchwork-Id: 9607211 -Message-Id: <20170306171750.7491-5-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, Andre Przywara , - linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, - Icenowy Zheng , linux-arm-kernel@lists.infradead.org -Date: Tue, 7 Mar 2017 01:17:48 +0800 - -From: Andre Przywara - -The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the -Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller -updated. So we should really share almost the whole .dtsi. -In preparation for that move the peripheral parts of the existing -sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. -The actual sun8i-h3.dtsi then includes that and defines the H3 specific -parts on top of it. - -Signed-off-by: Andre Przywara -[Icenowy: also split out mmc and gic, as well as pio and ccu's - compatible, and make drop of skeleton into a seperated patch] -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. -Changes in v7: -- Extract GIC, skeleton.dtsi and pinctrl-a10.h changes to seperate patches. -Changes in v6: -- Extract GIC device node to sunxi-h3-h5.dtsi and correct its compatible - as "arm,gic-400". -Changes in v3: -- Use label-based syntax to reference nodes in H3 DTSI file. -Changes in v2: -- Rebase on current linux-next (because of the add of audio codec) - - arch/arm/boot/dts/sun8i-h3.dtsi | 771 ++++----------------- - .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 73 +- - 2 files changed, 133 insertions(+), 711 deletions(-) - rewrite arch/arm/boot/dts/sun8i-h3.dtsi (83%) - copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (90%) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -dissimilarity index 83% -index c13fbfb92592..b36f9f423c39 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -1,645 +1,126 @@ --/* -- * Copyright (C) 2015 Jens Kuske -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -- --#include --#include --#include -- --/ { -- interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -- -- clocks { -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- osc24M: osc24M_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <24000000>; -- clock-output-names = "osc24M"; -- }; -- -- osc32k: osc32k_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <32768>; -- clock-output-names = "osc32k"; -- }; -- -- apb0: apb0_clk { -- compatible = "fixed-factor-clock"; -- #clock-cells = <0>; -- clock-div = <1>; -- clock-mult = <1>; -- clocks = <&osc24M>; -- clock-output-names = "apb0"; -- }; -- -- apb0_gates: clk@01f01428 { -- compatible = "allwinner,sun8i-h3-apb0-gates-clk", -- "allwinner,sun4i-a10-gates-clk"; -- reg = <0x01f01428 0x4>; -- #clock-cells = <1>; -- clocks = <&apb0>; -- clock-indices = <0>, <1>; -- clock-output-names = "apb0_pio", "apb0_ir"; -- }; -- -- ir_clk: ir_clk@01f01454 { -- compatible = "allwinner,sun4i-a10-mod0-clk"; -- reg = <0x01f01454 0x4>; -- #clock-cells = <0>; -- clocks = <&osc32k>, <&osc24M>; -- clock-output-names = "ir"; -- }; -- }; -- -- soc { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- dma: dma-controller@01c02000 { -- compatible = "allwinner,sun8i-h3-dma"; -- reg = <0x01c02000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_DMA>; -- resets = <&ccu RST_BUS_DMA>; -- #dma-cells = <1>; -- }; -- -- mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC0>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC1>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC2>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- usbphy: phy@01c19400 { -- compatible = "allwinner,sun8i-h3-usb-phy"; -- reg = <0x01c19400 0x2c>, -- <0x01c1a800 0x4>, -- <0x01c1b800 0x4>, -- <0x01c1c800 0x4>, -- <0x01c1d800 0x4>; -- reg-names = "phy_ctrl", -- "pmu0", -- "pmu1", -- "pmu2", -- "pmu3"; -- clocks = <&ccu CLK_USB_PHY0>, -- <&ccu CLK_USB_PHY1>, -- <&ccu CLK_USB_PHY2>, -- <&ccu CLK_USB_PHY3>; -- clock-names = "usb0_phy", -- "usb1_phy", -- "usb2_phy", -- "usb3_phy"; -- resets = <&ccu RST_USB_PHY0>, -- <&ccu RST_USB_PHY1>, -- <&ccu RST_USB_PHY2>, -- <&ccu RST_USB_PHY3>; -- reset-names = "usb0_reset", -- "usb1_reset", -- "usb2_reset", -- "usb3_reset"; -- status = "disabled"; -- #phy-cells = <1>; -- }; -- -- ehci1: usb@01c1b000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1b000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci1: usb@01c1b400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1b400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, -- <&ccu CLK_USB_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci2: usb@01c1c000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1c000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci2: usb@01c1c400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1c400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, -- <&ccu CLK_USB_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci3: usb@01c1d000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1d000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci3: usb@01c1d400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1d400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, -- <&ccu CLK_USB_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -- reg = <0x01c20000 0x400>; -- clocks = <&osc24M>, <&osc32k>; -- clock-names = "hosc", "losc"; -- #clock-cells = <1>; -- #reset-cells = <1>; -- }; -- -- pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -- reg = <0x01c20800 0x400>; -- interrupts = , -- ; -- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- i2c0_pins: i2c0 { -- pins = "PA11", "PA12"; -- function = "i2c0"; -- }; -- -- i2c1_pins: i2c1 { -- pins = "PA18", "PA19"; -- function = "i2c1"; -- }; -- -- i2c2_pins: i2c2 { -- pins = "PE12", "PE13"; -- function = "i2c2"; -- }; -- -- mmc0_pins_a: mmc0@0 { -- pins = "PF0", "PF1", "PF2", "PF3", -- "PF4", "PF5"; -- function = "mmc0"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc0_cd_pin: mmc0_cd_pin@0 { -- pins = "PF6"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- mmc1_pins_a: mmc1@0 { -- pins = "PG0", "PG1", "PG2", "PG3", -- "PG4", "PG5"; -- function = "mmc1"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc2_8bit_pins: mmc2_8bit { -- pins = "PC5", "PC6", "PC8", -- "PC9", "PC10", "PC11", -- "PC12", "PC13", "PC14", -- "PC15", "PC16"; -- function = "mmc2"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- spdif_tx_pins_a: spdif@0 { -- pins = "PA17"; -- function = "spdif"; -- }; -- -- spi0_pins: spi0 { -- pins = "PC0", "PC1", "PC2", "PC3"; -- function = "spi0"; -- }; -- -- spi1_pins: spi1 { -- pins = "PA15", "PA16", "PA14", "PA13"; -- function = "spi1"; -- }; -- -- uart0_pins_a: uart0@0 { -- pins = "PA4", "PA5"; -- function = "uart0"; -- }; -- -- uart1_pins: uart1 { -- pins = "PG6", "PG7"; -- function = "uart1"; -- }; -- -- uart1_rts_cts_pins: uart1_rts_cts { -- pins = "PG8", "PG9"; -- function = "uart1"; -- }; -- -- uart2_pins: uart2 { -- pins = "PA0", "PA1"; -- function = "uart2"; -- }; -- -- uart3_pins: uart3 { -- pins = "PA13", "PA14"; -- function = "uart3"; -- }; -- }; -- -- timer@01c20c00 { -- compatible = "allwinner,sun4i-a10-timer"; -- reg = <0x01c20c00 0xa0>; -- interrupts = , -- ; -- clocks = <&osc24M>; -- }; -- -- spi0: spi@01c68000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c68000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 23>, <&dma 23>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins>; -- resets = <&ccu RST_BUS_SPI0>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- spi1: spi@01c69000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c69000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 24>, <&dma 24>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi1_pins>; -- resets = <&ccu RST_BUS_SPI1>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- wdt0: watchdog@01c20ca0 { -- compatible = "allwinner,sun6i-a31-wdt"; -- reg = <0x01c20ca0 0x20>; -- interrupts = ; -- }; -- -- spdif: spdif@01c21000 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-spdif"; -- reg = <0x01c21000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; -- resets = <&ccu RST_BUS_SPDIF>; -- clock-names = "apb", "spdif"; -- dmas = <&dma 2>; -- dma-names = "tx"; -- status = "disabled"; -- }; -- -- pwm: pwm@01c21400 { -- compatible = "allwinner,sun8i-h3-pwm"; -- reg = <0x01c21400 0x8>; -- clocks = <&osc24M>; -- #pwm-cells = <3>; -- status = "disabled"; -- }; -- -- codec: codec@01c22c00 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-codec"; -- reg = <0x01c22c00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -- clock-names = "apb", "codec"; -- resets = <&ccu RST_BUS_CODEC>; -- dmas = <&dma 15>, <&dma 15>; -- dma-names = "rx", "tx"; -- allwinner,codec-analog-controls = <&codec_analog>; -- status = "disabled"; -- }; -- -- uart0: serial@01c28000 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28000 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART0>; -- resets = <&ccu RST_BUS_UART0>; -- dmas = <&dma 6>, <&dma 6>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart1: serial@01c28400 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28400 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART1>; -- resets = <&ccu RST_BUS_UART1>; -- dmas = <&dma 7>, <&dma 7>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart2: serial@01c28800 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28800 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART2>; -- resets = <&ccu RST_BUS_UART2>; -- dmas = <&dma 8>, <&dma 8>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart3: serial@01c28c00 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28c00 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART3>; -- resets = <&ccu RST_BUS_UART3>; -- dmas = <&dma 9>, <&dma 9>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- i2c0: i2c@01c2ac00 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2ac00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C0>; -- resets = <&ccu RST_BUS_I2C0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c0_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c1: i2c@01c2b000 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C1>; -- resets = <&ccu RST_BUS_I2C1>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c1_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c2: i2c@01c2b400 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C2>; -- resets = <&ccu RST_BUS_I2C2>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c2_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- gic: interrupt-controller@01c81000 { -- compatible = "arm,gic-400"; -- reg = <0x01c81000 0x1000>, -- <0x01c82000 0x2000>, -- <0x01c84000 0x2000>, -- <0x01c86000 0x2000>; -- interrupt-controller; -- #interrupt-cells = <3>; -- interrupts = ; -- }; -- -- rtc: rtc@01f00000 { -- compatible = "allwinner,sun6i-a31-rtc"; -- reg = <0x01f00000 0x54>; -- interrupts = , -- ; -- }; -- -- apb0_reset: reset@01f014b0 { -- reg = <0x01f014b0 0x4>; -- compatible = "allwinner,sun6i-a31-clock-reset"; -- #reset-cells = <1>; -- }; -- -- codec_analog: codec-analog@01f015c0 { -- compatible = "allwinner,sun8i-h3-codec-analog"; -- reg = <0x01f015c0 0x4>; -- }; -- -- ir: ir@01f02000 { -- compatible = "allwinner,sun5i-a13-ir"; -- clocks = <&apb0_gates 1>, <&ir_clk>; -- clock-names = "apb", "ir"; -- resets = <&apb0_reset 1>; -- interrupts = ; -- reg = <0x01f02000 0x40>; -- status = "disabled"; -- }; -- -- r_pio: pinctrl@01f02c00 { -- compatible = "allwinner,sun8i-h3-r-pinctrl"; -- reg = <0x01f02c00 0x400>; -- interrupts = ; -- clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- resets = <&apb0_reset 0>; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- ir_pins_a: ir@0 { -- pins = "PL11"; -- function = "s_cir_rx"; -- }; -- }; -- }; --}; -+/* -+ * Copyright (C) 2015 Jens Kuske -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include "sunxi-h3-h5.dtsi" -+ -+/ { -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu@0 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <0>; -+ }; -+ -+ cpu@1 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <1>; -+ }; -+ -+ cpu@2 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <2>; -+ }; -+ -+ cpu@3 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <3>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+}; -+ -+&ccu { -+ compatible = "allwinner,sun8i-h3-ccu"; -+}; -+ -+&mmc0 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC0>, -+ <&ccu CLK_MMC0>, -+ <&ccu CLK_MMC0_OUTPUT>, -+ <&ccu CLK_MMC0_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc1 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC1>, -+ <&ccu CLK_MMC1>, -+ <&ccu CLK_MMC1_OUTPUT>, -+ <&ccu CLK_MMC1_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc2 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC2>, -+ <&ccu CLK_MMC2>, -+ <&ccu CLK_MMC2_OUTPUT>, -+ <&ccu CLK_MMC2_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&pio { -+ compatible = "allwinner,sun8i-h3-pinctrl"; -+}; -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -similarity index 90% -copy from arch/arm/boot/dts/sun8i-h3.dtsi -copy to arch/arm/boot/dts/sunxi-h3-h5.dtsi -index c13fbfb92592..2494ea063cd4 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -46,43 +46,8 @@ - - / { - interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -+ #address-cells = <1>; -+ #size-cells = <1>; - - clocks { - #address-cells = <1>; -@@ -147,16 +112,8 @@ - }; - - mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = ; -@@ -166,16 +123,8 @@ - }; - - mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = ; -@@ -185,16 +134,8 @@ - }; - - mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC2>; - reset-names = "ahb"; - interrupts = ; -@@ -305,7 +246,7 @@ - }; - - ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; -@@ -314,7 +255,7 @@ - }; - - pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20800 0x400>; - interrupts = , - ; diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch index ebe9a3c..591b235 100644 --- a/AllWinner-net-emac.patch +++ b/AllWinner-net-emac.patch @@ -1,21 +1,20 @@ -From patchwork Tue Mar 14 14:18:37 2017 +From patchwork Mon May 1 12:45:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 01/20] net-next: stmmac: export - stmmac_set_mac_addr/stmmac_get_mac_addr +Subject: [v5, + 01/20] net: stmmac: export stmmac_set_mac_addr/stmmac_get_mac_addr From: Corentin LABBE -X-Patchwork-Id: 9623505 -Message-Id: <20170314141856.24560-2-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706455 +Message-Id: <20170501124520.3769-2-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:37 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:01 +0200 Thoses symbol will be needed for the dwmac-sun8i ethernet driver. For letting it to be build as module, they need to be exported. @@ -26,7 +25,7 @@ Signed-off-by: Corentin Labbe 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -index e60bfca..0ab985c8 100644 +index 38f9430..67af0bd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c @@ -248,6 +248,7 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], @@ -43,39 +42,39 @@ index e60bfca..0ab985c8 100644 } - +EXPORT_SYMBOL_GPL(stmmac_get_mac_addr); -From patchwork Tue Mar 14 14:18:38 2017 + +From patchwork Mon May 1 12:45:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,02/20] net-next: stmmac: add optional setup function +Subject: [v5,02/20] net: stmmac: add optional setup function From: Corentin LABBE -X-Patchwork-Id: 9623509 -Message-Id: <20170314141856.24560-3-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706501 +Message-Id: <20170501124520.3769-3-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:38 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:02 +0200 -Instead of ading more ifthen logic for adding a new mac_device_info +Instead of adding more ifthen logic for adding a new mac_device_info setup function, it is easier to add a function pointer to the function needed. Signed-off-by: Corentin Labbe --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++- - include/linux/stmmac.h | 3 +++ - 2 files changed, 6 insertions(+), 1 deletion(-) + include/linux/stmmac.h | 1 + + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 4498a38..856ac57 100644 +index cd8c601..b82ab64 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -3101,7 +3101,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) +@@ -3947,7 +3947,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) struct mac_device_info *mac; /* Identify the MAC HW device */ @@ -87,50 +86,42 @@ index 4498a38..856ac57 100644 mac = dwmac1000_setup(priv->ioaddr, priv->plat->multicast_filter_bins, diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index fc273e9..8f09f18 100644 +index 3921cb9..8bb550b 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h -@@ -109,6 +109,8 @@ struct stmmac_axi { - bool axi_rb; - }; - -+struct stmmac_priv; -+ - struct plat_stmmacenet_data { - int bus_id; - int phy_addr; -@@ -136,6 +138,7 @@ struct plat_stmmacenet_data { +@@ -177,6 +177,7 @@ struct plat_stmmacenet_data { void (*fix_mac_speed)(void *priv, unsigned int speed); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); -+ struct mac_device_info *(*setup)(struct stmmac_priv *priv); ++ struct mac_device_info *(*setup)(void *priv); void *bsp_priv; struct clk *stmmac_clk; struct clk *pclk; -From patchwork Tue Mar 14 14:18:39 2017 + +From patchwork Mon May 1 12:45:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 03/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner +Subject: [v5, + 03/20] dt-bindings: net: Add DT bindings documentation for Allwinner dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623517 -Message-Id: <20170314141856.24560-4-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706457 +Message-Id: <20170501124520.3769-4-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:39 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:03 +0200 This patch adds documentation for Device-Tree bindings for the Allwinner dwmac-sun8i driver. Signed-off-by: Corentin Labbe +Acked-by: Rob Herring --- .../devicetree/bindings/net/dwmac-sun8i.txt | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) @@ -138,7 +129,7 @@ Signed-off-by: Corentin Labbe diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt new file mode 100644 -index 0000000..f01ef17 +index 0000000..05cd067 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt @@ -0,0 +1,77 @@ @@ -166,13 +157,13 @@ index 0000000..f01ef17 +- syscon: A phandle to the syscon of the SoC with one of the following + compatible string: + - allwinner,sun8i-h3-system-controller -+ - allwinner,sun8i-a64-system-controller ++ - allwinner,sun50i-a64-system-controller + - allwinner,sun8i-a83t-system-controller + +Optional properties: -+- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) -+- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) -+Both delay properties are in 0.1ns step. ++- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) ++- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) ++Both delay properties need to be a multiple of 100. + +Optional properties for "allwinner,sun8i-h3-emac": +- allwinner,leds-active-low: EPHY LEDs are active low @@ -219,25 +210,27 @@ index 0000000..f01ef17 + }; + }; +}; -From patchwork Tue Mar 14 14:18:40 2017 + +From patchwork Mon May 1 12:45:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 04/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner - syscon +Subject: [v5, 04/20] dt-bindings: syscon: Add DT bindings documentation for + Allwinner syscon From: Corentin LABBE -X-Patchwork-Id: 9623533 -Message-Id: <20170314141856.24560-5-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706469 +Message-Id: <20170501124520.3769-5-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:40 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:04 +0200 + +This patch adds documentation for Device-Tree bindings for the +syscon present in allwinner devices. Signed-off-by: Corentin Labbe --- @@ -247,7 +240,7 @@ Signed-off-by: Corentin Labbe diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt new file mode 100644 -index 0000000..9f5f1f5 +index 0000000..cb57691 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt @@ -0,0 +1,19 @@ @@ -262,31 +255,31 @@ index 0000000..9f5f1f5 +- reg: address and length of the register for the device. +- compatible: should be "syscon" and one of the following string: + "allwinner,sun8i-h3-system-controller" -+ "allwinner,sun8i-a64-system-controller" ++ "allwinner,sun50i-a64-system-controller" + "allwinner,sun8i-a83t-system-controller" + +Example: -+syscon: syscon@01c00000 { -+ compatible = "syscon", "allwinner,sun8i-h3-system-controller"; ++syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", "syscon"; + reg = <0x01c00000 0x1000>; +}; -From patchwork Tue Mar 14 14:18:41 2017 + +From patchwork Mon May 1 12:45:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,05/20] net-next: stmmac: Add dwmac-sun8i +Subject: [v5,05/20] net: stmmac: Add dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623523 -Message-Id: <20170314141856.24560-6-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706473 +Message-Id: <20170501124520.3769-6-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:41 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:05 +0200 The dwmac-sun8i is a heavy hacked version of stmmac hardware by allwinner. @@ -297,11 +290,11 @@ Signed-off-by: Corentin Labbe --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + - drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 938 +++++++++++++++++++++ - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 27 +- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 973 +++++++++++++++++++++ + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 29 + .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +- include/linux/stmmac.h | 1 + - 6 files changed, 984 insertions(+), 3 deletions(-) + 6 files changed, 1022 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -340,10 +333,10 @@ index 700c603..fd4937a 100644 stmmac-platform-objs:= stmmac_platform.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c new file mode 100644 -index 0000000..52ab67c +index 0000000..66eb980 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -0,0 +1,938 @@ +@@ -0,0 +1,973 @@ +/* + * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer + * @@ -606,23 +599,24 @@ index 0000000..52ab67c + } +} + -+static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr) ++static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan) +{ + writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); +} + -+static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr) ++static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan) +{ + writel(0, ioaddr + EMAC_INT_EN); +} + -+static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v |= EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v |= EMAC_TX_DMA_START; ++ v |= EMAC_TX_DMA_EN; ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + +static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr) @@ -632,47 +626,39 @@ index 0000000..52ab67c + v = readl(ioaddr + EMAC_TX_CTL1); + v |= EMAC_TX_DMA_START; + v |= EMAC_TX_DMA_EN; -+ writel_relaxed(v, ioaddr + EMAC_TX_CTL1); ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + -+static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v &= ~EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v &= ~EMAC_TX_DMA_EN; ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + -+static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v |= EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ + v = readl(ioaddr + EMAC_RX_CTL1); + v |= EMAC_RX_DMA_START; + v |= EMAC_RX_DMA_EN; + writel(v, ioaddr + EMAC_RX_CTL1); +} + -+static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v &= ~EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ + v = readl(ioaddr + EMAC_RX_CTL1); + v &= ~EMAC_RX_DMA_EN; + writel(v, ioaddr + EMAC_RX_CTL1); +} + +static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr, -+ struct stmmac_extra_stats *x) ++ struct stmmac_extra_stats *x, u32 chan) +{ + u32 v; + int ret = 0; @@ -825,6 +811,27 @@ index 0000000..52ab67c + writel(v, ioaddr + EMAC_BASIC_CTL1); +} + ++static void sun8i_dwmac_set_mac(void __iomem *ioaddr, bool enable) ++{ ++ u32 t, r; ++ ++ t = readl(ioaddr + EMAC_TX_CTL0); ++ r = readl(ioaddr + EMAC_RX_CTL0); ++ if (enable) { ++ t |= EMAC_TX_TRANSMITTER_EN; ++ r |= EMAC_RX_RECEIVER_EN; ++ } else { ++ t &= ~EMAC_TX_TRANSMITTER_EN; ++ r &= ~EMAC_RX_RECEIVER_EN; ++ } ++ writel(t, ioaddr + EMAC_TX_CTL0); ++ writel(r, ioaddr + EMAC_RX_CTL0); ++} ++ ++/* Set MAC address at slot reg_n ++ * All slot > 0 need to be enabled with MAC_ADDR_TYPE_DST ++ * If addr is NULL, clear the slot ++ */ +static void sun8i_dwmac_set_umac_addr(struct mac_device_info *hw, + unsigned char *addr, + unsigned int reg_n) @@ -832,6 +839,11 @@ index 0000000..52ab67c + void __iomem *ioaddr = hw->pcsr; + u32 v; + ++ if (!addr) { ++ writel(0, ioaddr + EMAC_MACADDR_HI(reg_n)); ++ return; ++ } ++ + stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), + EMAC_MACADDR_LO(reg_n)); + if (reg_n > 0) { @@ -869,39 +881,44 @@ index 0000000..52ab67c +{ + void __iomem *ioaddr = hw->pcsr; + u32 v; -+ int i = 0; ++ int i = 1; + struct netdev_hw_addr *ha; ++ int macaddrs = netdev_uc_count(dev) + netdev_mc_count(dev) + 1; + -+ v = readl(ioaddr + EMAC_RX_FRM_FLT); -+ -+ v |= EMAC_FRM_FLT_CTL; ++ v = EMAC_FRM_FLT_CTL; + + if (dev->flags & IFF_PROMISC) { + v = EMAC_FRM_FLT_RXALL; + } else if (dev->flags & IFF_ALLMULTI) { -+ v = EMAC_FRM_FLT_MULTICAST; -+ } else if (!netdev_mc_empty(dev)) { -+ netdev_for_each_mc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ v |= EMAC_FRM_FLT_MULTICAST; ++ } else if (macaddrs <= hw->unicast_filter_entries) { ++ if (!netdev_mc_empty(dev)) { ++ netdev_for_each_mc_addr(ha, dev) { ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ i++; ++ } + } -+ } -+ -+ if (netdev_uc_count(dev) + i > hw->unicast_filter_entries) { ++ if (!netdev_uc_empty(dev)) { ++ netdev_for_each_uc_addr(ha, dev) { ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ i++; ++ } ++ } ++ } else { + netdev_info(dev, "Too many address, switching to promiscuous\n"); + v = EMAC_FRM_FLT_RXALL; -+ } else { -+ netdev_for_each_uc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ } + } ++ ++ /* Disable unused address filter slots */ ++ while (i < hw->unicast_filter_entries) ++ sun8i_dwmac_set_umac_addr(hw, NULL, i++); ++ + writel(v, ioaddr + EMAC_RX_FRM_FLT); +} + +static void sun8i_dwmac_flow_ctrl(struct mac_device_info *hw, -+ unsigned int duplex, -+ unsigned int fc, unsigned int pause_time) ++ unsigned int duplex, unsigned int fc, ++ unsigned int pause_time, u32 tx_cnt) +{ + void __iomem *ioaddr = hw->pcsr; + u32 v; @@ -981,7 +998,12 @@ index 0000000..52ab67c + } + } + -+ if (!of_property_read_u32(node, "allwinner,tx-delay", &val)) { ++ if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { ++ if (val % 100) { ++ dev_err(priv->device, "tx-delay must be a multiple of 100\n"); ++ return -EINVAL; ++ } ++ val /= 100; + dev_dbg(priv->device, "set tx-delay to %x\n", val); + if (val <= SYSCON_ETXDC_MASK) { + reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT); @@ -993,7 +1015,12 @@ index 0000000..52ab67c + } + } + -+ if (!of_property_read_u32(node, "allwinner,rx-delay", &val)) { ++ if (!of_property_read_u32(node, "allwinner,rx-delay-ps", &val)) { ++ if (val % 100) { ++ dev_err(priv->device, "rx-delay must be a multiple of 100\n"); ++ return -EINVAL; ++ } ++ val /= 100; + dev_dbg(priv->device, "set rx-delay to %x\n", val); + if (val <= SYSCON_ERXDC_MASK) { + reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT); @@ -1043,21 +1070,20 @@ index 0000000..52ab67c + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; + int ret; + -+ if (gmac->ephy_clk) { -+ ret = clk_prepare_enable(gmac->ephy_clk); -+ if (ret) { -+ dev_err(priv->device, "Cannot enable ephy\n"); -+ return ret; -+ } ++ if (!gmac->use_internal_phy) ++ return 0; ++ ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable ephy\n"); ++ return ret; + } + -+ if (gmac->rst_ephy) { -+ ret = reset_control_deassert(gmac->rst_ephy); -+ if (ret) { -+ dev_err(priv->device, "Cannot deassert ephy\n"); -+ clk_disable_unprepare(gmac->ephy_clk); -+ return ret; -+ } ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert ephy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; + } + + return 0; @@ -1065,10 +1091,11 @@ index 0000000..52ab67c + +static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) +{ -+ if (gmac->ephy_clk) -+ clk_disable_unprepare(gmac->ephy_clk); -+ if (gmac->rst_ephy) -+ reset_control_assert(gmac->rst_ephy); ++ if (!gmac->use_internal_phy) ++ return 0; ++ ++ clk_disable_unprepare(gmac->ephy_clk); ++ reset_control_assert(gmac->rst_ephy); + return 0; +} + @@ -1116,6 +1143,7 @@ index 0000000..52ab67c + +static const struct stmmac_ops sun8i_dwmac_ops = { + .core_init = sun8i_dwmac_core_init, ++ .set_mac = sun8i_dwmac_set_mac, + .dump_regs = sun8i_dwmac_dump_mac_regs, + .rx_ipc = sun8i_dwmac_rx_ipc_enable, + .set_filter = sun8i_dwmac_set_filter, @@ -1124,9 +1152,10 @@ index 0000000..52ab67c + .get_umac_addr = sun8i_dwmac_get_umac_addr, +}; + -+static struct mac_device_info *sun8i_dwmac_setup(struct stmmac_priv *priv) ++static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) +{ + struct mac_device_info *mac; ++ struct stmmac_priv *priv = ppriv; + int ret; + + mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL); @@ -1182,13 +1211,13 @@ index 0000000..52ab67c + + gmac->variant = of_device_get_match_data(&pdev->dev); + if (!gmac->variant) { -+ dev_err(&pdev->dev, "Missing sun8i-emac variant\n"); ++ dev_err(&pdev->dev, "Missing dwmac-sun8i variant\n"); + return -EINVAL; + } + + gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); + if (IS_ERR(gmac->tx_clk)) { -+ dev_err(dev, "could not get tx clock\n"); ++ dev_err(dev, "Could not get TX clock\n"); + return PTR_ERR(gmac->tx_clk); + } + @@ -1197,7 +1226,7 @@ index 0000000..52ab67c + if (IS_ERR(gmac->regulator)) { + if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) + return -EPROBE_DEFER; -+ dev_info(dev, "no regulator found\n"); ++ dev_info(dev, "No regulator found\n"); + gmac->regulator = NULL; + } + @@ -1205,7 +1234,7 @@ index 0000000..52ab67c + "syscon"); + if (IS_ERR(gmac->regmap)) { + ret = PTR_ERR(gmac->regmap); -+ dev_err(&pdev->dev, "unable to map SYSCON:%d\n", ret); ++ dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret); + return ret; + } + @@ -1216,8 +1245,7 @@ index 0000000..52ab67c + gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); + if (IS_ERR(gmac->ephy_clk)) { + ret = PTR_ERR(gmac->ephy_clk); -+ dev_err(&pdev->dev, "Cannot get EPHY clock err=%d\n", -+ ret); ++ dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); + return -EINVAL; + } + @@ -1272,7 +1300,7 @@ index 0000000..52ab67c + .probe = sun8i_dwmac_probe, + .remove = stmmac_pltfr_remove, + .driver = { -+ .name = "sun8i-dwmac", ++ .name = "dwmac-sun8i", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = sun8i_dwmac_match, + }, @@ -1283,10 +1311,10 @@ index 0000000..52ab67c +MODULE_DESCRIPTION("Allwinner sun8i DWMAC specific glue layer"); +MODULE_LICENSE("GPL"); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 856ac57..05e8018 100644 +index b82ab64..39777a7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -177,6 +177,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) +@@ -235,6 +235,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) priv->clk_csr = STMMAC_CSR_250_300M; } @@ -1304,18 +1332,22 @@ index 856ac57..05e8018 100644 } static void print_pkt(unsigned char *buf, int len) -@@ -697,6 +708,10 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -784,6 +795,14 @@ static void stmmac_adjust_link(struct net_device *dev) if (phydev->link) { u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG); -+ /* disable loopback */ -+ if (priv->plat->has_sun8i) -+ ctrl &= ~BIT(1); ++ /* dwmac-sun8i handle loopback in MAC_CTRL_REG */ ++ if (priv->plat->has_sun8i) { ++ if (dev->features & NETIF_F_LOOPBACK) ++ ctrl |= BIT(1); ++ else ++ ctrl &= ~BIT(1); ++ } + /* Now we make sure that we can be in full duplex mode. * If not, we operate in half-duplex mode. */ if (phydev->duplex != priv->oldduplex) { -@@ -714,6 +729,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -800,6 +819,8 @@ static void stmmac_adjust_link(struct net_device *dev) if (phydev->speed != priv->speed) { new_state = 1; @@ -1324,7 +1356,7 @@ index 856ac57..05e8018 100644 switch (phydev->speed) { case 1000: if (priv->plat->has_gmac || -@@ -725,6 +742,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -811,6 +832,8 @@ static void stmmac_adjust_link(struct net_device *dev) priv->plat->has_gmac4) { ctrl |= priv->hw->link.port; ctrl |= priv->hw->link.speed; @@ -1333,7 +1365,7 @@ index 856ac57..05e8018 100644 } else { ctrl &= ~priv->hw->link.port; } -@@ -734,6 +753,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -820,6 +843,8 @@ static void stmmac_adjust_link(struct net_device *dev) priv->plat->has_gmac4) { ctrl |= priv->hw->link.port; ctrl &= ~(priv->hw->link.speed); @@ -1342,16 +1374,7 @@ index 856ac57..05e8018 100644 } else { ctrl &= ~priv->hw->link.port; } -@@ -1702,7 +1723,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) - /* Enable the MAC Rx/Tx */ - if (priv->synopsys_id >= DWMAC_CORE_4_00) - stmmac_dwmac4_set_mac(priv->ioaddr, true); -- else -+ else if (!priv->plat->has_sun8i) - stmmac_set_mac(priv->ioaddr, true); - - /* Set the HW DMA mode and the COE */ -@@ -3123,6 +3144,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) +@@ -3969,6 +3994,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) priv->hw = mac; @@ -1363,10 +1386,10 @@ index 856ac57..05e8018 100644 if (priv->synopsys_id >= DWMAC_CORE_4_00) { priv->hw->mode = &dwmac4_ring_mode_ops; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 0ba1caf..3c21862 100644 +index 7fc3a1e..3840529 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -160,6 +160,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, +@@ -309,6 +309,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, struct device_node *np, struct device *dev) { bool mdio = true; @@ -1379,7 +1402,7 @@ index 0ba1caf..3c21862 100644 /* If phy-handle property is passed from DT, use it as the PHY */ plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -@@ -176,8 +182,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, +@@ -325,8 +331,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, mdio = false; } @@ -1390,10 +1413,10 @@ index 0ba1caf..3c21862 100644 } else { /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 8f09f18..100386c 100644 +index 8bb550b..108739f 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h -@@ -147,6 +147,7 @@ struct plat_stmmacenet_data { +@@ -186,6 +186,7 @@ struct plat_stmmacenet_data { struct reset_control *stmmac_rst; struct stmmac_axi *axi; int has_gmac4; @@ -1401,24 +1424,25 @@ index 8f09f18..100386c 100644 bool tso_en; int mac_port_sel_speed; bool en_tx_lpi_clockgating; -From patchwork Tue Mar 14 14:18:42 2017 + +From patchwork Mon May 1 12:45:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 06/20] ARM: dts: sunxi-h3-h5: Add dt node for the syscon control +Subject: [v5, + 06/20] arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module From: Corentin LABBE -X-Patchwork-Id: 9623549 -Message-Id: <20170314141856.24560-7-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706459 +Message-Id: <20170501124520.3769-7-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:42 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:06 +0200 This patch add the dt node for the syscon register present on the Allwinner H3/H5 @@ -1432,39 +1456,39 @@ Signed-off-by: Corentin Labbe 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 2494ea0..07e4f36 100644 +index 1aeeacb..d9691fc 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -102,6 +102,12 @@ +@@ -83,6 +83,12 @@ #size-cells = <1>; ranges; -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", ++ "syscon"; + reg = <0x01c00000 0x1000>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; -From patchwork Tue Mar 14 14:18:43 2017 + +From patchwork Mon May 1 12:45:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,07/20] ARM: dts: sunxi-h3-h5: add dwmac-sun8i ethernet driver +Subject: [v5,07/20] arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver From: Corentin LABBE -X-Patchwork-Id: 9623561 -Message-Id: <20170314141856.24560-8-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706465 +Message-Id: <20170501124520.3769-8-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:43 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:07 +0200 The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed. @@ -1474,21 +1498,21 @@ SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++++++++++++++++++++++++++++++++ - 1 file changed, 33 insertions(+) + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 34 ++++++++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 07e4f36..c35af5e 100644 +index d9691fc..45a9a30 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -272,6 +272,14 @@ +@@ -285,6 +285,14 @@ interrupt-controller; #interrupt-cells = <3>; -+ emac_rgmii_pins: emac0@0 { ++ emac_rgmii_pins: emac0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD7", "PD8", "PD9", "PD10", -+ "PD12", "PD13", "PD15", "PD16", "PD17"; ++ "PD5", "PD7", "PD8", "PD9", "PD10", ++ "PD12", "PD13", "PD15", "PD16", "PD17"; + function = "emac"; + drive-strength = <40>; + }; @@ -1496,7 +1520,7 @@ index 07e4f36..c35af5e 100644 i2c0_pins: i2c0 { pins = "PA11", "PA12"; function = "i2c0"; -@@ -368,6 +376,31 @@ +@@ -381,6 +389,32 @@ clocks = <&osc24M>; }; @@ -1518,9 +1542,10 @@ index 07e4f36..c35af5e 100644 + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; + }; + }; + }; @@ -1528,107 +1553,23 @@ index 07e4f36..c35af5e 100644 spi0: spi@01c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; -From patchwork Tue Mar 14 14:18:44 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,08/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Banana Pi M2+ -From: Corentin LABBE -X-Patchwork-Id: 9623539 -Message-Id: <20170314141856.24560-9-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:44 +0100 - -From: LABBE Corentin -The dwmac-sun8i hardware is present on the Banana Pi M2+ -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 37 +++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index 52acbe1..30b0a41 100644 ---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -@@ -90,6 +90,18 @@ - pinctrl-0 = <&wifi_en_bpi_m2p>; - reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &ehci1 { -@@ -186,3 +198,28 @@ - /* USB VBUS is on as long as VCC-IO is on */ - status = "okay"; - }; -+ -+&pio { -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:45 2017 +From patchwork Mon May 1 12:45:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,09/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI PC +Subject: [v5,08/20] arm: sun8i: orangepi-pc: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623555 -Message-Id: <20170314141856.24560-10-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706463 +Message-Id: <20170501124520.3769-9-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:45 +0100 - -From: LABBE Corentin + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:08 +0200 The dwmac-sun8i hardware is present on the Orange PI PC. It uses the internal PHY. @@ -1641,96 +1582,102 @@ Signed-off-by: Corentin Labbe 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index f148111..746c25a 100644 +index f148111..52e6575 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -53,6 +53,7 @@ +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; aliases { - serial0 = &uart0; + ethernet0 = &emac; + serial0 = &uart0; }; - chosen { -@@ -184,3 +185,10 @@ - /* USB VBUS is always on */ +@@ -109,6 +110,13 @@ status = "okay"; }; -+ + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:46 2017 ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + +From patchwork Mon May 1 12:45:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,10/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi 2 +Subject: [v5,09/20] arm: sun8i: orangepi-zero: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623557 -Message-Id: <20170314141856.24560-11-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706461 +Message-Id: <20170501124520.3769-10-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:46 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:09 +0200 -The dwmac-sun8i hardware is present on the Orange PI 2. +The dwmac-sun8i hardware is present on the Orange PI Zero. It uses the internal PHY. This patch create the needed emac node. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 8 ++++++++ 1 file changed, 8 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 5b6d145..3f54b12 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -55,6 +55,7 @@ +diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +index 9e8b082..dd3525a 100644 +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +@@ -57,6 +57,7 @@ + aliases { serial0 = &uart0; /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ - ethernet1 = &rtl8189; + ethernet0 = &emac; + ethernet1 = &xr819; }; - chosen { -@@ -203,3 +204,10 @@ - usb1_vbus-supply = <®_usb1_vbus>; +@@ -103,6 +104,13 @@ status = "okay"; }; -+ + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:47 2017 ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + +From patchwork Mon May 1 12:45:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,11/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI One +Subject: [v5,10/20] arm: sun8i: orangepi-one: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623541 -Message-Id: <20170314141856.24560-12-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706471 +Message-Id: <20170501124520.3769-11-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:47 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:10 +0200 The dwmac-sun8i hardware is present on the Orange PI One. It uses the internal PHY. @@ -1743,18 +1690,18 @@ Signed-off-by: Corentin Labbe 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index ea8fd13..1f98ddc 100644 +index 5fea430..6880268 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -53,6 +53,7 @@ +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; aliases { - serial0 = &uart0; + ethernet0 = &emac; + serial0 = &uart0; }; - chosen { -@@ -93,6 +94,13 @@ +@@ -97,6 +98,13 @@ status = "okay"; }; @@ -1768,108 +1715,79 @@ index ea8fd13..1f98ddc 100644 &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Tue Mar 14 14:18:48 2017 + +From patchwork Mon May 1 12:45:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,12/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi plus +Subject: [v5,11/20] arm: sun8i: orangepi-2: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623569 -Message-Id: <20170314141856.24560-13-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706467 +Message-Id: <20170501124520.3769-12-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:48 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:11 +0200 -The dwmac-sun8i hardware is present on the Orange PI plus. -It uses an external PHY rtl8211e via RGMII. +The dwmac-sun8i hardware is present on the Orange PI 2. +It uses the internal PHY. -This patch create the needed regulator, emac and phy nodes. +This patch create the needed emac node. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 35 ++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 8c40ab7..4e075a2 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -@@ -58,6 +58,18 @@ - enable-active-high; - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +index 5b6d145..cedd326 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -54,6 +54,7 @@ + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &rtl8189; }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - &ehci3 { -@@ -86,8 +98,31 @@ - pins = "PG11"; - function = "gpio_out"; - }; -+ -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; +@@ -108,6 +109,13 @@ + status = "okay"; }; - &usbphy { - usb3_vbus-supply = <®_usb3_vbus>; - }; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ +&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:49 2017 ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + +From patchwork Mon May 1 12:45:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 13/20] ARM: dts: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to - active high +Subject: [v5, + 12/20] arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active + high From: Corentin LABBE -X-Patchwork-Id: 9623593 -Message-Id: <20170314141856.24560-14-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706481 +Message-Id: <20170501124520.3769-13-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:49 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:12 +0200 On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet port were changed from active low to active high. @@ -1881,36 +1799,39 @@ Signed-off-by: Corentin Labbe 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -index 8b93f5c..0380769 100644 +index 8b93f5c..a10281b 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -86,3 +86,8 @@ - /* eMMC is missing pull-ups */ - bias-pull-up; +@@ -53,6 +53,11 @@ + }; }; -+ + +&emac { + /* LEDs changed to active high on the plus */ + /delete-property/ allwinner,leds-active-low; +}; -From patchwork Tue Mar 14 14:18:50 2017 ++ + &mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + +From patchwork Mon May 1 12:45:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 14/20] ARM64: dts: sun50i-a64: Add dt node for the syscon control - module +Subject: [v5, 13/20] arm64: allwinner: sun50i-a64: Add dt node for the syscon + control module From: Corentin LABBE -X-Patchwork-Id: 9623591 -Message-Id: <20170314141856.24560-15-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706477 +Message-Id: <20170501124520.3769-14-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:50 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:13 +0200 This patch add the dt node for the syscon register present on the Allwinner A64. @@ -1924,39 +1845,40 @@ Signed-off-by: Corentin Labbe 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 1c64ea2..3b09af2 100644 +index c7f669f..d7341ba 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -121,6 +121,12 @@ +@@ -129,6 +129,12 @@ #size-cells = <1>; ranges; -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun50i-a64-system-controller", ++ "syscon"; + reg = <0x01c00000 0x1000>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c0f000 0x1000>; -From patchwork Tue Mar 14 14:18:51 2017 + +From patchwork Mon May 1 12:45:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,15/20] ARM64: dts: sun50i-a64: add dwmac-sun8i Ethernet driver +Subject: [v5, + 14/20] arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver From: Corentin LABBE -X-Patchwork-Id: 9623621 -Message-Id: <20170314141856.24560-16-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706485 +Message-Id: <20170501124520.3769-15-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:51 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:14 +0200 The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit connections. It is very similar to the device found in the Allwinner @@ -1967,30 +1889,28 @@ it disabled at this level. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 3b09af2..57d69e5 100644 +index d7341ba..18b3642 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -277,6 +277,23 @@ +@@ -287,6 +287,21 @@ bias-pull-up; }; + rmii_pins: rmii_pins { -+ pins = "PD10", "PD11", "PD13", "PD14", -+ "PD17", "PD18", "PD19", "PD20", -+ "PD22", "PD23"; ++ pins = "PD10", "PD11", "PD13", "PD14", "PD17", ++ "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + + rgmii_pins: rgmii_pins { -+ pins = "PD8", "PD9", "PD10", "PD11", -+ "PD12", "PD13", "PD15", -+ "PD16", "PD17", "PD18", "PD19", -+ "PD20", "PD21", "PD22", "PD23"; ++ pins = "PD8", "PD9", "PD10", "PD11", "PD12", ++ "PD13", "PD15", "PD16", "PD17", "PD18", ++ "PD19", "PD20", "PD21", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; @@ -1998,7 +1918,7 @@ index 3b09af2..57d69e5 100644 uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; -@@ -381,6 +398,26 @@ +@@ -391,6 +406,26 @@ #size-cells = <0>; }; @@ -2025,47 +1945,40 @@ index 3b09af2..57d69e5 100644 gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, -From patchwork Tue Mar 14 14:18:52 2017 + +From patchwork Mon May 1 12:45:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,16/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 +Subject: [v5,15/20] arm64: allwinner: pine64: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623607 -Message-Id: <20170314141856.24560-17-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706489 +Message-Id: <20170501124520.3769-16-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:52 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:15 +0200 The dwmac-sun8i hardware is present on the pine64 It uses an external PHY via RMII. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index c680ed3..b53994d 100644 +index c680ed3..3b491c0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -109,3 +109,18 @@ - &usbphy { +@@ -70,6 +70,15 @@ status = "okay"; }; -+ -+&mdio { -+ ext_rmii_phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; @@ -2074,37 +1987,55 @@ index c680ed3..b53994d 100644 + status = "okay"; + +}; -From patchwork Tue Mar 14 14:18:53 2017 ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -80,6 +89,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + +From patchwork Mon May 1 12:45:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,17/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 plus +Subject: [v5,16/20] arm64: allwinner: pine64-plus: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623597 -Message-Id: <20170314141856.24560-18-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706511 +Message-Id: <20170501124520.3769-17-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:53 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:16 +0200 The dwmac-sun8i hardware is present on the pine64 plus. It uses an external PHY rtl8211e via RGMII. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) + .../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -index 790d14d..8e06aed 100644 +index 790d14d..24f1aac 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -46,5 +46,19 @@ +@@ -46,5 +46,20 @@ model = "Pine64+"; compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; @@ -2112,68 +2043,512 @@ index 790d14d..8e06aed 100644 + /* TODO: Camera, touchscreen, etc. */ +}; + -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; }; -From patchwork Tue Mar 14 14:18:54 2017 + +From patchwork Mon May 1 12:45:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 18/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on the BananaPi M64 +Subject: [v5,17/20] arm64: allwinner: bananapi-m64: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623595 -Message-Id: <20170314141856.24560-19-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706509 +Message-Id: <20170501124520.3769-18-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:54 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:17 +0200 The dwmac-sun8i hardware is present on the BananaPi M64. It uses an external PHY rtl8211e via RGMII. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135..347c262 100644 +index 6872135..0d1f026 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -77,6 +77,20 @@ +@@ -67,6 +67,14 @@ + }; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -77,6 +85,13 @@ bias-pull-up; }; +&mdio { + ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + +From patchwork Mon May 1 12:45:18 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5,18/20] arm: sunxi: Enable dwmac-sun8i driver on sunxi_defconfig +From: Corentin LABBE +X-Patchwork-Id: 9706507 +Message-Id: <20170501124520.3769-19-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:18 +0200 + +Enable the dwmac-sun8i driver in the sunxi default configuration + +Signed-off-by: Corentin Labbe +--- + arch/arm/configs/sunxi_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig +index 5cd5dd70..504e022 100644 +--- a/arch/arm/configs/sunxi_defconfig ++++ b/arch/arm/configs/sunxi_defconfig +@@ -40,6 +40,7 @@ CONFIG_ATA=y + CONFIG_AHCI_SUNXI=y + CONFIG_NETDEVICES=y + CONFIG_SUN4I_EMAC=y ++CONFIG_DWMAC_SUN8I=y + # CONFIG_NET_VENDOR_ARC is not set + # CONFIG_NET_CADENCE is not set + # CONFIG_NET_VENDOR_BROADCOM is not set + +From patchwork Mon May 1 12:45:19 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5, + 19/20] arm: multi_v7: Enable dwmac-sun8i driver on multi_v7_defconfig +From: Corentin LABBE +X-Patchwork-Id: 9706513 +Message-Id: <20170501124520.3769-20-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:19 +0200 + +Enable the dwmac-sun8i driver in the multi_v7 default configuration + +Signed-off-by: Corentin Labbe +--- + arch/arm/configs/multi_v7_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig +index 2685e03..6da6af8 100644 +--- a/arch/arm/configs/multi_v7_defconfig ++++ b/arch/arm/configs/multi_v7_defconfig +@@ -257,6 +257,7 @@ CONFIG_SMSC911X=y + CONFIG_STMMAC_ETH=y + CONFIG_STMMAC_PLATFORM=y + CONFIG_DWMAC_DWC_QOS_ETH=y ++CONFIG_DWMAC_SUN8I=y + CONFIG_TI_CPSW=y + CONFIG_XILINX_EMACLITE=y + CONFIG_AT803X_PHY=y + +From patchwork Mon May 1 12:45:20 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5,20/20] arm64: defconfig: Enable dwmac-sun8i driver on defconfig +From: Corentin LABBE +X-Patchwork-Id: 9706505 +Message-Id: <20170501124520.3769-21-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:20 +0200 + +Enable the dwmac-sun8i ethernet driver as a module in the ARM64 defconfig. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index ce07285..4575fbb 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -193,6 +193,7 @@ CONFIG_RAVB=y + CONFIG_SMC91X=y + CONFIG_SMSC911X=y + CONFIG_STMMAC_ETH=m ++CONFIG_DWMAC_SUN8I=m + CONFIG_MDIO_BUS_MUX_MMIOREG=y + CONFIG_MESON_GXL_PHY=m + CONFIG_MICREL_PHY=y +From patchwork Mon Jun 5 19:21:26 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/5] ARM: sun8i: orangepi-plus: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9767313 +Message-Id: <20170605192130.25320-2-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:26 +0200 + +The dwmac-sun8i hardware is present on the Orange PI plus. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +index 8c40ab7bfa72..331ed683ac62 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -47,6 +47,20 @@ + model = "Xunlong Orange Pi Plus / Plus 2"; + compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + ++ aliases { ++ ethernet0 = &emac; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; +@@ -64,6 +78,24 @@ + status = "okay"; + }; + +&emac { + pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; +From patchwork Mon Jun 5 19:21:27 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9767321 +Message-Id: <20170605192130.25320-3-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:27 +0200 + +The dwmac-sun8i hardware is present on the Banana Pi M2+ +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++ + 1 file changed, 29 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +index 883072b611fa..d756ff825116 100644 +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +@@ -52,6 +52,7 @@ + compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -84,6 +85,16 @@ + }; + }; + ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; +@@ -104,12 +115,30 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; + status = "okay"; +}; + + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +From patchwork Mon Jun 5 19:21:28 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [3/5] ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9767347 +Message-Id: <20170605192130.25320-4-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:28 +0200 + +The dwmac-sun8i hardware is present on the Orange PI PC2. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. +Signed-off-by: Corentin Labbe +--- + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 27 ++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +index dfecc17dcc92..a8296feee884 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +@@ -59,6 +59,7 @@ + }; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -91,6 +92,16 @@ + }; + }; + ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb0_vbus: usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; +@@ -126,12 +137,28 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +From patchwork Wed May 31 07:18:44 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v6,13/21] arm: sun8i: nanopi-neo: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9756089 +Message-Id: <20170531071852.12422-14-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Wed, 31 May 2017 09:18:44 +0200 + +The dwmac-sun8i hardware is present on the NanoPi Neo. +It uses the internal PHY. +This patch create the needed emac node. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +index 8d2cc6e9a03f..78f6c24952dd 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +@@ -46,3 +46,10 @@ + model = "FriendlyARM NanoPi NEO"; + compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + }; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; +From 051516f1c20c7d7c274c91b4c2fa73bc8d7fc372 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sat, 22 Jul 2017 15:08:12 +0100 +Subject: [PATCH] fix mac assignment so we get static not dynamic MACs + +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +index 0d1f026d831a..ba2fde2909f9 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -51,6 +51,7 @@ + compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index 3b491c0e3b0d..8442eb6c9244 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -51,6 +51,7 @@ + compatible = "pine64,pine64", "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +-- +2.13.3 + diff --git a/Back-out-qxl-atomic-delay.patch b/Back-out-qxl-atomic-delay.patch new file mode 100644 index 0000000..5bd8acf --- /dev/null +++ b/Back-out-qxl-atomic-delay.patch @@ -0,0 +1,41 @@ +From 4bcc0c3835cbcc9f9c175f158e2ee502506b6e02 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team +Date: Thu, 3 Aug 2017 13:53:11 -0500 +Subject: [PATCH] Back out qxl atomic delay + +--- + drivers/gpu/drm/qxl/qxl_display.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c +index 4a340ef..058340a 100644 +--- a/drivers/gpu/drm/qxl/qxl_display.c ++++ b/drivers/gpu/drm/qxl/qxl_display.c +@@ -575,6 +575,8 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, + if (ret) + return; + ++ cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release); ++ + if (fb != old_state->fb) { + obj = to_qxl_framebuffer(fb)->obj; + user_bo = gem_to_qxl_bo(obj); +@@ -612,7 +614,6 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, + qxl_bo_kunmap(cursor_bo); + qxl_bo_kunmap(user_bo); + +- cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release); + cmd->u.set.visible = 1; + cmd->u.set.shape = qxl_bo_physical_address(qdev, + cursor_bo, 0); +@@ -623,7 +624,6 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, + if (ret) + goto out_free_release; + +- cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release); + cmd->type = QXL_CURSOR_MOVE; + } + +-- +2.13.3 + diff --git a/CVE-2017-11473.patch b/CVE-2017-11473.patch deleted file mode 100644 index e3e0658..0000000 --- a/CVE-2017-11473.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 70ac67826602edf8c0ccb413e5ba7eacf597a60c Mon Sep 17 00:00:00 2001 -From: Seunghun Han -Date: Tue, 18 Jul 2017 20:03:51 +0900 -Subject: x86/acpi: Prevent out of bound access caused by broken ACPI tables - -The bus_irq argument of mp_override_legacy_irq() is used as the index into -the isa_irq_to_gsi[] array. The bus_irq argument originates from -ACPI_MADT_TYPE_IO_APIC and ACPI_MADT_TYPE_INTERRUPT items in the ACPI -tables, but is nowhere sanity checked. - -That allows broken or malicious ACPI tables to overwrite memory, which -might cause malfunction, panic or arbitrary code execution. - -Add a sanity check and emit a warning when that triggers. - -[ tglx: Added warning and rewrote changelog ] - -Signed-off-by: Seunghun Han -Signed-off-by: Thomas Gleixner -Cc: security@kernel.org -Cc: "Rafael J. Wysocki" -Cc: stable@vger.kernel.org ---- - arch/x86/kernel/acpi/boot.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c -index 6bb6806..7491e73 100644 ---- a/arch/x86/kernel/acpi/boot.c -+++ b/arch/x86/kernel/acpi/boot.c -@@ -347,6 +347,14 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, - struct mpc_intsrc mp_irq; - - /* -+ * Check bus_irq boundary. -+ */ -+ if (bus_irq >= NR_IRQS_LEGACY) { -+ pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq); -+ return; -+ } -+ -+ /* - * Convert 'gsi' to 'ioapic.pin'. - */ - ioapic = mp_find_ioapic(gsi); --- -cgit v1.1 - diff --git a/CVE-2017-7184.patch b/CVE-2017-7184.patch deleted file mode 100644 index b2d48b0..0000000 --- a/CVE-2017-7184.patch +++ /dev/null @@ -1,154 +0,0 @@ -From c282222a45cb9503cbfbebfdb60491f06ae84b49 Mon Sep 17 00:00:00 2001 -From: Florian Westphal -Date: Wed, 8 Feb 2017 11:52:29 +0100 -Subject: xfrm: policy: init locks early - -From: Florian Westphal - -commit c282222a45cb9503cbfbebfdb60491f06ae84b49 upstream. - -Dmitry reports following splat: - INFO: trying to register non-static key. - the code is fine but needs lockdep annotation. - turning off the locking correctness validator. - CPU: 0 PID: 13059 Comm: syz-executor1 Not tainted 4.10.0-rc7-next-20170207 #1 -[..] - spin_lock_bh include/linux/spinlock.h:304 [inline] - xfrm_policy_flush+0x32/0x470 net/xfrm/xfrm_policy.c:963 - xfrm_policy_fini+0xbf/0x560 net/xfrm/xfrm_policy.c:3041 - xfrm_net_init+0x79f/0x9e0 net/xfrm/xfrm_policy.c:3091 - ops_init+0x10a/0x530 net/core/net_namespace.c:115 - setup_net+0x2ed/0x690 net/core/net_namespace.c:291 - copy_net_ns+0x26c/0x530 net/core/net_namespace.c:396 - create_new_namespaces+0x409/0x860 kernel/nsproxy.c:106 - unshare_nsproxy_namespaces+0xae/0x1e0 kernel/nsproxy.c:205 - SYSC_unshare kernel/fork.c:2281 [inline] - -Problem is that when we get error during xfrm_net_init we will call -xfrm_policy_fini which will acquire xfrm_policy_lock before it was -initialized. Just move it around so locks get set up first. - -Reported-by: Dmitry Vyukov -Fixes: 283bc9f35bbbcb0e9 ("xfrm: Namespacify xfrm state/policy locks") -Signed-off-by: Florian Westphal -Signed-off-by: Steffen Klassert -Signed-off-by: Greg Kroah-Hartman - ---- - net/xfrm/xfrm_policy.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/net/xfrm/xfrm_policy.c -+++ b/net/xfrm/xfrm_policy.c -@@ -3062,6 +3062,11 @@ static int __net_init xfrm_net_init(stru - { - int rv; - -+ /* Initialize the per-net locks here */ -+ spin_lock_init(&net->xfrm.xfrm_state_lock); -+ spin_lock_init(&net->xfrm.xfrm_policy_lock); -+ mutex_init(&net->xfrm.xfrm_cfg_mutex); -+ - rv = xfrm_statistics_init(net); - if (rv < 0) - goto out_statistics; -@@ -3078,11 +3083,6 @@ static int __net_init xfrm_net_init(stru - if (rv < 0) - goto out; - -- /* Initialize the per-net locks here */ -- spin_lock_init(&net->xfrm.xfrm_state_lock); -- spin_lock_init(&net->xfrm.xfrm_policy_lock); -- mutex_init(&net->xfrm.xfrm_cfg_mutex); -- - return 0; - - out: -From 677e806da4d916052585301785d847c3b3e6186a Mon Sep 17 00:00:00 2001 -From: Andy Whitcroft -Date: Wed, 22 Mar 2017 07:29:31 +0000 -Subject: xfrm_user: validate XFRM_MSG_NEWAE XFRMA_REPLAY_ESN_VAL replay_window - -From: Andy Whitcroft - -commit 677e806da4d916052585301785d847c3b3e6186a upstream. - -When a new xfrm state is created during an XFRM_MSG_NEWSA call we -validate the user supplied replay_esn to ensure that the size is valid -and to ensure that the replay_window size is within the allocated -buffer. However later it is possible to update this replay_esn via a -XFRM_MSG_NEWAE call. There we again validate the size of the supplied -buffer matches the existing state and if so inject the contents. We do -not at this point check that the replay_window is within the allocated -memory. This leads to out-of-bounds reads and writes triggered by -netlink packets. This leads to memory corruption and the potential for -priviledge escalation. - -We already attempt to validate the incoming replay information in -xfrm_new_ae() via xfrm_replay_verify_len(). This confirms that the user -is not trying to change the size of the replay state buffer which -includes the replay_esn. It however does not check the replay_window -remains within that buffer. Add validation of the contained -replay_window. - -CVE-2017-7184 -Signed-off-by: Andy Whitcroft -Acked-by: Steffen Klassert -Signed-off-by: Linus Torvalds -Signed-off-by: Greg Kroah-Hartman - ---- - net/xfrm/xfrm_user.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/net/xfrm/xfrm_user.c -+++ b/net/xfrm/xfrm_user.c -@@ -415,6 +415,9 @@ static inline int xfrm_replay_verify_len - if (nla_len(rp) < ulen || xfrm_replay_state_esn_len(replay_esn) != ulen) - return -EINVAL; - -+ if (up->replay_window > up->bmp_len * sizeof(__u32) * 8) -+ return -EINVAL; -+ - return 0; - } - -From f843ee6dd019bcece3e74e76ad9df0155655d0df Mon Sep 17 00:00:00 2001 -From: Andy Whitcroft -Date: Thu, 23 Mar 2017 07:45:44 +0000 -Subject: xfrm_user: validate XFRM_MSG_NEWAE incoming ESN size harder - -From: Andy Whitcroft - -commit f843ee6dd019bcece3e74e76ad9df0155655d0df upstream. - -Kees Cook has pointed out that xfrm_replay_state_esn_len() is subject to -wrapping issues. To ensure we are correctly ensuring that the two ESN -structures are the same size compare both the overall size as reported -by xfrm_replay_state_esn_len() and the internal length are the same. - -CVE-2017-7184 -Signed-off-by: Andy Whitcroft -Acked-by: Steffen Klassert -Signed-off-by: Linus Torvalds -Signed-off-by: Greg Kroah-Hartman - ---- - net/xfrm/xfrm_user.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/net/xfrm/xfrm_user.c -+++ b/net/xfrm/xfrm_user.c -@@ -412,7 +412,11 @@ static inline int xfrm_replay_verify_len - up = nla_data(rp); - ulen = xfrm_replay_state_esn_len(up); - -- if (nla_len(rp) < ulen || xfrm_replay_state_esn_len(replay_esn) != ulen) -+ /* Check the overall length and the internal bitmap length to avoid -+ * potential overflow. */ -+ if (nla_len(rp) < ulen || -+ xfrm_replay_state_esn_len(replay_esn) != ulen || -+ replay_esn->bmp_len != up->bmp_len) - return -EINVAL; - - if (up->replay_window > up->bmp_len * sizeof(__u32) * 8) diff --git a/CVE-2017-7645.patch b/CVE-2017-7645.patch deleted file mode 100644 index 0be019c..0000000 --- a/CVE-2017-7645.patch +++ /dev/null @@ -1,180 +0,0 @@ -From: "J. Bruce Fields" -Date: 2017-04-14 15:04:40 -Subject: [PATCH] nfsd: check for oversized NFSv2/v3 arguments - -A client can append random data to the end of an NFSv2 or NFSv3 RPC call -without our complaining; we'll just stop parsing at the end of the -expected data and ignore the rest. - -Encoded arguments and replies are stored together in an array of pages, -and if a call is too large it could leave inadequate space for the -reply. This is normally OK because NFS RPC's typically have either -short arguments and long replies (like READ) or long arguments and short -replies (like WRITE). But a client that sends an incorrectly long reply -can violate those assumptions. This was observed to cause crashes. - -So, insist that the argument not be any longer than we expect. - -Also, several operations increment rq_next_page in the decode routine -before checking the argument size, which can leave rq_next_page pointing -well past the end of the page array, causing trouble later in -svc_free_pages. - -As followup we may also want to rewrite the encoding routines to check -more carefully that they aren't running off the end of the page array. - -Reported-by: Tuomas Haanpää -Reported-by: Ari Kauppi -Cc: stable@vger.kernel.org -Signed-off-by: J. Bruce Fields ---- - fs/nfsd/nfs3xdr.c | 23 +++++++++++++++++------ - fs/nfsd/nfsxdr.c | 13 ++++++++++--- - include/linux/sunrpc/svc.h | 3 +-- - 3 files changed, 28 insertions(+), 11 deletions(-) - -diff --git a/fs/nfsd/nfs3xdr.c b/fs/nfsd/nfs3xdr.c -index dba2ff8eaa68..be66bcadfaea 100644 ---- a/fs/nfsd/nfs3xdr.c -+++ b/fs/nfsd/nfs3xdr.c -@@ -334,8 +334,11 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - if (!p) - return 0; - p = xdr_decode_hyper(p, &args->offset); -- - args->count = ntohl(*p++); -+ -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - len = min(args->count, max_blocksize); - - /* set up the kvec */ -@@ -349,7 +352,7 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - v++; - } - args->vlen = v; -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -536,9 +539,11 @@ nfs3svc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, - p = decode_fh(p, &args->fh); - if (!p) - return 0; -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -564,10 +569,14 @@ nfs3svc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, - args->verf = p; p += 2; - args->dircount = ~0; - args->count = ntohl(*p++); -+ -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - args->count = min_t(u32, args->count, PAGE_SIZE); - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -585,6 +594,9 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, - args->dircount = ntohl(*p++); - args->count = ntohl(*p++); - -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - len = args->count = min(args->count, max_blocksize); - while (len > 0) { - struct page *p = *(rqstp->rq_next_page++); -@@ -592,8 +604,7 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, - args->buffer = page_address(p); - len -= PAGE_SIZE; - } -- -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c -index 41b468a6a90f..79268369f7b3 100644 ---- a/fs/nfsd/nfsxdr.c -+++ b/fs/nfsd/nfsxdr.c -@@ -257,6 +257,9 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - len = args->count = ntohl(*p++); - p++; /* totalcount - unused */ - -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - len = min_t(unsigned int, len, NFSSVC_MAXBLKSIZE_V2); - - /* set up somewhere to store response. -@@ -272,7 +275,7 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - v++; - } - args->vlen = v; -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -360,9 +363,11 @@ nfssvc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, struct nfsd_readli - p = decode_fh(p, &args->fh); - if (!p) - return 0; -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -400,9 +405,11 @@ nfssvc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, - args->cookie = ntohl(*p++); - args->count = ntohl(*p++); - args->count = min_t(u32, args->count, PAGE_SIZE); -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - /* -diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h -index e770abeed32d..6ef19cf658b4 100644 ---- a/include/linux/sunrpc/svc.h -+++ b/include/linux/sunrpc/svc.h -@@ -336,8 +336,7 @@ xdr_argsize_check(struct svc_rqst *rqstp, __be32 *p) - { - char *cp = (char *)p; - struct kvec *vec = &rqstp->rq_arg.head[0]; -- return cp >= (char*)vec->iov_base -- && cp <= (char*)vec->iov_base + vec->iov_len; -+ return cp == (char *)vec->iov_base + vec->iov_len; - } - - static inline int --- -2.9.3 - --- -To unsubscribe from this list: send the line "unsubscribe linux-nfs" in -the body of a message to majordomo@vger.kernel.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Fix-for-module-sig-verification.patch b/Fix-for-module-sig-verification.patch new file mode 100644 index 0000000..3a5de65 --- /dev/null +++ b/Fix-for-module-sig-verification.patch @@ -0,0 +1,24 @@ +From ea6e7d9d0fe3e448aef19b3943d4897ae0bef128 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team +Date: Thu, 3 Aug 2017 13:46:51 -0500 +Subject: [PATCH] Fix for module sig verification + +--- + kernel/module_signing.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/module_signing.c b/kernel/module_signing.c +index 937c844..d3d6f95 100644 +--- a/kernel/module_signing.c ++++ b/kernel/module_signing.c +@@ -81,6 +81,6 @@ int mod_verify_sig(const void *mod, unsigned long *_modlen) + } + + return verify_pkcs7_signature(mod, modlen, mod + modlen, sig_len, +- NULL, VERIFYING_MODULE_SIGNATURE, ++ (void *)1UL, VERIFYING_MODULE_SIGNATURE, + NULL, NULL); + } +-- +2.13.3 + diff --git a/HID-rmi-Make-sure-the-HID-device-is-opened-on-resume.patch b/HID-rmi-Make-sure-the-HID-device-is-opened-on-resume.patch new file mode 100644 index 0000000..d7d6269 --- /dev/null +++ b/HID-rmi-Make-sure-the-HID-device-is-opened-on-resume.patch @@ -0,0 +1,74 @@ +From patchwork Sun Jul 23 01:15:09 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: HID: rmi: Make sure the HID device is opened on resume +From: Lyude +X-Patchwork-Id: 9858267 +Message-Id: <20170723011509.23651-1-lyude@redhat.com> +To: linux-input@vger.kernel.org +Cc: Lyude , Andrew Duggan , + stable@vger.kernel.org, Jiri Kosina , + Benjamin Tissoires , + linux-kernel@vger.kernel.org +Date: Sat, 22 Jul 2017 21:15:09 -0400 + +So it looks like that suspend/resume has actually always been broken on +hid-rmi. The fact it worked was a rather silly coincidence that was +relying on the HID device to already be opened upon resume. This means +that so long as anything was reading the /dev/input/eventX node for for +an RMI device, it would suspend and resume correctly. As well, if +nothing happened to be keeping the HID device away it would shut off, +then the RMI driver would get confused on resume when it stopped +responding and explode. + +So, call hid_hw_open() in rmi_post_resume() so we make sure that the +device is alive before we try talking to it. + +This fixes RMI device suspend/resume over HID. + +Signed-off-by: Lyude +Cc: Andrew Duggan +Cc: stable@vger.kernel.org +--- + drivers/hid/hid-rmi.c | 15 +++++++++++---- + 1 file changed, 11 insertions(+), 4 deletions(-) + +diff --git a/drivers/hid/hid-rmi.c b/drivers/hid/hid-rmi.c +index 5b40c2614599..e7d124f9a27f 100644 +--- a/drivers/hid/hid-rmi.c ++++ b/drivers/hid/hid-rmi.c +@@ -431,22 +431,29 @@ static int rmi_post_resume(struct hid_device *hdev) + { + struct rmi_data *data = hid_get_drvdata(hdev); + struct rmi_device *rmi_dev = data->xport.rmi_dev; +- int ret; ++ int ret = 0; + + if (!(data->device_flags & RMI_DEVICE)) + return 0; + +- ret = rmi_reset_attn_mode(hdev); ++ /* Make sure the HID device is ready to receive events */ ++ ret = hid_hw_open(hdev); + if (ret) + return ret; + ++ ret = rmi_reset_attn_mode(hdev); ++ if (ret) ++ goto out; ++ + ret = rmi_driver_resume(rmi_dev, false); + if (ret) { + hid_warn(hdev, "Failed to resume device: %d\n", ret); +- return ret; ++ goto out; + } + +- return 0; ++out: ++ hid_hw_close(hdev); ++ return ret; + } + #endif /* CONFIG_PM */ + diff --git a/KEYS-Add-a-system-blacklist-keyring.patch b/KEYS-Add-a-system-blacklist-keyring.patch deleted file mode 100644 index 262c960..0000000 --- a/KEYS-Add-a-system-blacklist-keyring.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 2a54526850121cd0d7cf649a321488b4dab5731d Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Fri, 26 Oct 2012 12:36:24 -0400 -Subject: [PATCH 17/20] KEYS: Add a system blacklist keyring - -This adds an additional keyring that is used to store certificates that -are blacklisted. This keyring is searched first when loading signed modules -and if the module's certificate is found, it will refuse to load. This is -useful in cases where third party certificates are used for module signing. - -Signed-off-by: Josh Boyer ---- - certs/system_keyring.c | 22 ++++++++++++++++++++++ - include/keys/system_keyring.h | 4 ++++ - init/Kconfig | 9 +++++++++ - 3 files changed, 35 insertions(+) - -diff --git a/certs/system_keyring.c b/certs/system_keyring.c -index 50979d6dcecd..787eeead2f57 100644 ---- a/certs/system_keyring.c -+++ b/certs/system_keyring.c -@@ -22,6 +22,9 @@ static struct key *builtin_trusted_keys; - #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING - static struct key *secondary_trusted_keys; - #endif -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+struct key *system_blacklist_keyring; -+#endif - - extern __initconst const u8 system_certificate_list[]; - extern __initconst const unsigned long system_certificate_list_size; -@@ -99,6 +102,16 @@ static __init int system_trusted_keyring_init(void) - if (key_link(secondary_trusted_keys, builtin_trusted_keys) < 0) - panic("Can't link trusted keyrings\n"); - #endif -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+ system_blacklist_keyring = keyring_alloc(".system_blacklist_keyring", -+ KUIDT_INIT(0), KGIDT_INIT(0), current_cred(), -+ ((KEY_POS_ALL & ~KEY_POS_SETATTR) | -+ KEY_USR_VIEW | KEY_USR_READ | KEY_USR_SEARCH), -+ KEY_ALLOC_NOT_IN_QUOTA, -+ NULL, NULL); -+ if (IS_ERR(system_blacklist_keyring)) -+ panic("Can't allocate system blacklist keyring\n"); -+#endif - - return 0; - } -@@ -214,6 +227,15 @@ int verify_pkcs7_signature(const void *data, size_t len, - trusted_keys = builtin_trusted_keys; - #endif - } -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+ ret = pkcs7_validate_trust(pkcs7, system_blacklist_keyring); -+ if (!ret) { -+ /* module is signed with a cert in the blacklist. reject */ -+ pr_err("Module key is in the blacklist\n"); -+ ret = -EKEYREJECTED; -+ goto error; -+ } -+#endif - ret = pkcs7_validate_trust(pkcs7, trusted_keys); - if (ret < 0) { - if (ret == -ENOKEY) -diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h -index fbd4647767e9..5bc291a3d261 100644 ---- a/include/keys/system_keyring.h -+++ b/include/keys/system_keyring.h -@@ -33,6 +33,10 @@ extern int restrict_link_by_builtin_and_secondary_trusted( - #define restrict_link_by_builtin_and_secondary_trusted restrict_link_by_builtin_trusted - #endif - -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+extern struct key *system_blacklist_keyring; -+#endif -+ - #ifdef CONFIG_IMA_BLACKLIST_KEYRING - extern struct key *ima_blacklist_keyring; - -diff --git a/init/Kconfig b/init/Kconfig -index 34407f15e6d3..461ad575a608 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1859,6 +1859,15 @@ config SYSTEM_DATA_VERIFICATION - module verification, kexec image verification and firmware blob - verification. - -+config SYSTEM_BLACKLIST_KEYRING -+ bool "Provide system-wide ring of blacklisted keys" -+ depends on KEYS -+ help -+ Provide a system keyring to which blacklisted keys can be added. -+ Keys in the keyring are considered entirely untrusted. Keys in this -+ keyring are used by the module signature checking to reject loading -+ of modules signed with a blacklisted key. -+ - config PROFILING - bool "Profiling support" - help --- -2.9.3 - diff --git a/KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch b/KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch new file mode 100644 index 0000000..1cc1e53 --- /dev/null +++ b/KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch @@ -0,0 +1,95 @@ +From fb2ac204a70da565de9ef9a9d6d69a40c2d59727 Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Fri, 5 May 2017 08:21:56 +0100 +Subject: [PATCH] KEYS: Allow unrestricted boot-time addition of keys to + secondary keyring + +Allow keys to be added to the system secondary certificates keyring during +kernel initialisation in an unrestricted fashion. Such keys are implicitly +trusted and don't have their trust chains checked on link. + +This allows keys in the UEFI database to be added in secure boot mode for +the purposes of module signing. + +Signed-off-by: David Howells +--- + certs/internal.h | 18 ++++++++++++++++++ + certs/system_keyring.c | 33 +++++++++++++++++++++++++++++++++ + 2 files changed, 51 insertions(+) + create mode 100644 certs/internal.h + +diff --git a/certs/internal.h b/certs/internal.h +new file mode 100644 +index 0000000..5dcbefb +--- /dev/null ++++ b/certs/internal.h +@@ -0,0 +1,18 @@ ++/* Internal definitions ++ * ++ * Copyright (C) 2016 Red Hat, Inc. All Rights Reserved. ++ * Written by David Howells (dhowells@redhat.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++/* ++ * system_keyring.c ++ */ ++#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING ++extern void __init add_trusted_secondary_key(const char *source, ++ const void *data, size_t len); ++#endif +diff --git a/certs/system_keyring.c b/certs/system_keyring.c +index 6251d1b..5ac8ba6 100644 +--- a/certs/system_keyring.c ++++ b/certs/system_keyring.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include "internal.h" + + static struct key *builtin_trusted_keys; + #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING +@@ -265,3 +266,35 @@ int verify_pkcs7_signature(const void *data, size_t len, + EXPORT_SYMBOL_GPL(verify_pkcs7_signature); + + #endif /* CONFIG_SYSTEM_DATA_VERIFICATION */ ++ ++#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING ++/** ++ * add_trusted_secondary_key - Add to secondary keyring with no validation ++ * @source: Source of key ++ * @data: The blob holding the key ++ * @len: The length of the data blob ++ * ++ * Add a key to the secondary keyring without checking its trust chain. This ++ * is available only during kernel initialisation. ++ */ ++void __init add_trusted_secondary_key(const char *source, ++ const void *data, size_t len) ++{ ++ key_ref_t key; ++ ++ key = key_create_or_update(make_key_ref(secondary_trusted_keys, 1), ++ "asymmetric", ++ NULL, data, len, ++ (KEY_POS_ALL & ~KEY_POS_SETATTR) | ++ KEY_USR_VIEW, ++ KEY_ALLOC_NOT_IN_QUOTA | ++ KEY_ALLOC_BYPASS_RESTRICTION); ++ ++ if (IS_ERR(key)) ++ pr_err("Problem loading %s X.509 certificate (%ld)\n", ++ source, PTR_ERR(key)); ++ else ++ pr_notice("Loaded %s cert '%s' linked to secondary sys keyring\n", ++ source, key_ref_to_ptr(key)->description); ++} ++#endif /* CONFIG_SECONDARY_TRUSTED_KEYRING */ +-- +2.9.3 + diff --git a/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch b/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch deleted file mode 100644 index 6f5d8b6..0000000 --- a/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 71db1b222ecdf6cb4356f6f1e2bd45cd2f0e85e1 Mon Sep 17 00:00:00 2001 -From: Laura Abbott -Date: Tue, 18 Oct 2016 13:58:44 -0700 -Subject: [PATCH] MODSIGN: Don't try secure boot if EFI runtime is disabled - -Secure boot depends on having EFI runtime variable access. The code -does not handle a lack of runtime variables gracefully. Add a check -to just bail out of EFI runtime is disabled. - -Signed-off-by: Laura Abbott ---- - kernel/modsign_uefi.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c -index a41da14..2bdaf76 100644 ---- a/kernel/modsign_uefi.c -+++ b/kernel/modsign_uefi.c -@@ -71,6 +71,10 @@ static int __init load_uefi_certs(void) - if (!efi_enabled(EFI_SECURE_BOOT)) - return 0; - -+ /* Things blow up if efi runtime is disabled */ -+ if (efi_runtime_disabled()) -+ return 0; -+ - keyring = get_system_keyring(); - if (!keyring) { - pr_err("MODSIGN: Couldn't get system keyring\n"); --- -2.7.4 - diff --git a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch index 76084d4..08195ff 100644 --- a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch +++ b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch @@ -1,7 +1,7 @@ -From 8a4535bcfe24d317be675e53cdc8c61d22fdc7f3 Mon Sep 17 00:00:00 2001 +From 90dc66270b02981b19a085c6a9184e3452b7b3e8 Mon Sep 17 00:00:00 2001 From: Josh Boyer -Date: Fri, 26 Oct 2012 12:42:16 -0400 -Subject: [PATCH 18/20] MODSIGN: Import certificates from UEFI Secure Boot +Date: Fri, 5 May 2017 08:21:59 +0100 +Subject: [PATCH 3/4] MODSIGN: Import certificates from UEFI Secure Boot Secure Boot stores a list of allowed certificates in the 'db' variable. This imports those certificates into the system trusted keyring. This @@ -11,104 +11,68 @@ variable, a user can allow a module signed with that certificate to load. The shim UEFI bootloader has a similar certificate list stored in the 'MokListRT' variable. We import those as well. -In the opposite case, Secure Boot maintains a list of disallowed -certificates in the 'dbx' variable. We load those certificates into -the newly introduced system blacklist keyring and forbid any module -signed with those from loading. +Secure Boot also maintains a list of disallowed certificates in the 'dbx' +variable. We load those certificates into the newly introduced system +blacklist keyring and forbid any module signed with those from loading and +forbid the use within the kernel of any key with a matching hash. + +This facility is enabled by setting CONFIG_LOAD_UEFI_KEYS. Signed-off-by: Josh Boyer +Signed-off-by: David Howells --- - certs/system_keyring.c | 13 ++++++ - include/keys/system_keyring.h | 1 + - init/Kconfig | 9 ++++ - kernel/Makefile | 3 ++ - kernel/modsign_uefi.c | 99 +++++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 125 insertions(+) - create mode 100644 kernel/modsign_uefi.c + certs/Kconfig | 16 ++++++ + certs/Makefile | 4 ++ + certs/load_uefi.c | 168 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 188 insertions(+) + create mode 100644 certs/load_uefi.c -diff --git a/certs/system_keyring.c b/certs/system_keyring.c -index 787eeead2f57..4d9123ed5c07 100644 ---- a/certs/system_keyring.c -+++ b/certs/system_keyring.c -@@ -30,6 +30,19 @@ extern __initconst const u8 system_certificate_list[]; - extern __initconst const unsigned long system_certificate_list_size; - - /** -+ * get_system_keyring - Return a pointer to the system keyring -+ * -+ */ -+struct key *get_system_keyring(void) -+{ -+ struct key *system_keyring = NULL; -+ -+ system_keyring = builtin_trusted_keys; -+ return system_keyring; -+} -+EXPORT_SYMBOL_GPL(get_system_keyring); -+ -+/** - * restrict_link_to_builtin_trusted - Restrict keyring addition by built in CA - * - * Restrict the addition of keys into a keyring based on the key-to-be-added -diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h -index 5bc291a3d261..56ff5715ab67 100644 ---- a/include/keys/system_keyring.h -+++ b/include/keys/system_keyring.h -@@ -36,6 +36,7 @@ extern int restrict_link_by_builtin_and_secondary_trusted( - #ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING - extern struct key *system_blacklist_keyring; - #endif -+extern struct key *get_system_keyring(void); - - #ifdef CONFIG_IMA_BLACKLIST_KEYRING - extern struct key *ima_blacklist_keyring; -diff --git a/init/Kconfig b/init/Kconfig -index 461ad575a608..93646fd7b1c8 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -2009,6 +2009,15 @@ config MODULE_SIG_ALL - comment "Do not forget to sign required modules with scripts/sign-file" - depends on MODULE_SIG_FORCE && !MODULE_SIG_ALL - -+config MODULE_SIG_UEFI -+ bool "Allow modules signed with certs stored in UEFI" -+ depends on MODULE_SIG && SYSTEM_BLACKLIST_KEYRING && EFI -+ select EFI_SIGNATURE_LIST_PARSER +diff --git a/certs/Kconfig b/certs/Kconfig +index 630ae09..edf9f75 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -90,4 +90,20 @@ config EFI_SIGNATURE_LIST_PARSER + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + ++config LOAD_UEFI_KEYS ++ bool "Load certs and blacklist from UEFI db for module checking" ++ depends on SYSTEM_BLACKLIST_KEYRING ++ depends on SECONDARY_TRUSTED_KEYRING ++ depends on EFI ++ depends on EFI_SIGNATURE_LIST_PARSER + help -+ This will import certificates stored in UEFI and allow modules -+ signed with those to be loaded. It will also disallow loading -+ of modules stored in the UEFI dbx variable. -+ - choice - prompt "Which hash algorithm should modules be signed with?" - depends on MODULE_SIG -diff --git a/kernel/Makefile b/kernel/Makefile -index eb26e12c6c2a..e0c2268cb97e 100644 ---- a/kernel/Makefile -+++ b/kernel/Makefile -@@ -57,6 +57,7 @@ endif - obj-$(CONFIG_UID16) += uid16.o - obj-$(CONFIG_MODULES) += module.o - obj-$(CONFIG_MODULE_SIG) += module_signing.o -+obj-$(CONFIG_MODULE_SIG_UEFI) += modsign_uefi.o - obj-$(CONFIG_KALLSYMS) += kallsyms.o - obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o - obj-$(CONFIG_KEXEC_CORE) += kexec_core.o -@@ -113,6 +114,8 @@ obj-$(CONFIG_MEMBARRIER) += membarrier.o - - obj-$(CONFIG_HAS_IOMEM) += memremap.o - -+$(obj)/modsign_uefi.o: KBUILD_CFLAGS += -fshort-wchar -+ - $(obj)/configs.o: $(obj)/config_data.h - - targets += config_data.gz -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c ++ If the kernel is booted in secure boot mode, this option will cause ++ the kernel to load the certificates from the UEFI db and MokListRT ++ into the secondary trusted keyring. It will also load any X.509 ++ SHA256 hashes in the dbx list into the blacklist. ++ ++ The effect of this is that, if the kernel is booted in secure boot ++ mode, modules signed with UEFI-stored keys will be permitted to be ++ loaded and keys that match the blacklist will be rejected. ++ + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 738151a..a5e057a 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -11,6 +11,10 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif + obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o + ++obj-$(CONFIG_LOAD_UEFI_KEYS) += load_uefi.o ++$(obj)/load_uefi.o: KBUILD_CFLAGS += -fshort-wchar ++ ++ + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + + $(eval $(call config_filename,SYSTEM_TRUSTED_KEYS)) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c new file mode 100644 -index 000000000000..fe4a6f2bf10a +index 0000000..b44e464 --- /dev/null -+++ b/kernel/modsign_uefi.c -@@ -0,0 +1,99 @@ ++++ b/certs/load_uefi.c +@@ -0,0 +1,168 @@ +#include +#include +#include @@ -117,14 +81,22 @@ index 000000000000..fe4a6f2bf10a +#include +#include +#include -+#include "module-internal.h" ++#include "internal.h" + -+static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size) ++static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; ++static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GUID; ++static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; ++ ++/* ++ * Get a certificate list blob from the named EFI variable. ++ */ ++static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, ++ unsigned long *size) +{ + efi_status_t status; + unsigned long lsize = 4; + unsigned long tmpdb[4]; -+ void *db = NULL; ++ void *db; + + status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb); + if (status != EFI_BUFFER_TOO_SMALL) { @@ -135,23 +107,89 @@ index 000000000000..fe4a6f2bf10a + db = kmalloc(lsize, GFP_KERNEL); + if (!db) { + pr_err("Couldn't allocate memory for uefi cert list\n"); -+ goto out; ++ return NULL; + } + + status = efi.get_variable(name, guid, NULL, &lsize, db); + if (status != EFI_SUCCESS) { + kfree(db); -+ db = NULL; + pr_err("Error reading db var: 0x%lx\n", status); ++ return NULL; + } -+out: ++ + *size = lsize; + return db; +} + +/* -+ * * Load the certs contained in the UEFI databases -+ * */ ++ * Blacklist an X509 TBS hash. ++ */ ++static __init void uefi_blacklist_x509_tbs(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "tbs:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Blacklist the hash of an executable. ++ */ ++static __init void uefi_blacklist_binary(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "bin:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI db and MokListRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_db(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_guid) == 0) ++ return add_trusted_secondary_key; ++ return 0; ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI dbx and MokListXRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_sha256_guid) == 0) ++ return uefi_blacklist_x509_tbs; ++ if (efi_guidcmp(*sig_type, efi_cert_sha256_guid) == 0) ++ return uefi_blacklist_binary; ++ return 0; ++} ++ ++/* ++ * Load the certs contained in the UEFI databases ++ */ +static int __init load_uefi_certs(void) +{ + efi_guid_t secure_var = EFI_IMAGE_SECURITY_DATABASE_GUID; @@ -159,17 +197,9 @@ index 000000000000..fe4a6f2bf10a + void *db = NULL, *dbx = NULL, *mok = NULL; + unsigned long dbsize = 0, dbxsize = 0, moksize = 0; + int rc = 0; -+ struct key *keyring = NULL; + -+ /* Check if SB is enabled and just return if not */ -+ if (!efi_enabled(EFI_SECURE_BOOT)) -+ return 0; -+ -+ keyring = get_system_keyring(); -+ if (!keyring) { -+ pr_err("MODSIGN: Couldn't get system keyring\n"); -+ return -EINVAL; -+ } ++ if (!efi.get_variable) ++ return false; + + /* Get db, MokListRT, and dbx. They might not exist, so it isn't + * an error if we can't get them. @@ -178,7 +208,8 @@ index 000000000000..fe4a6f2bf10a + if (!db) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); + } else { -+ rc = parse_efi_signature_list(db, dbsize, keyring); ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse db signatures: %d\n", rc); + kfree(db); @@ -188,7 +219,8 @@ index 000000000000..fe4a6f2bf10a + if (!mok) { + pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); + } else { -+ rc = parse_efi_signature_list(mok, moksize, keyring); ++ rc = parse_efi_signature_list("UEFI:MokListRT", ++ mok, moksize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse MokListRT signatures: %d\n", rc); + kfree(mok); @@ -198,8 +230,9 @@ index 000000000000..fe4a6f2bf10a + if (!dbx) { + pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); + } else { -+ rc = parse_efi_signature_list(dbx, dbxsize, -+ system_blacklist_keyring); ++ rc = parse_efi_signature_list("UEFI:dbx", ++ dbx, dbxsize, ++ get_handler_for_dbx); + if (rc) + pr_err("Couldn't parse dbx signatures: %d\n", rc); + kfree(dbx); diff --git a/MODSIGN-Support-not-importing-certs-from-db.patch b/MODSIGN-Support-not-importing-certs-from-db.patch index d7087b5..13fecd2 100644 --- a/MODSIGN-Support-not-importing-certs-from-db.patch +++ b/MODSIGN-Support-not-importing-certs-from-db.patch @@ -1,62 +1,62 @@ -From 9d2e5c61d5adcf7911f67ed44a1b0ff881f175bb Mon Sep 17 00:00:00 2001 +From 9f1958a0cc911e1f79b2733ee5029dbd819ff328 Mon Sep 17 00:00:00 2001 From: Josh Boyer -Date: Thu, 3 Oct 2013 10:14:23 -0400 -Subject: [PATCH 19/20] MODSIGN: Support not importing certs from db +Date: Fri, 5 May 2017 08:21:59 +0100 +Subject: [PATCH 4/4] MODSIGN: Allow the "db" UEFI variable to be suppressed If a user tells shim to not use the certs/hashes in the UEFI db variable -for verification purposes, shim will set a UEFI variable called MokIgnoreDB. -Have the uefi import code look for this and not import things from the db -variable. +for verification purposes, shim will set a UEFI variable called +MokIgnoreDB. Have the uefi import code look for this and ignore the db +variable if it is found. Signed-off-by: Josh Boyer +Signed-off-by: David Howells --- - kernel/modsign_uefi.c | 40 +++++++++++++++++++++++++++++++--------- - 1 file changed, 31 insertions(+), 9 deletions(-) + certs/load_uefi.c | 44 ++++++++++++++++++++++++++++++++++---------- + 1 file changed, 34 insertions(+), 10 deletions(-) -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c -index fe4a6f2bf10a..a41da14b1ffd 100644 ---- a/kernel/modsign_uefi.c -+++ b/kernel/modsign_uefi.c -@@ -8,6 +8,23 @@ - #include - #include "module-internal.h" - -+static __init int check_ignore_db(void) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index b44e464..3d88459 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -13,6 +13,26 @@ static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GU + static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; + + /* ++ * Look to see if a UEFI variable called MokIgnoreDB exists and return true if ++ * it does. ++ * ++ * This UEFI variable is set by the shim if a user tells the shim to not use ++ * the certs/hashes in the UEFI db variable for verification purposes. If it ++ * is set, we should ignore the db variable also and the true return indicates ++ * this. ++ */ ++static __init bool uefi_check_ignore_db(void) +{ + efi_status_t status; + unsigned int db = 0; + unsigned long size = sizeof(db); + efi_guid_t guid = EFI_SHIM_LOCK_GUID; + -+ /* Check and see if the MokIgnoreDB variable exists. If that fails -+ * then we don't ignore DB. If it succeeds, we do. -+ */ + status = efi.get_variable(L"MokIgnoreDB", &guid, NULL, &size, &db); -+ if (status != EFI_SUCCESS) -+ return 0; -+ -+ return 1; ++ return status == EFI_SUCCESS; +} + - static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size) ++/* + * Get a certificate list blob from the named EFI variable. + */ + static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, +@@ -113,7 +133,9 @@ static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_ty + } + + /* +- * Load the certs contained in the UEFI databases ++ * Load the certs contained in the UEFI databases into the secondary trusted ++ * keyring and the UEFI blacklisted X.509 cert SHA256 hashes into the blacklist ++ * keyring. + */ + static int __init load_uefi_certs(void) { - efi_status_t status; -@@ -47,7 +64,7 @@ static int __init load_uefi_certs(void) - efi_guid_t mok_var = EFI_SHIM_LOCK_GUID; - void *db = NULL, *dbx = NULL, *mok = NULL; - unsigned long dbsize = 0, dbxsize = 0, moksize = 0; -- int rc = 0; -+ int ignore_db, rc = 0; - struct key *keyring = NULL; - - /* Check if SB is enabled and just return if not */ -@@ -60,17 +77,22 @@ static int __init load_uefi_certs(void) - return -EINVAL; - } - -+ /* See if the user has setup Ignore DB mode */ -+ ignore_db = check_ignore_db(); -+ +@@ -129,15 +151,17 @@ static int __init load_uefi_certs(void) /* Get db, MokListRT, and dbx. They might not exist, so it isn't * an error if we can't get them. */ @@ -64,22 +64,24 @@ index fe4a6f2bf10a..a41da14b1ffd 100644 - if (!db) { - pr_err("MODSIGN: Couldn't get UEFI db list\n"); - } else { -- rc = parse_efi_signature_list(db, dbsize, keyring); +- rc = parse_efi_signature_list("UEFI:db", +- db, dbsize, get_handler_for_db); - if (rc) - pr_err("Couldn't parse db signatures: %d\n", rc); - kfree(db); -+ if (!ignore_db) { ++ if (!uefi_check_ignore_db()) { + db = get_cert_list(L"db", &secure_var, &dbsize); + if (!db) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); + } else { -+ rc = parse_efi_signature_list(db, dbsize, keyring); ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse db signatures: %d\n", rc); + kfree(db); + } } - + mok = get_cert_list(L"MokListRT", &mok_var, &moksize); -- 2.9.3 diff --git a/Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch b/Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch new file mode 100644 index 0000000..235c391 --- /dev/null +++ b/Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch @@ -0,0 +1,105 @@ +From 7d9e74c53a4376245b4f05006f42184a1540dee8 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 18 Jul 2017 23:21:50 +0100 +Subject: [PATCH] Revert "ARM: dts: bcm2835: Add the DSI module nodes and + clocks." + +This reverts commit 4aba4cf820545ca8ec23785c7bac40bba7e505c5. +--- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 8 ------- + arch/arm/boot/dts/bcm283x.dtsi | 48 +++----------------------------------- + 2 files changed, 3 insertions(+), 53 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index a7b5ce133784..e99bb149065f 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -98,11 +98,3 @@ + power-domains = <&power RPI_POWER_DOMAIN_VEC>; + status = "okay"; + }; +- +-&dsi0 { +- power-domains = <&power RPI_POWER_DOMAIN_DSI0>; +-}; +- +-&dsi1 { +- power-domains = <&power RPI_POWER_DOMAIN_DSI1>; +-}; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index 9444a9a9ba10..ce14c9ddf574 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -98,13 +98,10 @@ + #clock-cells = <1>; + reg = <0x7e101000 0x2000>; + +- /* CPRMAN derives almost everything from the +- * platform's oscillator. However, the DSI +- * pixel clocks come from the DSI analog PHY. ++ /* CPRMAN derives everything from the platform's ++ * oscillator. + */ +- clocks = <&clk_osc>, +- <&dsi0 0>, <&dsi0 1>, <&dsi0 2>, +- <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; ++ clocks = <&clk_osc>; + }; + + rng@7e104000 { +@@ -412,25 +409,6 @@ + interrupts = <2 14>; /* pwa1 */ + }; + +- dsi0: dsi@7e209000 { +- compatible = "brcm,bcm2835-dsi0"; +- reg = <0x7e209000 0x78>; +- interrupts = <2 4>; +- #address-cells = <1>; +- #size-cells = <0>; +- #clock-cells = <1>; +- +- clocks = <&clocks BCM2835_PLLA_DSI0>, +- <&clocks BCM2835_CLOCK_DSI0E>, +- <&clocks BCM2835_CLOCK_DSI0P>; +- clock-names = "phy", "escape", "pixel"; +- +- clock-output-names = "dsi0_byte", +- "dsi0_ddr2", +- "dsi0_ddr"; +- +- }; +- + thermal: thermal@7e212000 { + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; +@@ -497,26 +475,6 @@ + interrupts = <2 1>; + }; + +- dsi1: dsi@7e700000 { +- compatible = "brcm,bcm2835-dsi1"; +- reg = <0x7e700000 0x8c>; +- interrupts = <2 12>; +- #address-cells = <1>; +- #size-cells = <0>; +- #clock-cells = <1>; +- +- clocks = <&clocks BCM2835_PLLD_DSI1>, +- <&clocks BCM2835_CLOCK_DSI1E>, +- <&clocks BCM2835_CLOCK_DSI1P>; +- clock-names = "phy", "escape", "pixel"; +- +- clock-output-names = "dsi1_byte", +- "dsi1_ddr2", +- "dsi1_ddr"; +- +- status = "disabled"; +- }; +- + i2c1: i2c@7e804000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e804000 0x1000>; +-- +2.13.3 + diff --git a/arm-dts-boneblack-wireless-add-WL1835-Bluetooth-device-node.patch b/arm-dts-boneblack-wireless-add-WL1835-Bluetooth-device-node.patch new file mode 100644 index 0000000..b4c9456 --- /dev/null +++ b/arm-dts-boneblack-wireless-add-WL1835-Bluetooth-device-node.patch @@ -0,0 +1,40 @@ +From patchwork Mon May 22 14:51:38 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: arm: dts: boneblack-wireless: add WL1835 Bluetooth device node +From: Ricardo Salveti +X-Patchwork-Id: 9740719 +Message-Id: <1495464701-12046-1-git-send-email-ricardo.salveti@linaro.org> +To: linux-omap@vger.kernel.org +Cc: Mark Rutland , + Ricardo Salveti , devicetree@vger.kernel.org, + Tony Lindgren , Russell King , + linux-kernel@vger.kernel.org, Rob Herring , + =?UTF-8?q?Beno=C3=AEt=20Cousson?= , + robertcnelson@gmail.com, linux-arm-kernel@lists.infradead.org +Date: Mon, 22 May 2017 11:51:38 -0300 + +This adds the serial slave device for the WL1835 Bluetooth interface. + +Signed-off-by: Ricardo Salveti +--- + arch/arm/boot/dts/am335x-boneblack-wireless.dts | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts +index 105bd10..83f49f6 100644 +--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts ++++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts +@@ -97,6 +97,11 @@ + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins &bt_pins>; + status = "okay"; ++ ++ bluetooth { ++ compatible = "ti,wl1835-st"; ++ enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &gpio3 { diff --git a/arm-imx6-hummingboard2.patch b/arm-imx6-hummingboard2.patch index bcb9321..9c55a7b 100644 --- a/arm-imx6-hummingboard2.patch +++ b/arm-imx6-hummingboard2.patch @@ -26,21 +26,21 @@ index 011808490fed..ccdff6650541 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -353,6 +353,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw552x.dtb \ - imx6dl-gw553x.dtb \ + imx6dl-gw5903.dtb \ + imx6dl-gw5904.dtb \ imx6dl-hummingboard.dtb \ + imx6dl-hummingboard2.dtb \ imx6dl-icore.dtb \ imx6dl-icore-rqs.dtb \ imx6dl-nit6xlite.dtb \ @@ -397,6 +398,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw553x.dtb \ + imx6q-gw5904.dtb \ imx6q-h100.dtb \ imx6q-hummingboard.dtb \ + imx6q-hummingboard2.dtb \ imx6q-icore.dtb \ - imx6q-icore-rqs.dtb \ - imx6q-marsboard.dtb \ + imx6q-icore-ofcap10.dtb \ + imx6q-icore-ofcap12.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts new file mode 100644 index 000000000000..990b5050de5b diff --git a/arm-rk3288-tinker.patch b/arm-rk3288-tinker.patch deleted file mode 100644 index d7a4897..0000000 --- a/arm-rk3288-tinker.patch +++ /dev/null @@ -1,573 +0,0 @@ -From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 -From: Eddie Cai -Date: Tue, 14 Feb 2017 18:07:31 +0800 -Subject: ARM: dts: rockchip: add dts for RK3288-Tinker board - -This patch add basic support for RK3288-Tinker board. We can boot in to rootfs -with this patch. - -Signed-off-by: Eddie Cai -Signed-off-by: Heiko Stuebner ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++++++++++ - 2 files changed, 537 insertions(+) - create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 0118084..fb46849 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ - rk3288-popmetal.dtb \ - rk3288-r89.dtb \ - rk3288-rock2-square.dtb \ -+ rk3288-tinker.dtb \ - rk3288-veyron-brain.dtb \ - rk3288-veyron-jaq.dtb \ - rk3288-veyron-jerry.dtb \ -diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts -new file mode 100644 -index 0000000..f601c78 ---- /dev/null -+++ b/arch/arm/boot/dts/rk3288-tinker.dts -@@ -0,0 +1,536 @@ -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "rk3288.dtsi" -+#include -+ -+/ { -+ model = "Rockchip RK3288 Tinker Board"; -+ compatible = "asus,rk3288-tinker", "rockchip,rk3288"; -+ -+ memory { -+ reg = <0x0 0x80000000>; -+ device_type = "memory"; -+ }; -+ -+ ext_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <125000000>; -+ clock-output-names = "ext_gmac"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ autorepeat; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn>; -+ -+ button@0 { -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ label = "GPIO Key Power"; -+ linux,input-type = <1>; -+ wakeup-source; -+ debounce-interval = <100>; -+ }; -+ }; -+ -+ gpio-leds { -+ compatible = "gpio-leds"; -+ -+ act-led { -+ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="mmc0"; -+ }; -+ -+ heartbeat-led { -+ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="heartbeat"; -+ }; -+ -+ pwr-led { -+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-on"; -+ }; -+ }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,tinker-codec"; -+ simple-audio-card,mclk-fs = <512>; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s>; -+ }; -+ }; -+ -+ vcc_sys: vsys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_pwr>; -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ vin-supply = <&vcc_io>; -+ }; -+}; -+ -+&cpu0 { -+ cpu0-supply = <&vdd_cpu>; -+}; -+ -+&gmac { -+ assigned-clocks = <&cru SCLK_MAC>; -+ assigned-clock-parents = <&ext_gmac>; -+ clock_in_out = "input"; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc33_lan>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ snps,reset-gpio = <&gpio4 7 0>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 1000000>; -+ tx_delay = <0x30>; -+ rx_delay = <0x10>; -+ status = "ok"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c5>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio0>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, -+ <&gpio0 12 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc6-supply = <&vcc_sys>; -+ vcc7-supply = <&vcc_sys>; -+ vcc8-supply = <&vcc_io>; -+ vcc9-supply = <&vcc_io>; -+ vcc10-supply = <&vcc_io>; -+ vcc11-supply = <&vcc_sys>; -+ vcc12-supply = <&vcc_io>; -+ vddio-supply = <&vcc_io>; -+ -+ regulators { -+ vdd_cpu: DCDC_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-name = "vdd_arm"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: DCDC_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <850000>; -+ regulator-max-microvolt = <1250000>; -+ regulator-name = "vdd_gpu"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc_ddr"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io: DCDC_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc_io"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc18_ldo1: LDO_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_ldo1"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_mipi: LDO_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33_mipi"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd_10"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc18_codec: LDO_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_codec"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vccio_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vdd10_lcd: LDO_REG6 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd10_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG7 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc_18"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_lcd: LDO_REG8 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_sd: SWITCH_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc33_lan: SWITCH_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_lan"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2c2 { -+ status = "okay"; -+}; -+ -+&i2c5 { -+ status = "okay"; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ sdcard-supply = <&vccio_sd>; -+}; -+ -+&pinctrl { -+ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { -+ drive-strength = <8>; -+ }; -+ -+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { -+ bias-pull-up; -+ drive-strength = <8>; -+ }; -+ -+ backlight { -+ bl_en: bl-en { -+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ eth_phy { -+ eth_phy_pwr: eth-phy-pwr { -+ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int: pmic-int { -+ rockchip,pins = ; -+ }; -+ -+ dvs_1: dvs-1 { -+ rockchip,pins = ; -+ }; -+ -+ dvs_2: dvs-2 { -+ rockchip,pins = ; -+ }; -+ }; -+ -+ sdmmc { -+ sdmmc_bus4: sdmmc-bus4 { -+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_clk: sdmmc-clk { -+ rockchip,pins = <6 20 RK_FUNC_1 \ -+ &pcfg_pull_none_drv_8ma>; -+ }; -+ -+ sdmmc_cmd: sdmmc-cmd { -+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_pwr: sdmmc-pwr { -+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pwr_3g: pwr-3g { -+ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcc18_ldo1>; -+ status ="okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ card-detect-delay = <200>; -+ disable-wp; /* wp not hooked up */ -+ num-slots = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ status = "okay"; -+ vmmc-supply = <&vcc33_sd>; -+ vqmmc-supply = <&vccio_sd>; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ -+ status = "okay"; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&uart3 { -+ status = "okay"; -+}; -+ -+&uart4 { -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1 { -+ status = "okay"; -+}; -+ -+&usb_otg { -+ status= "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; -+ -+&wdt { -+ status = "okay"; -+}; --- -cgit v1.1 - diff --git a/arm-tegra-fix-gpu-iommu.patch b/arm-tegra-fix-gpu-iommu.patch new file mode 100644 index 0000000..8d2809b --- /dev/null +++ b/arm-tegra-fix-gpu-iommu.patch @@ -0,0 +1,95 @@ +From patchwork Sun Jul 9 16:36:14 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: ARM: tegra: Register host1x node with iommu binding on tegra124 +From: Paul Kocialkowski +X-Patchwork-Id: 9831825 +Message-Id: <20170709163614.6746-1-contact@paulk.fr> +To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, + linux-kernel@vger.kernel.org +Cc: Thierry Reding , + Stephen Warren , + Mikko Perttunen , + Paul Kocialkowski , + Jonathan Hunter +Date: Sun, 9 Jul 2017 19:36:14 +0300 + +This registers the host1x node with the SMMU (as HC swgroup) to allow +the host1x code to attach to it. It avoid failing the probe sequence, +which resulted in the tegra drm driver not probing and thus nothing +being displayed on-screen. + +Signed-off-by: Paul Kocialkowski +--- + arch/arm/boot/dts/tegra124.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi +index 187a36c6d0fc..b3b89befffeb 100644 +--- a/arch/arm/boot/dts/tegra124.dtsi ++++ b/arch/arm/boot/dts/tegra124.dtsi +@@ -85,6 +85,7 @@ + clocks = <&tegra_car TEGRA124_CLK_HOST1X>; + resets = <&tegra_car 28>; + reset-names = "host1x"; ++ iommus = <&mc TEGRA_SWGROUP_HC>; + + #address-cells = <2>; + #size-cells = <2>; +From patchwork Mon Jul 10 19:33:05 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: gpu: host1x: Free the IOMMU domain when there is no device to attach +From: Paul Kocialkowski +X-Patchwork-Id: 9833721 +Message-Id: <20170710193305.5987-1-contact@paulk.fr> +To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, + linux-kernel@vger.kernel.org +Cc: Thierry Reding , + Stephen Warren , + Mikko Perttunen , + Paul Kocialkowski , + Jonathan Hunter +Date: Mon, 10 Jul 2017 21:33:05 +0200 + +When there is no device to attach to the IOMMU domain, as may be the +case when the device-tree does not contain the proper iommu node, it is +best to keep going without IOMMU support rather than failing. +This allows the driver to probe and function instead of taking down +all of the tegra drm driver, leading to missing display support. + +Signed-off-by: Paul Kocialkowski +Reviewed-by: Mikko Perttunen +--- + drivers/gpu/host1x/dev.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c +index ac65f52850a6..f296738d0de8 100644 +--- a/drivers/gpu/host1x/dev.c ++++ b/drivers/gpu/host1x/dev.c +@@ -186,8 +186,13 @@ static int host1x_probe(struct platform_device *pdev) + return -ENOMEM; + + err = iommu_attach_device(host->domain, &pdev->dev); +- if (err) ++ if (err == -ENODEV) { ++ iommu_domain_free(host->domain); ++ host->domain = NULL; ++ goto iommu_skip; ++ } else if (err) { + goto fail_free_domain; ++ } + + geometry = &host->domain->geometry; + +@@ -198,6 +203,7 @@ static int host1x_probe(struct platform_device *pdev) + host->iova_end = geometry->aperture_end; + } + ++iommu_skip: + err = host1x_channel_list_init(host); + if (err) { + dev_err(&pdev->dev, "failed to initialize channel list\n"); diff --git a/arm-thermal-fixes.patch b/arm-thermal-fixes.patch new file mode 100644 index 0000000..547731e --- /dev/null +++ b/arm-thermal-fixes.patch @@ -0,0 +1,224 @@ +From 0fe4d2181cc4cb3eba303c0e03f878d2558d0f3a Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 31 Mar 2017 20:03:04 +0000 +Subject: [PATCH] ARM: dts: bcm283x: Add CPU thermal zone with 1 + trip point + +As suggested by Eduardo Valentin this adds the thermal zone for +the bcm2835 SoC with its single thermal sensor. We start with +the criticial trip point and leave the cooling devices empty +since we don't have any at the moment. Since the coefficients +could vary depending on the SoC we need to define them separate. + +Signed-off-by: Stefan Wahren +Signed-off-by: Eric Anholt +Acked-by: Eduardo Valentin +--- + arch/arm/boot/dts/bcm2835.dtsi | 4 ++++ + arch/arm/boot/dts/bcm2836.dtsi | 4 ++++ + arch/arm/boot/dts/bcm283x.dtsi | 21 +++++++++++++++++++++ + 3 files changed, 29 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi +index 0890d97e674d..659b6e9513b1 100644 +--- a/arch/arm/boot/dts/bcm2835.dtsi ++++ b/arch/arm/boot/dts/bcm2835.dtsi +@@ -24,6 +24,10 @@ + }; + }; + ++&cpu_thermal { ++ coefficients = <(-538) 407000>; ++}; ++ + /* enable thermal sensor with the correct compatible property set */ + &thermal { + compatible = "brcm,bcm2835-thermal"; +diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi +index 519a44f5d25a..da3deeb42592 100644 +--- a/arch/arm/boot/dts/bcm2836.dtsi ++++ b/arch/arm/boot/dts/bcm2836.dtsi +@@ -77,6 +77,10 @@ + interrupts = <8>; + }; + ++&cpu_thermal { ++ coefficients = <(-538) 407000>; ++}; ++ + /* enable thermal sensor with the correct compatible property set */ + &thermal { + compatible = "brcm,bcm2836-thermal"; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index 561f27d8d922..86a5db53da8f 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -19,6 +19,26 @@ + bootargs = "earlyprintk console=ttyAMA0"; + }; + ++ thermal-zones { ++ cpu_thermal: cpu-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <1000>; ++ ++ thermal-sensors = <&thermal>; ++ ++ trips { ++ cpu-crit { ++ temperature = <80000>; ++ hysteresis = <0>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ }; ++ }; ++ }; ++ + soc { + compatible = "simple-bus"; + #address-cells = <1>; +@@ -430,6 +450,7 @@ + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; + clocks = <&clocks BCM2835_CLOCK_TSENS>; ++ #thermal-sensor-cells = <0>; + status = "disabled"; + }; + +-- +2.13.3 + +From 4ae6f954b96c1fea86c6f21ae8fc413f5fc3444e Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 31 Mar 2017 20:03:05 +0000 +Subject: [PATCH] ARM64: dts: bcm2837: Define CPU thermal coefficients + +This defines the bcm2837 SoC specific thermal coefficients in +order to initialize the thermal driver correctly. + +Signed-off-by: Stefan Wahren +Signed-off-by: Eric Anholt +Acked-by: Eduardo Valentin +--- + arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi +index 19f2fe620a21..2d5de6f0f78d 100644 +--- a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi +@@ -75,6 +75,10 @@ + interrupts = <8>; + }; + ++&cpu_thermal { ++ coefficients = <(-538) 412000>; ++}; ++ + /* enable thermal sensor with the correct compatible property set */ + &thermal { + compatible = "brcm,bcm2837-thermal"; +-- +2.13.3 + +From 1fe3854a83b580727c9464b37b62ba77ead1d6f6 Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Wed, 14 Jun 2017 12:13:27 +0300 +Subject: [PATCH] thermal: bcm2835: fix an error code in probe() + +This causes a static checker because we're passing a valid pointer to +PTR_ERR(). "err" is already the correct error code, so we can just +delete this line. + +Fixes: bcb7dd9ef206 ("thermal: bcm2835: add thermal driver for bcm2835 SoC") +Acked-by: Stefan Wahren +Signed-off-by: Dan Carpenter +Signed-off-by: Eduardo Valentin +--- + drivers/thermal/broadcom/bcm2835_thermal.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/thermal/broadcom/bcm2835_thermal.c b/drivers/thermal/broadcom/bcm2835_thermal.c +index 0ecf80890c84..e6863c841662 100644 +--- a/drivers/thermal/broadcom/bcm2835_thermal.c ++++ b/drivers/thermal/broadcom/bcm2835_thermal.c +@@ -245,7 +245,6 @@ static int bcm2835_thermal_probe(struct platform_device *pdev) + */ + err = tz->ops->get_trip_temp(tz, 0, &trip_temp); + if (err < 0) { +- err = PTR_ERR(tz); + dev_err(&pdev->dev, + "Not able to read trip_temp: %d\n", + err); +-- +2.13.3 + +From e3bdc8d7623d5875403ad40443e7b049ae200fcd Mon Sep 17 00:00:00 2001 +From: Arvind Yadav +Date: Tue, 6 Jun 2017 15:12:37 +0530 +Subject: [PATCH] thermal: imx: Handle return value of clk_prepare_enable + +clk_prepare_enable() can fail here and we must check its return value. + +Signed-off-by: Arvind Yadav +Signed-off-by: Eduardo Valentin +--- + drivers/thermal/imx_thermal.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c +index f7ec39f46ee4..4798b4b1fd77 100644 +--- a/drivers/thermal/imx_thermal.c ++++ b/drivers/thermal/imx_thermal.c +@@ -660,8 +660,11 @@ static int imx_thermal_resume(struct device *dev) + { + struct imx_thermal_data *data = dev_get_drvdata(dev); + struct regmap *map = data->tempmon; ++ int ret; + +- clk_prepare_enable(data->thermal_clk); ++ ret = clk_prepare_enable(data->thermal_clk); ++ if (ret) ++ return ret; + /* Enabled thermal sensor after resume */ + regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); + regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); +-- +2.13.3 + +From 919054fdfc8adf58c5512fe9872eb53ea0f5525d Mon Sep 17 00:00:00 2001 +From: Arvind Yadav +Date: Tue, 6 Jun 2017 15:04:46 +0530 +Subject: [PATCH] thermal: hisilicon: Handle return value of clk_prepare_enable + +clk_prepare_enable() can fail here and we must check its return value. + +Signed-off-by: Arvind Yadav +Signed-off-by: Eduardo Valentin +--- + drivers/thermal/hisi_thermal.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c +index f6429666a1cf..9c3ce341eb97 100644 +--- a/drivers/thermal/hisi_thermal.c ++++ b/drivers/thermal/hisi_thermal.c +@@ -397,8 +397,11 @@ static int hisi_thermal_suspend(struct device *dev) + static int hisi_thermal_resume(struct device *dev) + { + struct hisi_thermal_data *data = dev_get_drvdata(dev); ++ int ret; + +- clk_prepare_enable(data->clk); ++ ret = clk_prepare_enable(data->clk); ++ if (ret) ++ return ret; + + data->irq_enabled = true; + hisi_thermal_enable_bind_irq_sensor(data); +-- +2.13.3 + diff --git a/arm64-hikey-fixes.patch b/arm64-hikey-fixes.patch deleted file mode 100644 index 18bc05b..0000000 --- a/arm64-hikey-fixes.patch +++ /dev/null @@ -1,77 +0,0 @@ -From patchwork Sat Apr 8 07:18:40 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: reset: hi6220: Set module license so that it can be loaded -From: Jeremy Linton -X-Patchwork-Id: 9670985 -Message-Id: <20170408071840.29380-1-lintonrjeremy@gmail.com> -To: linux-kernel@vger.kernel.org -Cc: p.zabel@pengutronix.de, saberlily.xia@hisilicon.com, - puck.chen@hisilicon.com, xinliang.liu@linaro.org, - Jeremy Linton -Date: Sat, 8 Apr 2017 02:18:40 -0500 - -The hi6220_reset driver can be built as a standalone module -yet it cannot be loaded because it depends on GPL exported symbols. - -Lets set the module license so that the module loads, and things like -the on-board kirin drm starts working. - -Signed-off-by: Jeremy Linton -reviewed-by: Xinliang Liu ---- - drivers/reset/hisilicon/hi6220_reset.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c -index 35ce53e..d5e5229 100644 ---- a/drivers/reset/hisilicon/hi6220_reset.c -+++ b/drivers/reset/hisilicon/hi6220_reset.c -@@ -155,3 +155,5 @@ static int __init hi6220_reset_init(void) - } - - postcore_initcall(hi6220_reset_init); -+ -+MODULE_LICENSE("GPL v2"); -From patchwork Mon Apr 3 05:28:42 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,1/2] regulator: hi655x: Describe consumed platform device -From: Jeremy Linton -X-Patchwork-Id: 9658793 -Message-Id: <20170403052843.12711-2-lintonrjeremy@gmail.com> -To: linux-kernel@vger.kernel.org -Cc: broonie@kernel.org, lgirdwood@gmail.com, puck.chen@hisilicon.com, - lee.jones@linaro.org, Jeremy Linton -Date: Mon, 3 Apr 2017 00:28:42 -0500 - -The hi655x-regulator driver consumes a similarly named platform device. -Adding that to the module device table, allows modprobe to locate this -driver once the device is created. - -Signed-off-by: Jeremy Linton ---- - drivers/regulator/hi655x-regulator.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/regulator/hi655x-regulator.c b/drivers/regulator/hi655x-regulator.c -index 065c100..36ae54b 100644 ---- a/drivers/regulator/hi655x-regulator.c -+++ b/drivers/regulator/hi655x-regulator.c -@@ -214,7 +214,14 @@ static int hi655x_regulator_probe(struct platform_device *pdev) - return 0; - } - -+static const struct platform_device_id hi655x_regulator_table[] = { -+ { .name = "hi655x-regulator" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(platform, hi655x_regulator_table); -+ - static struct platform_driver hi655x_regulator_driver = { -+ .id_table = hi655x_regulator_table, - .driver = { - .name = "hi655x-regulator", - }, diff --git a/baseconfig/CONFIG_ADXL345_I2C b/baseconfig/CONFIG_ADXL345_I2C new file mode 100644 index 0000000..f6976b8 --- /dev/null +++ b/baseconfig/CONFIG_ADXL345_I2C @@ -0,0 +1 @@ +# CONFIG_ADXL345_I2C is not set diff --git a/baseconfig/CONFIG_ADXL345_SPI b/baseconfig/CONFIG_ADXL345_SPI new file mode 100644 index 0000000..186ab0d --- /dev/null +++ b/baseconfig/CONFIG_ADXL345_SPI @@ -0,0 +1 @@ +# CONFIG_ADXL345_SPI is not set diff --git a/baseconfig/CONFIG_AF_KCM b/baseconfig/CONFIG_AF_KCM index 7c61cce..b26e526 100644 --- a/baseconfig/CONFIG_AF_KCM +++ b/baseconfig/CONFIG_AF_KCM @@ -1 +1 @@ -CONFIG_AF_KCM=m +# CONFIG_AF_KCM is not set diff --git a/baseconfig/CONFIG_ARM64_ERRATUM_858921 b/baseconfig/CONFIG_ARM64_ERRATUM_858921 new file mode 100644 index 0000000..055a688 --- /dev/null +++ b/baseconfig/CONFIG_ARM64_ERRATUM_858921 @@ -0,0 +1 @@ +CONFIG_ARM64_ERRATUM_858921=y diff --git a/baseconfig/CONFIG_BACKLIGHT_ARCXCNN b/baseconfig/CONFIG_BACKLIGHT_ARCXCNN new file mode 100644 index 0000000..4916196 --- /dev/null +++ b/baseconfig/CONFIG_BACKLIGHT_ARCXCNN @@ -0,0 +1 @@ +CONFIG_BACKLIGHT_ARCXCNN=m diff --git a/baseconfig/CONFIG_BATTERY_LEGO_EV3 b/baseconfig/CONFIG_BATTERY_LEGO_EV3 new file mode 100644 index 0000000..3305bd3 --- /dev/null +++ b/baseconfig/CONFIG_BATTERY_LEGO_EV3 @@ -0,0 +1 @@ +# CONFIG_BATTERY_LEGO_EV3 is not set diff --git a/baseconfig/CONFIG_BCM_FLEXRM_MBOX b/baseconfig/CONFIG_BCM_FLEXRM_MBOX new file mode 100644 index 0000000..b47d4f3 --- /dev/null +++ b/baseconfig/CONFIG_BCM_FLEXRM_MBOX @@ -0,0 +1 @@ +# CONFIG_BCM_FLEXRM_MBOX is not set diff --git a/baseconfig/CONFIG_BFQ_GROUP_IOSCHED b/baseconfig/CONFIG_BFQ_GROUP_IOSCHED new file mode 100644 index 0000000..731981c --- /dev/null +++ b/baseconfig/CONFIG_BFQ_GROUP_IOSCHED @@ -0,0 +1 @@ +CONFIG_BFQ_GROUP_IOSCHED=y diff --git a/baseconfig/CONFIG_BLK_DEV_HD b/baseconfig/CONFIG_BLK_DEV_HD deleted file mode 100644 index 9155aa2..0000000 --- a/baseconfig/CONFIG_BLK_DEV_HD +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_DEV_HD is not set diff --git a/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW b/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW new file mode 100644 index 0000000..802bc55 --- /dev/null +++ b/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_THROTTLING_LOW is not set diff --git a/baseconfig/CONFIG_BT_HCIUART_SERDEV b/baseconfig/CONFIG_BT_HCIUART_SERDEV new file mode 100644 index 0000000..0b0ef5a --- /dev/null +++ b/baseconfig/CONFIG_BT_HCIUART_SERDEV @@ -0,0 +1 @@ +CONFIG_BT_HCIUART_SERDEV=y diff --git a/baseconfig/CONFIG_BT_QCOMSMD b/baseconfig/CONFIG_BT_QCOMSMD deleted file mode 100644 index d67bc39..0000000 --- a/baseconfig/CONFIG_BT_QCOMSMD +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BT_QCOMSMD is not set diff --git a/baseconfig/CONFIG_CAN_HI311X b/baseconfig/CONFIG_CAN_HI311X new file mode 100644 index 0000000..a775c67 --- /dev/null +++ b/baseconfig/CONFIG_CAN_HI311X @@ -0,0 +1 @@ +CONFIG_CAN_HI311X=m diff --git a/baseconfig/CONFIG_CAN_MCBA_USB b/baseconfig/CONFIG_CAN_MCBA_USB new file mode 100644 index 0000000..9a21b3b --- /dev/null +++ b/baseconfig/CONFIG_CAN_MCBA_USB @@ -0,0 +1 @@ +CONFIG_CAN_MCBA_USB=m diff --git a/baseconfig/CONFIG_CAN_PEAK_PCIEFD b/baseconfig/CONFIG_CAN_PEAK_PCIEFD new file mode 100644 index 0000000..3a388b9 --- /dev/null +++ b/baseconfig/CONFIG_CAN_PEAK_PCIEFD @@ -0,0 +1 @@ +CONFIG_CAN_PEAK_PCIEFD=m diff --git a/baseconfig/CONFIG_CAN_VXCAN b/baseconfig/CONFIG_CAN_VXCAN new file mode 100644 index 0000000..a6e002c --- /dev/null +++ b/baseconfig/CONFIG_CAN_VXCAN @@ -0,0 +1 @@ +CONFIG_CAN_VXCAN=m diff --git a/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS b/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS new file mode 100644 index 0000000..07bd8e9 --- /dev/null +++ b/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS @@ -0,0 +1 @@ +CONFIG_CEC_PLATFORM_DRIVERS=y diff --git a/baseconfig/CONFIG_COMMON_CLK_SI570 b/baseconfig/CONFIG_COMMON_CLK_SI570 new file mode 100644 index 0000000..aa74641 --- /dev/null +++ b/baseconfig/CONFIG_COMMON_CLK_SI570 @@ -0,0 +1 @@ +# CONFIG_COMMON_CLK_SI570 is not set diff --git a/baseconfig/CONFIG_CRYPTO_DEV_CCREE b/baseconfig/CONFIG_CRYPTO_DEV_CCREE new file mode 100644 index 0000000..fe4fcee --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_DEV_CCREE @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_CCREE is not set diff --git a/baseconfig/CONFIG_CRYPTO_DH b/baseconfig/CONFIG_CRYPTO_DH index ea06ab3..c923784 100644 --- a/baseconfig/CONFIG_CRYPTO_DH +++ b/baseconfig/CONFIG_CRYPTO_DH @@ -1 +1 @@ -CONFIG_CRYPTO_DH=m +CONFIG_CRYPTO_DH=y diff --git a/baseconfig/CONFIG_DM_INTEGRITY b/baseconfig/CONFIG_DM_INTEGRITY new file mode 100644 index 0000000..ee953fd --- /dev/null +++ b/baseconfig/CONFIG_DM_INTEGRITY @@ -0,0 +1 @@ +CONFIG_DM_INTEGRITY=m diff --git a/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO new file mode 100644 index 0000000..5c276f1 --- /dev/null +++ b/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO @@ -0,0 +1 @@ +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set diff --git a/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO b/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO index 34ecaf2..d1f777d 100644 --- a/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO +++ b/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO @@ -1 +1 @@ -CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set diff --git a/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC b/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC new file mode 100644 index 0000000..32e5c45 --- /dev/null +++ b/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC @@ -0,0 +1 @@ +CONFIG_DRM_FBDEV_OVERALLOC=100 diff --git a/baseconfig/CONFIG_DRM_LVDS_ENCODER b/baseconfig/CONFIG_DRM_LVDS_ENCODER new file mode 100644 index 0000000..e2ea277 --- /dev/null +++ b/baseconfig/CONFIG_DRM_LVDS_ENCODER @@ -0,0 +1 @@ +# CONFIG_DRM_LVDS_ENCODER is not set diff --git a/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW b/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW new file mode 100644 index 0000000..7aa3826 --- /dev/null +++ b/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW @@ -0,0 +1 @@ +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set diff --git a/baseconfig/CONFIG_DRM_MXSFB b/baseconfig/CONFIG_DRM_MXSFB index e24a895..550352f 100644 --- a/baseconfig/CONFIG_DRM_MXSFB +++ b/baseconfig/CONFIG_DRM_MXSFB @@ -1 +1 @@ -CONFIG_DRM_MXSFB=m +# CONFIG_DRM_MXSFB is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/CONFIG_DRM_PANEL_LG_LG4573 new file mode 100644 index 0000000..35ecd6e --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_LG_LG4573 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_LG_LG4573 is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_LVDS b/baseconfig/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 0000000..af4bf6e --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_LVDS is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 new file mode 100644 index 0000000..5b25d75 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 new file mode 100644 index 0000000..8aae098 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 new file mode 100644 index 0000000..8cb5243 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 new file mode 100644 index 0000000..9d584f6 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 new file mode 100644 index 0000000..64dedb0 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set diff --git a/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V b/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V new file mode 100644 index 0000000..712cb79 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set diff --git a/baseconfig/CONFIG_DRM_RCAR_DW_HDMI b/baseconfig/CONFIG_DRM_RCAR_DW_HDMI new file mode 100644 index 0000000..d3dace0 --- /dev/null +++ b/baseconfig/CONFIG_DRM_RCAR_DW_HDMI @@ -0,0 +1 @@ +# CONFIG_DRM_RCAR_DW_HDMI is not set diff --git a/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC new file mode 100644 index 0000000..c50a31a --- /dev/null +++ b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC @@ -0,0 +1 @@ +# CONFIG_EARLY_PRINTK_USB_XDBC is not set diff --git a/baseconfig/CONFIG_EDAC_GHES b/baseconfig/CONFIG_EDAC_GHES new file mode 100644 index 0000000..e68c7c4 --- /dev/null +++ b/baseconfig/CONFIG_EDAC_GHES @@ -0,0 +1 @@ +CONFIG_EDAC_GHES=y diff --git a/baseconfig/CONFIG_EDAC_MM_EDAC b/baseconfig/CONFIG_EDAC_MM_EDAC deleted file mode 100644 index 5f7fa22..0000000 --- a/baseconfig/CONFIG_EDAC_MM_EDAC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_MM_EDAC=m diff --git a/baseconfig/CONFIG_EXTCON_INTEL_INT3496 b/baseconfig/CONFIG_EXTCON_INTEL_INT3496 deleted file mode 100644 index 3f6c5d6..0000000 --- a/baseconfig/CONFIG_EXTCON_INTEL_INT3496 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EXTCON_INTEL_INT3496=m diff --git a/baseconfig/CONFIG_GPIO_FTGPIO010 b/baseconfig/CONFIG_GPIO_FTGPIO010 new file mode 100644 index 0000000..3a1fb41 --- /dev/null +++ b/baseconfig/CONFIG_GPIO_FTGPIO010 @@ -0,0 +1 @@ +# CONFIG_GPIO_FTGPIO010 is not set diff --git a/baseconfig/CONFIG_GPIO_SYSFS b/baseconfig/CONFIG_GPIO_SYSFS index 52708d1..0069045 100644 --- a/baseconfig/CONFIG_GPIO_SYSFS +++ b/baseconfig/CONFIG_GPIO_SYSFS @@ -1 +1 @@ -CONFIG_GPIO_SYSFS=y +# CONFIG_GPIO_SYSFS is not set diff --git a/baseconfig/CONFIG_HD44780 b/baseconfig/CONFIG_HD44780 new file mode 100644 index 0000000..22e6cf3 --- /dev/null +++ b/baseconfig/CONFIG_HD44780 @@ -0,0 +1 @@ +CONFIG_HD44780=m diff --git a/baseconfig/CONFIG_HID_ACCUTOUCH b/baseconfig/CONFIG_HID_ACCUTOUCH new file mode 100644 index 0000000..7b8010d --- /dev/null +++ b/baseconfig/CONFIG_HID_ACCUTOUCH @@ -0,0 +1 @@ +CONFIG_HID_ACCUTOUCH=m diff --git a/baseconfig/CONFIG_HID_NTI b/baseconfig/CONFIG_HID_NTI new file mode 100644 index 0000000..c239c70 --- /dev/null +++ b/baseconfig/CONFIG_HID_NTI @@ -0,0 +1 @@ +CONFIG_HID_NTI=m diff --git a/baseconfig/CONFIG_HID_SENSOR_HUMIDITY b/baseconfig/CONFIG_HID_SENSOR_HUMIDITY new file mode 100644 index 0000000..d50f501 --- /dev/null +++ b/baseconfig/CONFIG_HID_SENSOR_HUMIDITY @@ -0,0 +1 @@ +CONFIG_HID_SENSOR_HUMIDITY=m diff --git a/baseconfig/CONFIG_HID_SENSOR_TEMP b/baseconfig/CONFIG_HID_SENSOR_TEMP new file mode 100644 index 0000000..6f1a98b --- /dev/null +++ b/baseconfig/CONFIG_HID_SENSOR_TEMP @@ -0,0 +1 @@ +CONFIG_HID_SENSOR_TEMP=m diff --git a/baseconfig/CONFIG_I2C_MUX_LTC4306 b/baseconfig/CONFIG_I2C_MUX_LTC4306 new file mode 100644 index 0000000..f7c1645 --- /dev/null +++ b/baseconfig/CONFIG_I2C_MUX_LTC4306 @@ -0,0 +1 @@ +CONFIG_I2C_MUX_LTC4306=m diff --git a/baseconfig/CONFIG_IEEE802154_CA8210 b/baseconfig/CONFIG_IEEE802154_CA8210 new file mode 100644 index 0000000..d4a2158 --- /dev/null +++ b/baseconfig/CONFIG_IEEE802154_CA8210 @@ -0,0 +1 @@ +CONFIG_IEEE802154_CA8210=m diff --git a/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS b/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS new file mode 100644 index 0000000..e919384 --- /dev/null +++ b/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_IEEE802154_CA8210_DEBUGFS is not set diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS b/baseconfig/CONFIG_IIO_CROS_EC_SENSORS deleted file mode 100644 index e93e4c8..0000000 --- a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_IIO_CROS_EC_SENSORS=m diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR b/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR deleted file mode 100644 index f3d54f7..0000000 --- a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_IIO_CROS_EC_SENSORS_COR=m diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE b/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE deleted file mode 100644 index baf78d1..0000000 --- a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_IIO_CROS_EC_SENSORS_CORE=m diff --git a/baseconfig/CONFIG_INPUT_MMA8450 b/baseconfig/CONFIG_INPUT_MMA8450 index 68519d1..1051809 100644 --- a/baseconfig/CONFIG_INPUT_MMA8450 +++ b/baseconfig/CONFIG_INPUT_MMA8450 @@ -1 +1 @@ -CONFIG_INPUT_MMA8450=m +# CONFIG_INPUT_MMA8450 is not set diff --git a/baseconfig/CONFIG_INPUT_MPU3050 b/baseconfig/CONFIG_INPUT_MPU3050 deleted file mode 100644 index 7c1afe0..0000000 --- a/baseconfig/CONFIG_INPUT_MPU3050 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INPUT_MPU3050=m diff --git a/baseconfig/CONFIG_IOSCHED_BFQ b/baseconfig/CONFIG_IOSCHED_BFQ new file mode 100644 index 0000000..3023fb0 --- /dev/null +++ b/baseconfig/CONFIG_IOSCHED_BFQ @@ -0,0 +1 @@ +CONFIG_IOSCHED_BFQ=m diff --git a/baseconfig/CONFIG_IR_SIR b/baseconfig/CONFIG_IR_SIR new file mode 100644 index 0000000..34ff7a8 --- /dev/null +++ b/baseconfig/CONFIG_IR_SIR @@ -0,0 +1 @@ +CONFIG_IR_SIR=m diff --git a/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI new file mode 100644 index 0000000..d66d2b1 --- /dev/null +++ b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI @@ -0,0 +1 @@ +CONFIG_JOYSTICK_PSXPAD_SPI=m diff --git a/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF new file mode 100644 index 0000000..c534b35 --- /dev/null +++ b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF @@ -0,0 +1 @@ +CONFIG_JOYSTICK_PSXPAD_SPI_FF=y diff --git a/baseconfig/CONFIG_KEYBOARD_QT1070 b/baseconfig/CONFIG_KEYBOARD_QT1070 index 7deb75f..f9f0b0a 100644 --- a/baseconfig/CONFIG_KEYBOARD_QT1070 +++ b/baseconfig/CONFIG_KEYBOARD_QT1070 @@ -1 +1 @@ -# CONFIG_KEYBOARD_QT1070 is not set +CONFIG_KEYBOARD_QT1070=m diff --git a/baseconfig/CONFIG_LEDS_DELL_NETBOOKS b/baseconfig/CONFIG_LEDS_DELL_NETBOOKS deleted file mode 100644 index 45f9aee..0000000 --- a/baseconfig/CONFIG_LEDS_DELL_NETBOOKS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LEDS_DELL_NETBOOKS=m diff --git a/baseconfig/CONFIG_LIRC_SASEM b/baseconfig/CONFIG_LIRC_SASEM deleted file mode 100644 index 4bfc392..0000000 --- a/baseconfig/CONFIG_LIRC_SASEM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LIRC_SASEM=m diff --git a/baseconfig/CONFIG_LOAD_UEFI_KEYS b/baseconfig/CONFIG_LOAD_UEFI_KEYS new file mode 100644 index 0000000..de1de5c --- /dev/null +++ b/baseconfig/CONFIG_LOAD_UEFI_KEYS @@ -0,0 +1 @@ +# CONFIG_LOAD_UEFI_KEYS is not set diff --git a/baseconfig/CONFIG_LTC2497 b/baseconfig/CONFIG_LTC2497 new file mode 100644 index 0000000..312f3db --- /dev/null +++ b/baseconfig/CONFIG_LTC2497 @@ -0,0 +1 @@ +# CONFIG_LTC2497 is not set diff --git a/baseconfig/CONFIG_LTC2632 b/baseconfig/CONFIG_LTC2632 new file mode 100644 index 0000000..8bc2b8b --- /dev/null +++ b/baseconfig/CONFIG_LTC2632 @@ -0,0 +1 @@ +# CONFIG_LTC2632 is not set diff --git a/baseconfig/CONFIG_MAX1118 b/baseconfig/CONFIG_MAX1118 new file mode 100644 index 0000000..615bda2 --- /dev/null +++ b/baseconfig/CONFIG_MAX1118 @@ -0,0 +1 @@ +# CONFIG_MAX1118 is not set diff --git a/baseconfig/CONFIG_MAX1363 b/baseconfig/CONFIG_MAX1363 index d009011..08e944f 100644 --- a/baseconfig/CONFIG_MAX1363 +++ b/baseconfig/CONFIG_MAX1363 @@ -1 +1 @@ -# CONFIG_MAX1363 is not set +CONFIG_MAX1363=m diff --git a/baseconfig/CONFIG_MAX30102 b/baseconfig/CONFIG_MAX30102 new file mode 100644 index 0000000..5b4aacf --- /dev/null +++ b/baseconfig/CONFIG_MAX30102 @@ -0,0 +1 @@ +# CONFIG_MAX30102 is not set diff --git a/baseconfig/CONFIG_MAX9611 b/baseconfig/CONFIG_MAX9611 new file mode 100644 index 0000000..1cbc674 --- /dev/null +++ b/baseconfig/CONFIG_MAX9611 @@ -0,0 +1 @@ +# CONFIG_MAX9611 is not set diff --git a/baseconfig/CONFIG_MDIO_OCTEON b/baseconfig/CONFIG_MDIO_OCTEON index 28cd018..e14c4b0 100644 --- a/baseconfig/CONFIG_MDIO_OCTEON +++ b/baseconfig/CONFIG_MDIO_OCTEON @@ -1 +1 @@ -CONFIG_MDIO_OCTEON=m +# CONFIG_MDIO_OCTEON is not set diff --git a/baseconfig/CONFIG_MEDIA_CEC_RC b/baseconfig/CONFIG_MEDIA_CEC_RC new file mode 100644 index 0000000..1531c4b --- /dev/null +++ b/baseconfig/CONFIG_MEDIA_CEC_RC @@ -0,0 +1 @@ +CONFIG_MEDIA_CEC_RC=y diff --git a/baseconfig/CONFIG_MFD_CPCAP b/baseconfig/CONFIG_MFD_CPCAP index acf5bd3..0f04081 100644 --- a/baseconfig/CONFIG_MFD_CPCAP +++ b/baseconfig/CONFIG_MFD_CPCAP @@ -1 +1 @@ -CONFIG_MFD_CPCAP=m +# CONFIG_MFD_CPCAP is not set diff --git a/baseconfig/CONFIG_MFD_EXYNOS_LPASS b/baseconfig/CONFIG_MFD_EXYNOS_LPASS deleted file mode 100644 index d733b05..0000000 --- a/baseconfig/CONFIG_MFD_EXYNOS_LPASS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_EXYNOS_LPASS is not set diff --git a/baseconfig/CONFIG_MFD_TI_LMU b/baseconfig/CONFIG_MFD_TI_LMU new file mode 100644 index 0000000..4a84e3f --- /dev/null +++ b/baseconfig/CONFIG_MFD_TI_LMU @@ -0,0 +1 @@ +# CONFIG_MFD_TI_LMU is not set diff --git a/baseconfig/CONFIG_MLX5_CORE_IPOIB b/baseconfig/CONFIG_MLX5_CORE_IPOIB new file mode 100644 index 0000000..d78d82d --- /dev/null +++ b/baseconfig/CONFIG_MLX5_CORE_IPOIB @@ -0,0 +1 @@ +CONFIG_MLX5_CORE_IPOIB=y diff --git a/baseconfig/CONFIG_MMC_MTK b/baseconfig/CONFIG_MMC_MTK index 8d1b25c..d92a907 100644 --- a/baseconfig/CONFIG_MMC_MTK +++ b/baseconfig/CONFIG_MMC_MTK @@ -1 +1 @@ -CONFIG_MMC_MTK=m +# CONFIG_MMC_MTK is not set diff --git a/baseconfig/CONFIG_MMC_SDHCI_XENON b/baseconfig/CONFIG_MMC_SDHCI_XENON new file mode 100644 index 0000000..7ced7b0 --- /dev/null +++ b/baseconfig/CONFIG_MMC_SDHCI_XENON @@ -0,0 +1 @@ +CONFIG_MMC_SDHCI_XENON=m diff --git a/baseconfig/CONFIG_MODULE_SIG_UEFI b/baseconfig/CONFIG_MODULE_SIG_UEFI deleted file mode 100644 index e4fb898..0000000 --- a/baseconfig/CONFIG_MODULE_SIG_UEFI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MODULE_SIG_UEFI is not set diff --git a/baseconfig/CONFIG_MPU3050_I2C b/baseconfig/CONFIG_MPU3050_I2C index 92e6cbf..2e9c7cc 100644 --- a/baseconfig/CONFIG_MPU3050_I2C +++ b/baseconfig/CONFIG_MPU3050_I2C @@ -1 +1 @@ -# CONFIG_MPU3050_I2C is not set +CONFIG_MPU3050_I2C=m diff --git a/baseconfig/CONFIG_MQ_IOSCHED_KYBER b/baseconfig/CONFIG_MQ_IOSCHED_KYBER new file mode 100644 index 0000000..939264d --- /dev/null +++ b/baseconfig/CONFIG_MQ_IOSCHED_KYBER @@ -0,0 +1 @@ +CONFIG_MQ_IOSCHED_KYBER=m diff --git a/baseconfig/CONFIG_NET_9P_XEN b/baseconfig/CONFIG_NET_9P_XEN new file mode 100644 index 0000000..d2565ed --- /dev/null +++ b/baseconfig/CONFIG_NET_9P_XEN @@ -0,0 +1 @@ +CONFIG_NET_9P_XEN=m diff --git a/baseconfig/CONFIG_NET_DSA_LOOP b/baseconfig/CONFIG_NET_DSA_LOOP new file mode 100644 index 0000000..08b25de --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_LOOP @@ -0,0 +1 @@ +CONFIG_NET_DSA_LOOP=m diff --git a/baseconfig/CONFIG_NET_DSA_MT7530 b/baseconfig/CONFIG_NET_DSA_MT7530 new file mode 100644 index 0000000..722095c --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_MT7530 @@ -0,0 +1 @@ +CONFIG_NET_DSA_MT7530=m diff --git a/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C new file mode 100644 index 0000000..7c738ff --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C @@ -0,0 +1 @@ +CONFIG_NET_DSA_SMSC_LAN9303_I2C=m diff --git a/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO new file mode 100644 index 0000000..d7f1987 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO @@ -0,0 +1 @@ +CONFIG_NET_DSA_SMSC_LAN9303_MDIO=m diff --git a/baseconfig/CONFIG_NET_SCH_DEFAULT b/baseconfig/CONFIG_NET_SCH_DEFAULT new file mode 100644 index 0000000..a4c53d2 --- /dev/null +++ b/baseconfig/CONFIG_NET_SCH_DEFAULT @@ -0,0 +1 @@ +# CONFIG_NET_SCH_DEFAULT is not set diff --git a/baseconfig/CONFIG_NR_DEV_DAX b/baseconfig/CONFIG_NR_DEV_DAX new file mode 100644 index 0000000..3fd0f86 --- /dev/null +++ b/baseconfig/CONFIG_NR_DEV_DAX @@ -0,0 +1 @@ +CONFIG_NR_DEV_DAX=32768 diff --git a/baseconfig/CONFIG_PCI_ENDPOINT b/baseconfig/CONFIG_PCI_ENDPOINT new file mode 100644 index 0000000..d90e2a4 --- /dev/null +++ b/baseconfig/CONFIG_PCI_ENDPOINT @@ -0,0 +1 @@ +# CONFIG_PCI_ENDPOINT is not set diff --git a/baseconfig/CONFIG_PCI_ENDPOINT_TEST b/baseconfig/CONFIG_PCI_ENDPOINT_TEST new file mode 100644 index 0000000..ac8854d --- /dev/null +++ b/baseconfig/CONFIG_PCI_ENDPOINT_TEST @@ -0,0 +1 @@ +# CONFIG_PCI_ENDPOINT_TEST is not set diff --git a/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 0000000..90bf4c7 --- /dev/null +++ b/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +CONFIG_PCI_MSI_IRQ_DOMAIN=y diff --git a/baseconfig/CONFIG_PCI_SW_SWITCHTEC b/baseconfig/CONFIG_PCI_SW_SWITCHTEC new file mode 100644 index 0000000..f197a5e --- /dev/null +++ b/baseconfig/CONFIG_PCI_SW_SWITCHTEC @@ -0,0 +1 @@ +CONFIG_PCI_SW_SWITCHTEC=m diff --git a/baseconfig/CONFIG_PINCTRL_MSM8994 b/baseconfig/CONFIG_PINCTRL_MSM8994 index 5dd58e7..977b1c3 100644 --- a/baseconfig/CONFIG_PINCTRL_MSM8994 +++ b/baseconfig/CONFIG_PINCTRL_MSM8994 @@ -1 +1 @@ -CONFIG_PINCTRL_MSM8994=m +# CONFIG_PINCTRL_MSM8994 is not set diff --git a/baseconfig/CONFIG_PINCTRL_TI_IODELAY b/baseconfig/CONFIG_PINCTRL_TI_IODELAY deleted file mode 100644 index cc5eb6a..0000000 --- a/baseconfig/CONFIG_PINCTRL_TI_IODELAY +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_TI_IODELAY is not set diff --git a/baseconfig/CONFIG_QCOM_ADSP_PIL b/baseconfig/CONFIG_QCOM_ADSP_PIL deleted file mode 100644 index 0aa2581..0000000 --- a/baseconfig/CONFIG_QCOM_ADSP_PIL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_ADSP_PIL=m diff --git a/baseconfig/CONFIG_RAS_CEC b/baseconfig/CONFIG_RAS_CEC new file mode 100644 index 0000000..7b0901c --- /dev/null +++ b/baseconfig/CONFIG_RAS_CEC @@ -0,0 +1 @@ +CONFIG_RAS_CEC=y diff --git a/baseconfig/CONFIG_REGULATOR_CPCAP b/baseconfig/CONFIG_REGULATOR_CPCAP deleted file mode 100644 index 02e701e..0000000 --- a/baseconfig/CONFIG_REGULATOR_CPCAP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_CPCAP=m diff --git a/baseconfig/CONFIG_REGULATOR_TPS65132 b/baseconfig/CONFIG_REGULATOR_TPS65132 new file mode 100644 index 0000000..b82a99f --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_TPS65132 @@ -0,0 +1 @@ +# CONFIG_REGULATOR_TPS65132 is not set diff --git a/baseconfig/CONFIG_REGULATOR_VCTRL b/baseconfig/CONFIG_REGULATOR_VCTRL new file mode 100644 index 0000000..478bc64 --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_VCTRL @@ -0,0 +1 @@ +CONFIG_REGULATOR_VCTRL=m diff --git a/baseconfig/CONFIG_RPMSG_CHAR b/baseconfig/CONFIG_RPMSG_CHAR new file mode 100644 index 0000000..3aa9989 --- /dev/null +++ b/baseconfig/CONFIG_RPMSG_CHAR @@ -0,0 +1 @@ +# CONFIG_RPMSG_CHAR is not set diff --git a/baseconfig/CONFIG_RTL8723BS b/baseconfig/CONFIG_RTL8723BS new file mode 100644 index 0000000..4837f05 --- /dev/null +++ b/baseconfig/CONFIG_RTL8723BS @@ -0,0 +1 @@ +CONFIG_RTL8723BS=m diff --git a/baseconfig/CONFIG_SENSORS_ADS1015 b/baseconfig/CONFIG_SENSORS_ADS1015 index 4fc01f3..928b4f2 100644 --- a/baseconfig/CONFIG_SENSORS_ADS1015 +++ b/baseconfig/CONFIG_SENSORS_ADS1015 @@ -1 +1 @@ -CONFIG_SENSORS_ADS1015=m +# CONFIG_SENSORS_ADS1015 is not set diff --git a/baseconfig/CONFIG_SENSORS_ASPEED b/baseconfig/CONFIG_SENSORS_ASPEED new file mode 100644 index 0000000..7808f12 --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_ASPEED @@ -0,0 +1 @@ +CONFIG_SENSORS_ASPEED=m diff --git a/baseconfig/CONFIG_SND_DESIGNWARE_PCM b/baseconfig/CONFIG_SND_DESIGNWARE_PCM index 4fb3ac5..8f93f9d 100644 --- a/baseconfig/CONFIG_SND_DESIGNWARE_PCM +++ b/baseconfig/CONFIG_SND_DESIGNWARE_PCM @@ -1 +1 @@ -CONFIG_SND_DESIGNWARE_PCM=m +CONFIG_SND_DESIGNWARE_PCM=y diff --git a/baseconfig/CONFIG_SND_FIREFACE b/baseconfig/CONFIG_SND_FIREFACE new file mode 100644 index 0000000..18782f6 --- /dev/null +++ b/baseconfig/CONFIG_SND_FIREFACE @@ -0,0 +1 @@ +CONFIG_SND_FIREFACE=m diff --git a/baseconfig/CONFIG_SND_FIREWIRE_MOTU b/baseconfig/CONFIG_SND_FIREWIRE_MOTU new file mode 100644 index 0000000..73299e8 --- /dev/null +++ b/baseconfig/CONFIG_SND_FIREWIRE_MOTU @@ -0,0 +1 @@ +CONFIG_SND_FIREWIRE_MOTU=m diff --git a/baseconfig/CONFIG_SND_I2S_HI6210_I2S b/baseconfig/CONFIG_SND_I2S_HI6210_I2S new file mode 100644 index 0000000..9ae15dc --- /dev/null +++ b/baseconfig/CONFIG_SND_I2S_HI6210_I2S @@ -0,0 +1 @@ +CONFIG_SND_I2S_HI6210_I2S=m diff --git a/baseconfig/CONFIG_SND_INTEL8X0 b/baseconfig/CONFIG_SND_INTEL8X0 index 6d78f08..d97191a 100644 --- a/baseconfig/CONFIG_SND_INTEL8X0 +++ b/baseconfig/CONFIG_SND_INTEL8X0 @@ -1 +1 @@ -CONFIG_SND_INTEL8X0=m +# CONFIG_SND_INTEL8X0 is not set diff --git a/baseconfig/CONFIG_SND_INTEL8X0M b/baseconfig/CONFIG_SND_INTEL8X0M index 24ac6ad..4e04bb5 100644 --- a/baseconfig/CONFIG_SND_INTEL8X0M +++ b/baseconfig/CONFIG_SND_INTEL8X0M @@ -1 +1 @@ -CONFIG_SND_INTEL8X0M=m +# CONFIG_SND_INTEL8X0M is not set diff --git a/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C b/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C new file mode 100644 index 0000000..54124be --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C @@ -0,0 +1 @@ +CONFIG_SND_SOC_ADAU1761_I2C=m diff --git a/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI b/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI new file mode 100644 index 0000000..fce8309 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI @@ -0,0 +1 @@ +CONFIG_SND_SOC_ADAU1761_SPI=m diff --git a/baseconfig/CONFIG_SND_SOC_CS35L35 b/baseconfig/CONFIG_SND_SOC_CS35L35 new file mode 100644 index 0000000..3969b2f --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_CS35L35 @@ -0,0 +1 @@ +CONFIG_SND_SOC_CS35L35=m diff --git a/baseconfig/CONFIG_SND_SOC_DIO2125 b/baseconfig/CONFIG_SND_SOC_DIO2125 new file mode 100644 index 0000000..d3121e7 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_DIO2125 @@ -0,0 +1 @@ +CONFIG_SND_SOC_DIO2125=m diff --git a/baseconfig/CONFIG_SND_SOC_ES7134 b/baseconfig/CONFIG_SND_SOC_ES7134 new file mode 100644 index 0000000..ff087ad --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ES7134 @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES7134=m diff --git a/baseconfig/CONFIG_SND_SOC_MAX98927 b/baseconfig/CONFIG_SND_SOC_MAX98927 new file mode 100644 index 0000000..341a74d --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_MAX98927 @@ -0,0 +1 @@ +CONFIG_SND_SOC_MAX98927=m diff --git a/baseconfig/CONFIG_SND_SOC_NAU8824 b/baseconfig/CONFIG_SND_SOC_NAU8824 new file mode 100644 index 0000000..3551419 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_NAU8824 @@ -0,0 +1 @@ +CONFIG_SND_SOC_NAU8824=m diff --git a/baseconfig/CONFIG_SND_VIA82XX b/baseconfig/CONFIG_SND_VIA82XX index 129cf39..2c26735 100644 --- a/baseconfig/CONFIG_SND_VIA82XX +++ b/baseconfig/CONFIG_SND_VIA82XX @@ -1 +1 @@ -CONFIG_SND_VIA82XX=m +# CONFIG_SND_VIA82XX is not set diff --git a/baseconfig/CONFIG_SND_VIA82XX_MODEM b/baseconfig/CONFIG_SND_VIA82XX_MODEM index 81e80f3..53055c6 100644 --- a/baseconfig/CONFIG_SND_VIA82XX_MODEM +++ b/baseconfig/CONFIG_SND_VIA82XX_MODEM @@ -1 +1 @@ -CONFIG_SND_VIA82XX_MODEM=m +# CONFIG_SND_VIA82XX_MODEM is not set diff --git a/baseconfig/CONFIG_SPI_ROCKCHIP b/baseconfig/CONFIG_SPI_ROCKCHIP new file mode 100644 index 0000000..bf067a3 --- /dev/null +++ b/baseconfig/CONFIG_SPI_ROCKCHIP @@ -0,0 +1 @@ +# CONFIG_SPI_ROCKCHIP is not set diff --git a/baseconfig/CONFIG_SRF04 b/baseconfig/CONFIG_SRF04 new file mode 100644 index 0000000..7dcc913 --- /dev/null +++ b/baseconfig/CONFIG_SRF04 @@ -0,0 +1 @@ +# CONFIG_SRF04 is not set diff --git a/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST b/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST new file mode 100644 index 0000000..858e87e --- /dev/null +++ b/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST @@ -0,0 +1 @@ +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" diff --git a/baseconfig/CONFIG_TCG_CRB b/baseconfig/CONFIG_TCG_CRB new file mode 100644 index 0000000..07a62ca --- /dev/null +++ b/baseconfig/CONFIG_TCG_CRB @@ -0,0 +1 @@ +CONFIG_TCG_CRB=m diff --git a/baseconfig/CONFIG_TEE b/baseconfig/CONFIG_TEE new file mode 100644 index 0000000..accc7a8 --- /dev/null +++ b/baseconfig/CONFIG_TEE @@ -0,0 +1 @@ +# CONFIG_TEE is not set diff --git a/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS b/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS new file mode 100644 index 0000000..9288765 --- /dev/null +++ b/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS @@ -0,0 +1 @@ +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 diff --git a/baseconfig/CONFIG_TIGON3_HWMON b/baseconfig/CONFIG_TIGON3_HWMON new file mode 100644 index 0000000..31215b5 --- /dev/null +++ b/baseconfig/CONFIG_TIGON3_HWMON @@ -0,0 +1 @@ +CONFIG_TIGON3_HWMON=y diff --git a/baseconfig/CONFIG_TI_ADS1015 b/baseconfig/CONFIG_TI_ADS1015 index 8a8d511..f57c3fd 100644 --- a/baseconfig/CONFIG_TI_ADS1015 +++ b/baseconfig/CONFIG_TI_ADS1015 @@ -1 +1 @@ -# CONFIG_TI_ADS1015 is not set +CONFIG_TI_ADS1015=m diff --git a/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO b/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO new file mode 100644 index 0000000..b67dd76 --- /dev/null +++ b/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO @@ -0,0 +1 @@ +CONFIG_TOUCHSCREEN_TSC2007_IIO=y diff --git a/baseconfig/CONFIG_TYPEC_FUSB302 b/baseconfig/CONFIG_TYPEC_FUSB302 new file mode 100644 index 0000000..9633e19 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_FUSB302 @@ -0,0 +1 @@ +CONFIG_TYPEC_FUSB302=m diff --git a/baseconfig/CONFIG_TYPEC_TCPCI b/baseconfig/CONFIG_TYPEC_TCPCI new file mode 100644 index 0000000..46687f5 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_TCPCI @@ -0,0 +1 @@ +CONFIG_TYPEC_TCPCI=m diff --git a/baseconfig/CONFIG_TYPEC_TCPM b/baseconfig/CONFIG_TYPEC_TCPM new file mode 100644 index 0000000..8294bcc --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_TCPM @@ -0,0 +1 @@ +CONFIG_TYPEC_TCPM=m diff --git a/baseconfig/CONFIG_TYPEC_WCOVE b/baseconfig/CONFIG_TYPEC_WCOVE new file mode 100644 index 0000000..8801ecb --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_WCOVE @@ -0,0 +1 @@ +CONFIG_TYPEC_WCOVE=m diff --git a/baseconfig/CONFIG_UBIFS_FS_SECURITY b/baseconfig/CONFIG_UBIFS_FS_SECURITY new file mode 100644 index 0000000..cb238b9 --- /dev/null +++ b/baseconfig/CONFIG_UBIFS_FS_SECURITY @@ -0,0 +1 @@ +CONFIG_UBIFS_FS_SECURITY=y diff --git a/baseconfig/CONFIG_USB_PCI b/baseconfig/CONFIG_USB_PCI new file mode 100644 index 0000000..26c372a --- /dev/null +++ b/baseconfig/CONFIG_USB_PCI @@ -0,0 +1 @@ +CONFIG_USB_PCI=y diff --git a/baseconfig/CONFIG_USB_RAINSHADOW_CEC b/baseconfig/CONFIG_USB_RAINSHADOW_CEC new file mode 100644 index 0000000..c660528 --- /dev/null +++ b/baseconfig/CONFIG_USB_RAINSHADOW_CEC @@ -0,0 +1 @@ +CONFIG_USB_RAINSHADOW_CEC=m diff --git a/baseconfig/CONFIG_VL6180 b/baseconfig/CONFIG_VL6180 new file mode 100644 index 0000000..b178334 --- /dev/null +++ b/baseconfig/CONFIG_VL6180 @@ -0,0 +1 @@ +CONFIG_VL6180=m diff --git a/baseconfig/CONFIG_VSOCKMON b/baseconfig/CONFIG_VSOCKMON new file mode 100644 index 0000000..82594c4 --- /dev/null +++ b/baseconfig/CONFIG_VSOCKMON @@ -0,0 +1 @@ +CONFIG_VSOCKMON=m diff --git a/baseconfig/CONFIG_W1_MASTER_DS1WM b/baseconfig/CONFIG_W1_MASTER_DS1WM index 24ca8ef..bf2934c 100644 --- a/baseconfig/CONFIG_W1_MASTER_DS1WM +++ b/baseconfig/CONFIG_W1_MASTER_DS1WM @@ -1 +1 @@ -CONFIG_W1_MASTER_DS1WM=m +# CONFIG_W1_MASTER_DS1WM is not set diff --git a/baseconfig/CONFIG_W1_SLAVE_DS2438 b/baseconfig/CONFIG_W1_SLAVE_DS2438 new file mode 100644 index 0000000..34301a6 --- /dev/null +++ b/baseconfig/CONFIG_W1_SLAVE_DS2438 @@ -0,0 +1 @@ +CONFIG_W1_SLAVE_DS2438=m diff --git a/baseconfig/CONFIG_X86_MCELOG_LEGACY b/baseconfig/CONFIG_X86_MCELOG_LEGACY new file mode 100644 index 0000000..2a47556 --- /dev/null +++ b/baseconfig/CONFIG_X86_MCELOG_LEGACY @@ -0,0 +1 @@ +CONFIG_X86_MCELOG_LEGACY=y diff --git a/baseconfig/CONFIG_X86_PTDUMP b/baseconfig/CONFIG_X86_PTDUMP index fa4b114..74f8094 100644 --- a/baseconfig/CONFIG_X86_PTDUMP +++ b/baseconfig/CONFIG_X86_PTDUMP @@ -1 +1 @@ -CONFIG_X86_PTDUMP=y +# CONFIG_X86_PTDUMP is not set diff --git a/baseconfig/CONFIG_ZX_TDM b/baseconfig/CONFIG_ZX_TDM new file mode 100644 index 0000000..9d2d9bf --- /dev/null +++ b/baseconfig/CONFIG_ZX_TDM @@ -0,0 +1 @@ +# CONFIG_ZX_TDM is not set diff --git a/baseconfig/arm/CONFIG_AK8975 b/baseconfig/arm/CONFIG_AK8975 new file mode 100644 index 0000000..547c21a --- /dev/null +++ b/baseconfig/arm/CONFIG_AK8975 @@ -0,0 +1 @@ +CONFIG_AK8975=m diff --git a/baseconfig/arm/CONFIG_BCM2835_THERMAL b/baseconfig/arm/CONFIG_BCM2835_THERMAL new file mode 100644 index 0000000..a6e3c0a --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM2835_THERMAL @@ -0,0 +1 @@ +CONFIG_BCM2835_THERMAL=m diff --git a/baseconfig/arm/CONFIG_BCM_VIDEOCORE b/baseconfig/arm/CONFIG_BCM_VIDEOCORE new file mode 100644 index 0000000..6897b41 --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM_VIDEOCORE @@ -0,0 +1 @@ +# CONFIG_BCM_VIDEOCORE is not set diff --git a/baseconfig/arm/CONFIG_COMMON_CLK_SI570 b/baseconfig/arm/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index aa74641..0000000 --- a/baseconfig/arm/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_SI570 is not set diff --git a/baseconfig/arm/CONFIG_CROS_EC_CHARDEV b/baseconfig/arm/CONFIG_CROS_EC_CHARDEV new file mode 100644 index 0000000..a3df832 --- /dev/null +++ b/baseconfig/arm/CONFIG_CROS_EC_CHARDEV @@ -0,0 +1 @@ +CONFIG_CROS_EC_CHARDEV=m diff --git a/baseconfig/arm/CONFIG_CROS_EC_PROTO b/baseconfig/arm/CONFIG_CROS_EC_PROTO new file mode 100644 index 0000000..96a1e9b --- /dev/null +++ b/baseconfig/arm/CONFIG_CROS_EC_PROTO @@ -0,0 +1 @@ +CONFIG_CROS_EC_PROTO=y diff --git a/baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR b/baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR new file mode 100644 index 0000000..0375776 --- /dev/null +++ b/baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR @@ -0,0 +1 @@ +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI b/baseconfig/arm/CONFIG_DRM_DW_HDMI new file mode 100644 index 0000000..0be71f1 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI=m diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO new file mode 100644 index 0000000..679147e --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO b/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO new file mode 100644 index 0000000..34ecaf2 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m diff --git a/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER b/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER new file mode 100644 index 0000000..53f0efb --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER @@ -0,0 +1 @@ +CONFIG_DRM_LVDS_ENCODER=m diff --git a/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI b/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI new file mode 100644 index 0000000..2590929 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI @@ -0,0 +1 @@ +CONFIG_DRM_MESON_DW_HDMI=m diff --git a/baseconfig/arm/CONFIG_DRM_PANEL_LVDS b/baseconfig/arm/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 0000000..6d4d3c7 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_LVDS=m diff --git a/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 b/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 new file mode 100644 index 0000000..8334ac0 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m diff --git a/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 b/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 new file mode 100644 index 0000000..dd96673 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 @@ -0,0 +1 @@ +CONFIG_DRM_TOSHIBA_TC358767=m diff --git a/baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL b/baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL new file mode 100644 index 0000000..f32c678 --- /dev/null +++ b/baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL @@ -0,0 +1 @@ +CONFIG_I2C_CROS_EC_TUNNEL=m diff --git a/baseconfig/arm/CONFIG_I2C_RK3X b/baseconfig/arm/CONFIG_I2C_RK3X index 904a05e..8a79fb3 100644 --- a/baseconfig/arm/CONFIG_I2C_RK3X +++ b/baseconfig/arm/CONFIG_I2C_RK3X @@ -1 +1 @@ -CONFIG_I2C_RK3X=m +CONFIG_I2C_RK3X=y diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO new file mode 100644 index 0000000..c64555b --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_BARO=m diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX b/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX new file mode 100644 index 0000000..deb1a6e --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_LIGHT_PROX=m diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS new file mode 100644 index 0000000..e93e4c8 --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_SENSORS=m diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE new file mode 100644 index 0000000..baf78d1 --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_SENSORS_CORE=m diff --git a/baseconfig/arm/CONFIG_KEYBOARD_ADC b/baseconfig/arm/CONFIG_KEYBOARD_ADC new file mode 100644 index 0000000..d9b66de --- /dev/null +++ b/baseconfig/arm/CONFIG_KEYBOARD_ADC @@ -0,0 +1 @@ +CONFIG_KEYBOARD_ADC=m diff --git a/baseconfig/arm/CONFIG_KEYBOARD_CROS_EC b/baseconfig/arm/CONFIG_KEYBOARD_CROS_EC new file mode 100644 index 0000000..0444103 --- /dev/null +++ b/baseconfig/arm/CONFIG_KEYBOARD_CROS_EC @@ -0,0 +1 @@ +CONFIG_KEYBOARD_CROS_EC=m diff --git a/baseconfig/arm/CONFIG_KXSD9 b/baseconfig/arm/CONFIG_KXSD9 new file mode 100644 index 0000000..090669c --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9 @@ -0,0 +1 @@ +CONFIG_KXSD9=m diff --git a/baseconfig/arm/CONFIG_KXSD9_I2C b/baseconfig/arm/CONFIG_KXSD9_I2C new file mode 100644 index 0000000..3d22567 --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9_I2C @@ -0,0 +1 @@ +CONFIG_KXSD9_I2C=m diff --git a/baseconfig/arm/CONFIG_KXSD9_SPI b/baseconfig/arm/CONFIG_KXSD9_SPI new file mode 100644 index 0000000..f4da57b --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9_SPI @@ -0,0 +1 @@ +CONFIG_KXSD9_SPI=m diff --git a/baseconfig/arm/CONFIG_MFD_CROS_EC b/baseconfig/arm/CONFIG_MFD_CROS_EC new file mode 100644 index 0000000..3600231 --- /dev/null +++ b/baseconfig/arm/CONFIG_MFD_CROS_EC @@ -0,0 +1 @@ +CONFIG_MFD_CROS_EC=m diff --git a/baseconfig/arm/CONFIG_MFD_CROS_EC_I2C b/baseconfig/arm/CONFIG_MFD_CROS_EC_I2C new file mode 100644 index 0000000..e67f4a1 --- /dev/null +++ b/baseconfig/arm/CONFIG_MFD_CROS_EC_I2C @@ -0,0 +1 @@ +CONFIG_MFD_CROS_EC_I2C=m diff --git a/baseconfig/arm/CONFIG_MFD_CROS_EC_SPI b/baseconfig/arm/CONFIG_MFD_CROS_EC_SPI new file mode 100644 index 0000000..3b26eb4 --- /dev/null +++ b/baseconfig/arm/CONFIG_MFD_CROS_EC_SPI @@ -0,0 +1 @@ +CONFIG_MFD_CROS_EC_SPI=m diff --git a/baseconfig/arm/CONFIG_PCIE_DW_HOST b/baseconfig/arm/CONFIG_PCIE_DW_HOST new file mode 100644 index 0000000..6aecdd9 --- /dev/null +++ b/baseconfig/arm/CONFIG_PCIE_DW_HOST @@ -0,0 +1 @@ +CONFIG_PCIE_DW_HOST=y diff --git a/baseconfig/arm/CONFIG_PCI_FTPCI100 b/baseconfig/arm/CONFIG_PCI_FTPCI100 new file mode 100644 index 0000000..f9fe5b6 --- /dev/null +++ b/baseconfig/arm/CONFIG_PCI_FTPCI100 @@ -0,0 +1 @@ +# CONFIG_PCI_FTPCI100 is not set diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS deleted file mode 100644 index 61e98f8..0000000 --- a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PHY_QCOM_USB_HS=m diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC deleted file mode 100644 index 0b25aa2..0000000 --- a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PHY_QCOM_USB_HSIC=m diff --git a/baseconfig/arm/CONFIG_PWM_CROS_EC b/baseconfig/arm/CONFIG_PWM_CROS_EC new file mode 100644 index 0000000..b3e7211 --- /dev/null +++ b/baseconfig/arm/CONFIG_PWM_CROS_EC @@ -0,0 +1 @@ +CONFIG_PWM_CROS_EC=m diff --git a/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER b/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER deleted file mode 100644 index 6c23d15..0000000 --- a/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_IRQ_COMBINER=y diff --git a/baseconfig/arm/CONFIG_QCOM_SPMI_IADC b/baseconfig/arm/CONFIG_QCOM_SPMI_IADC deleted file mode 100644 index 1b31637..0000000 --- a/baseconfig/arm/CONFIG_QCOM_SPMI_IADC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_IADC is not set diff --git a/baseconfig/arm/CONFIG_QCOM_SPMI_VADC b/baseconfig/arm/CONFIG_QCOM_SPMI_VADC deleted file mode 100644 index 54e0572..0000000 --- a/baseconfig/arm/CONFIG_QCOM_SPMI_VADC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_VADC is not set diff --git a/baseconfig/arm/CONFIG_RADIO_WL128X b/baseconfig/arm/CONFIG_RADIO_WL128X new file mode 100644 index 0000000..88b42f8 --- /dev/null +++ b/baseconfig/arm/CONFIG_RADIO_WL128X @@ -0,0 +1 @@ +CONFIG_RADIO_WL128X=m diff --git a/baseconfig/arm/CONFIG_REGMAP_SPMI b/baseconfig/arm/CONFIG_REGMAP_SPMI deleted file mode 100644 index 0c31959..0000000 --- a/baseconfig/arm/CONFIG_REGMAP_SPMI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGMAP_SPMI=m diff --git a/baseconfig/arm/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/CONFIG_REGULATOR_FAN53555 index d62314c..5534cc4 100644 --- a/baseconfig/arm/CONFIG_REGULATOR_FAN53555 +++ b/baseconfig/arm/CONFIG_REGULATOR_FAN53555 @@ -1 +1 @@ -# CONFIG_REGULATOR_FAN53555 is not set +CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI b/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI deleted file mode 100644 index fe224dc..0000000 --- a/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_REGULATOR_QCOM_SPMI is not set diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP b/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP index ee89108..4f8576d 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP +++ b/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP @@ -1 +1 @@ -CONFIG_ROCKCHIP_ANALOGIX_DP=m +CONFIG_ROCKCHIP_ANALOGIX_DP=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP new file mode 100644 index 0000000..86d2137 --- /dev/null +++ b/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP @@ -0,0 +1 @@ +CONFIG_ROCKCHIP_CDN_DP=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI b/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI index 49748e7..80c3301 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI @@ -1 +1 @@ -CONFIG_ROCKCHIP_DW_HDMI=m +CONFIG_ROCKCHIP_DW_HDMI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI b/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI index 516f3b1..6c00423 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI @@ -1 +1 @@ -CONFIG_ROCKCHIP_DW_MIPI_DSI=m +CONFIG_ROCKCHIP_DW_MIPI_DSI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI b/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI index 34b798a..50cf998 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI @@ -1 +1 @@ -CONFIG_ROCKCHIP_INNO_HDMI=m +CONFIG_ROCKCHIP_INNO_HDMI=y diff --git a/baseconfig/arm/CONFIG_SPMI b/baseconfig/arm/CONFIG_SPMI deleted file mode 100644 index b340c89..0000000 --- a/baseconfig/arm/CONFIG_SPMI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SPMI=m diff --git a/baseconfig/arm/CONFIG_SUN50I_A64_CCU b/baseconfig/arm/CONFIG_SUN50I_A64_CCU deleted file mode 100644 index 9ce6c79..0000000 --- a/baseconfig/arm/CONFIG_SUN50I_A64_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN50I_A64_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN5I_CCU b/baseconfig/arm/CONFIG_SUN5I_CCU deleted file mode 100644 index 26856d6..0000000 --- a/baseconfig/arm/CONFIG_SUN5I_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN5I_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN6I_A31_CCU b/baseconfig/arm/CONFIG_SUN6I_A31_CCU deleted file mode 100644 index 5ce1bb3..0000000 --- a/baseconfig/arm/CONFIG_SUN6I_A31_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN6I_A31_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A23_CCU b/baseconfig/arm/CONFIG_SUN8I_A23_CCU deleted file mode 100644 index 26ae110..0000000 --- a/baseconfig/arm/CONFIG_SUN8I_A23_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_A23_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A33_CCU b/baseconfig/arm/CONFIG_SUN8I_A33_CCU deleted file mode 100644 index e1a357e..0000000 --- a/baseconfig/arm/CONFIG_SUN8I_A33_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_A33_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/CONFIG_SUN8I_H3_CCU index 02cfb2c..542d6fc 100644 --- a/baseconfig/arm/CONFIG_SUN8I_H3_CCU +++ b/baseconfig/arm/CONFIG_SUN8I_H3_CCU @@ -1 +1 @@ -# CONFIG_SUN8I_H3_CCU is not set +CONFIG_SUN8I_H3_CCU=y diff --git a/baseconfig/arm/CONFIG_SUN8I_R_CCU b/baseconfig/arm/CONFIG_SUN8I_R_CCU new file mode 100644 index 0000000..0b88df0 --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_R_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_R_CCU=y diff --git a/baseconfig/arm/CONFIG_SUN9I_A80_CCU b/baseconfig/arm/CONFIG_SUN9I_A80_CCU deleted file mode 100644 index 82686b2..0000000 --- a/baseconfig/arm/CONFIG_SUN9I_A80_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN9I_A80_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUNXI_CCU b/baseconfig/arm/CONFIG_SUNXI_CCU deleted file mode 100644 index a383113..0000000 --- a/baseconfig/arm/CONFIG_SUNXI_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUNXI_CCU is not set diff --git a/baseconfig/arm/CONFIG_TI_ST b/baseconfig/arm/CONFIG_TI_ST new file mode 100644 index 0000000..e6d0d44 --- /dev/null +++ b/baseconfig/arm/CONFIG_TI_ST @@ -0,0 +1 @@ +CONFIG_TI_ST=m diff --git a/baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION b/baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION new file mode 100644 index 0000000..eee05e7 --- /dev/null +++ b/baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION @@ -0,0 +1 @@ +CONFIG_USB_EHCI_HCD_ORION=m diff --git a/baseconfig/arm/CONFIG_VIDEO_BCM2835 b/baseconfig/arm/CONFIG_VIDEO_BCM2835 new file mode 100644 index 0000000..192fdf6 --- /dev/null +++ b/baseconfig/arm/CONFIG_VIDEO_BCM2835 @@ -0,0 +1 @@ +# CONFIG_VIDEO_BCM2835 is not set diff --git a/baseconfig/arm/arm64/CONFIG_ACPI_BGRT b/baseconfig/arm/arm64/CONFIG_ACPI_BGRT new file mode 100644 index 0000000..13035dd --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ACPI_BGRT @@ -0,0 +1 @@ +CONFIG_ACPI_BGRT=y diff --git a/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 b/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 index 5ce9e62..bacb61e 100644 --- a/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 +++ b/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 @@ -1 +1 @@ -CONFIG_APQ_GCC_8084=m +CONFIG_APQ_GCC_8084=y diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST b/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST new file mode 100644 index 0000000..864fc6a --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST @@ -0,0 +1 @@ +# CONFIG_ARM64_RELOC_TEST is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN b/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN index 3b878e8..294c8ec 100644 --- a/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN +++ b/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN @@ -1 +1 @@ -# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_SW_TTBR0_PAN=y diff --git a/baseconfig/arm/arm64/CONFIG_AXP20X_ADC b/baseconfig/arm/arm64/CONFIG_AXP20X_ADC new file mode 100644 index 0000000..025239f --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +CONFIG_AXP20X_ADC=m diff --git a/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X b/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X new file mode 100644 index 0000000..75591a2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X @@ -0,0 +1 @@ +CONFIG_BATTERY_AXP20X=m diff --git a/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD b/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD new file mode 100644 index 0000000..9f36fb6 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD @@ -0,0 +1 @@ +CONFIG_BT_QCOMSMD=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X new file mode 100644 index 0000000..18ddc07 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X @@ -0,0 +1 @@ +CONFIG_COMMON_CLK_HI655X=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM index ec40000..2b7c643 100644 --- a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM @@ -1 +1 @@ -CONFIG_COMMON_CLK_QCOM=m +CONFIG_COMMON_CLK_QCOM=y diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP new file mode 100644 index 0000000..d5226e1 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_CAVIUM_ZIP=m diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL new file mode 100644 index 0000000..61cb974 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_SAFEXCEL=m diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI index e305e24..87b6279 100644 --- a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI @@ -1 +1 @@ -# CONFIG_DRM_MSM_DSI is not set +CONFIG_DRM_MSM_DSI=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY new file mode 100644 index 0000000..397f690 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_14NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY new file mode 100644 index 0000000..7595ae2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_20NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY new file mode 100644 index 0000000..5d86a45 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY new file mode 100644 index 0000000..ea1c4f9 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL new file mode 100644 index 0000000..16ac280 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_PLL=y diff --git a/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX b/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX new file mode 100644 index 0000000..dae44bb --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX @@ -0,0 +1 @@ +CONFIG_EDAC_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC b/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC new file mode 100644 index 0000000..b524879 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC @@ -0,0 +1 @@ +CONFIG_EXTCON_QCOM_SPMI_MISC=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X b/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X deleted file mode 100644 index 15f1c93..0000000 --- a/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GPIO_PCA953X=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_XLP b/baseconfig/arm/arm64/CONFIG_GPIO_XLP new file mode 100644 index 0000000..f99cd41 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_GPIO_XLP @@ -0,0 +1 @@ +CONFIG_GPIO_XLP=m diff --git a/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX b/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX new file mode 100644 index 0000000..bcc41c3 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX @@ -0,0 +1 @@ +CONFIG_I2C_XLP9XX=m diff --git a/baseconfig/arm/arm64/CONFIG_K3_DMA b/baseconfig/arm/arm64/CONFIG_K3_DMA index b698e7e..c64ec40 100644 --- a/baseconfig/arm/arm64/CONFIG_K3_DMA +++ b/baseconfig/arm/arm64/CONFIG_K3_DMA @@ -1 +1 @@ -# CONFIG_K3_DMA is not set +CONFIG_K3_DMA=m diff --git a/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX b/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX new file mode 100644 index 0000000..8c4640a --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX @@ -0,0 +1 @@ +CONFIG_MMC_CAVIUM_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 index 457d918..9effe86 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 @@ -1 +1 @@ -CONFIG_MSM_GCC_8660=m +CONFIG_MSM_GCC_8660=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 index f65dc36..87cf3fd 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 @@ -1 +1 @@ -# CONFIG_MSM_GCC_8916 is not set +CONFIG_MSM_GCC_8916=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 index a492a68..03ba44b 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 @@ -1 +1 @@ -CONFIG_MSM_GCC_8960=m +CONFIG_MSM_GCC_8960=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 index 62f48a9..8ffbd80 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 @@ -1 +1 @@ -CONFIG_MSM_GCC_8974=m +CONFIG_MSM_GCC_8974=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 index 166ddcc..4b01d31 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 @@ -1 +1 @@ -CONFIG_MSM_GCC_8996=m +CONFIG_MSM_GCC_8996=y diff --git a/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 b/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 new file mode 100644 index 0000000..7d5cbcd --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 @@ -0,0 +1 @@ +CONFIG_NET_XGENE_V2=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP new file mode 100644 index 0000000..cba57fa --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QMP=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 new file mode 100644 index 0000000..6512e59 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QUSB2=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS new file mode 100644 index 0000000..61e98f8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HS=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC new file mode 100644 index 0000000..0b25aa2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HSIC=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL new file mode 100644 index 0000000..0aa2581 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL @@ -0,0 +1 @@ +CONFIG_QCOM_ADSP_PIL=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_IOMMU b/baseconfig/arm/arm64/CONFIG_QCOM_IOMMU new file mode 100644 index 0000000..b7e99b8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_IOMMU @@ -0,0 +1 @@ +CONFIG_QCOM_IOMMU=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER b/baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER new file mode 100644 index 0000000..6c23d15 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER @@ -0,0 +1 @@ +CONFIG_QCOM_IRQ_COMBINER=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU b/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU new file mode 100644 index 0000000..ed899d6 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU @@ -0,0 +1 @@ +CONFIG_QCOM_L3_PMU=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL index b749a7d..18d8fb7 100644 --- a/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL +++ b/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL @@ -1 +1 @@ -# CONFIG_QCOM_Q6V5_PIL is not set +CONFIG_QCOM_Q6V5_PIL=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_SMD b/baseconfig/arm/arm64/CONFIG_QCOM_SMD deleted file mode 100644 index d43fecf..0000000 --- a/baseconfig/arm/arm64/CONFIG_QCOM_SMD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_SMD=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL index bb8c24d..b13cefb 100644 --- a/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL +++ b/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL @@ -1 +1 @@ -# CONFIG_QCOM_WCNSS_PIL is not set +CONFIG_QCOM_WCNSS_PIL=m diff --git a/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI b/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI new file mode 100644 index 0000000..0c31959 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI @@ -0,0 +1 @@ +CONFIG_REGMAP_SPMI=m diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG b/baseconfig/arm/arm64/CONFIG_RPMSG new file mode 100644 index 0000000..7cc8785 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG @@ -0,0 +1 @@ +CONFIG_RPMSG=m diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD new file mode 100644 index 0000000..f65af3d --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_SMD=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG new file mode 100644 index 0000000..207a5e5 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL new file mode 100644 index 0000000..db12f03 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m diff --git a/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL b/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL new file mode 100644 index 0000000..00413d4 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL @@ -0,0 +1 @@ +CONFIG_SOC_TEGRA_FLOWCTRL=y diff --git a/baseconfig/arm/arm64/CONFIG_SPI_XLP b/baseconfig/arm/arm64/CONFIG_SPI_XLP new file mode 100644 index 0000000..6026d5f --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SPI_XLP @@ -0,0 +1 @@ +CONFIG_SPI_XLP=m diff --git a/baseconfig/arm/arm64/CONFIG_SPMI b/baseconfig/arm/arm64/CONFIG_SPMI new file mode 100644 index 0000000..b340c89 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SPMI @@ -0,0 +1 @@ +CONFIG_SPMI=m diff --git a/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC b/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC new file mode 100644 index 0000000..97139c2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC @@ -0,0 +1 @@ +CONFIG_SUN4I_GPADC=m diff --git a/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU deleted file mode 100644 index 02cfb2c..0000000 --- a/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_H3_CCU is not set diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI new file mode 100644 index 0000000..d1a5cf9 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/armv7/CONFIG_AHCI_DM816 b/baseconfig/arm/armv7/CONFIG_AHCI_DM816 new file mode 100644 index 0000000..ba4b518 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_AHCI_DM816 @@ -0,0 +1 @@ +CONFIG_AHCI_DM816=m diff --git a/baseconfig/arm/armv7/CONFIG_AXP20X_ADC b/baseconfig/arm/armv7/CONFIG_AXP20X_ADC new file mode 100644 index 0000000..025239f --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +CONFIG_AXP20X_ADC=m diff --git a/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X b/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X new file mode 100644 index 0000000..75591a2 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X @@ -0,0 +1 @@ +CONFIG_BATTERY_AXP20X=m diff --git a/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77802 b/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77802 deleted file mode 100644 index c6e1136..0000000 --- a/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77802 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_COMMON_CLK_MAX77802=m diff --git a/baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV b/baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV deleted file mode 100644 index a3df832..0000000 --- a/baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CROS_EC_CHARDEV=m diff --git a/baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO b/baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO deleted file mode 100644 index 96a1e9b..0000000 --- a/baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CROS_EC_PROTO=y diff --git a/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG b/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG new file mode 100644 index 0000000..f60ff08 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_EXYNOS_RNG=m diff --git a/baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR b/baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR deleted file mode 100644 index 0375776..0000000 --- a/baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 diff --git a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI b/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI deleted file mode 100644 index 0be71f1..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_DW_HDMI=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO deleted file mode 100644 index 679147e..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_DW_HDMI_AHB_AUDIO=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL b/baseconfig/arm/armv7/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c2..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 deleted file mode 100644 index bdb9d96..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_LG_LG4573=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 deleted file mode 100644 index 6a1aa65..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 deleted file mode 100644 index aa66847..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SAMSUNG_LD9040=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 deleted file mode 100644 index 8e8122a..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index e5e3640..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index e3649f9..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE deleted file mode 100644 index 1c716c9..0000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SIMPLE=m diff --git a/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS b/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS deleted file mode 100644 index 87c2530..0000000 --- a/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_HW_RANDOM_EXYNOS=m diff --git a/baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL b/baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL deleted file mode 100644 index f32c678..0000000 --- a/baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_CROS_EC_TUNNEL=m diff --git a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO deleted file mode 100644 index 7b38ce0..0000000 --- a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_IIO_CROS_EC_BARO is not set diff --git a/baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC b/baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC deleted file mode 100644 index 0444103..0000000 --- a/baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_KEYBOARD_CROS_EC=m diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC b/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC deleted file mode 100644 index 3600231..0000000 --- a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MFD_CROS_EC=m diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C b/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C deleted file mode 100644 index e67f4a1..0000000 --- a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MFD_CROS_EC_I2C=m diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI b/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI deleted file mode 100644 index 3b26eb4..0000000 --- a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MFD_CROS_EC_SPI=m diff --git a/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE b/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE deleted file mode 100644 index 226d75b..0000000 --- a/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_PM8921_CORE is not set diff --git a/baseconfig/arm/armv7/CONFIG_MMA8452 b/baseconfig/arm/armv7/CONFIG_MMA8452 new file mode 100644 index 0000000..44b2d2a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MMA8452 @@ -0,0 +1 @@ +CONFIG_MMA8452=m diff --git a/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM b/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM new file mode 100644 index 0000000..9407e7a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM @@ -0,0 +1 @@ +CONFIG_NVMEM_IMX_IIM=m diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX new file mode 100644 index 0000000..b401f79 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP new file mode 100644 index 0000000..8a6a680 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX_EP is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST new file mode 100644 index 0000000..7bbb2fd --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX_HOST is not set diff --git a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 index af3842f..a821768 100644 --- a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 +++ b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_588369 @@ -1 +1 @@ -# CONFIG_PL310_ERRATA_588369 is not set +CONFIG_PL310_ERRATA_588369=y diff --git a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 index 99df605..4e4e545 100644 --- a/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 +++ b/baseconfig/arm/armv7/CONFIG_PL310_ERRATA_727915 @@ -1 +1 @@ -# CONFIG_PL310_ERRATA_727915 is not set +CONFIG_PL310_ERRATA_727915=y diff --git a/baseconfig/arm/armv7/CONFIG_PWM_CROS_EC b/baseconfig/arm/armv7/CONFIG_PWM_CROS_EC deleted file mode 100644 index b3e7211..0000000 --- a/baseconfig/arm/armv7/CONFIG_PWM_CROS_EC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PWM_CROS_EC=m diff --git a/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC b/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC new file mode 100644 index 0000000..1060913 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC @@ -0,0 +1 @@ +CONFIG_QCOM_PM8XXX_XOADC=m diff --git a/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM b/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM deleted file mode 100644 index 69966da..0000000 --- a/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_TEMP_ALARM is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 b/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 deleted file mode 100644 index f1e82ab..0000000 --- a/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_REGULATOR_ACT8865 is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 deleted file mode 100644 index 5534cc4..0000000 --- a/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP deleted file mode 100644 index 98a696d..0000000 --- a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ROCKCHIP_CDN_DP is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 b/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 new file mode 100644 index 0000000..c22ad4a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 @@ -0,0 +1 @@ +CONFIG_SND_SOC_MAX98090=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID b/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID new file mode 100644 index 0000000..ece6cf5 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID @@ -0,0 +1 @@ +CONFIG_SND_SOC_ODROID=m diff --git a/baseconfig/arm/armv7/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/CONFIG_SOC_DRA7XX new file mode 100644 index 0000000..a11bb69 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SOC_DRA7XX @@ -0,0 +1 @@ +# CONFIG_SOC_DRA7XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL b/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL new file mode 100644 index 0000000..00413d4 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL @@ -0,0 +1 @@ +CONFIG_SOC_TEGRA_FLOWCTRL=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC b/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC new file mode 100644 index 0000000..97139c2 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC @@ -0,0 +1 @@ +CONFIG_SUN4I_GPADC=m diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU deleted file mode 100644 index 542d6fc..0000000 --- a/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUN8I_H3_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_TWL4030_CORE b/baseconfig/arm/armv7/CONFIG_TWL4030_CORE deleted file mode 100644 index 1f5b927..0000000 --- a/baseconfig/arm/armv7/CONFIG_TWL4030_CORE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_TWL4030_CORE is not set diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS b/baseconfig/arm/armv7/CONFIG_UBIFS_FS deleted file mode 100644 index e71980d..0000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS=m diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR deleted file mode 100644 index f91c8cd..0000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_ADVANCED_COMPR=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO deleted file mode 100644 index e743a6b..0000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_LZO=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB deleted file mode 100644 index 18bffa1..0000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_ZLIB=y diff --git a/baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION b/baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION deleted file mode 100644 index eee05e7..0000000 --- a/baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_EHCI_HCD_ORION=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_AK8975 b/baseconfig/arm/armv7/armv7/CONFIG_AK8975 deleted file mode 100644 index 547c21a..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_AK8975 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_AK8975=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 b/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 index 5ce9e62..bacb61e 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 +++ b/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 @@ -1 +1 @@ -CONFIG_APQ_GCC_8084=m +CONFIG_APQ_GCC_8084=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD b/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD new file mode 100644 index 0000000..9f36fb6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD @@ -0,0 +1 @@ +CONFIG_BT_QCOMSMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM index ec40000..2b7c643 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM +++ b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM @@ -1 +1 @@ -CONFIG_COMMON_CLK_QCOM=m +CONFIG_COMMON_CLK_QCOM=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_SI570 b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index df66688..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_COMMON_CLK_SI570=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI index e305e24..87b6279 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI @@ -1 +1 @@ -# CONFIG_DRM_MSM_DSI is not set +CONFIG_DRM_MSM_DSI=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY new file mode 100644 index 0000000..397f690 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_14NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY new file mode 100644 index 0000000..7595ae2 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_20NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY new file mode 100644 index 0000000..5d86a45 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY new file mode 100644 index 0000000..ea1c4f9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL new file mode 100644 index 0000000..16ac280 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_PLL=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB new file mode 100644 index 0000000..e24a895 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB @@ -0,0 +1 @@ +CONFIG_DRM_MXSFB=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC b/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC new file mode 100644 index 0000000..b524879 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC @@ -0,0 +1 @@ +CONFIG_EXTCON_QCOM_SPMI_MISC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS new file mode 100644 index 0000000..33e5c6a --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS @@ -0,0 +1 @@ +CONFIG_IMX7_PM_DOMAINS=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 index 457d918..9effe86 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 @@ -1 +1 @@ -CONFIG_MSM_GCC_8660=m +CONFIG_MSM_GCC_8660=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 index a492a68..03ba44b 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 @@ -1 +1 @@ -CONFIG_MSM_GCC_8960=m +CONFIG_MSM_GCC_8960=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 index 62f48a9..8ffbd80 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 @@ -1 +1 @@ -CONFIG_MSM_GCC_8974=m +CONFIG_MSM_GCC_8974=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 index 166ddcc..4b01d31 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 @@ -1 +1 @@ -CONFIG_MSM_GCC_8996=m +CONFIG_MSM_GCC_8996=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX b/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX deleted file mode 100644 index 7f8a147..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PCI_DRA7XX=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP new file mode 100644 index 0000000..cba57fa --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QMP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 new file mode 100644 index 0000000..6512e59 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QUSB2=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS new file mode 100644 index 0000000..61e98f8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC new file mode 100644 index 0000000..0b25aa2 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HSIC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_588369 b/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_588369 deleted file mode 100644 index a821768..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_588369 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PL310_ERRATA_588369=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_727915 b/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_727915 deleted file mode 100644 index 4e4e545..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PL310_ERRATA_727915 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PL310_ERRATA_727915=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL new file mode 100644 index 0000000..0aa2581 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL @@ -0,0 +1 @@ +CONFIG_QCOM_ADSP_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_IOMMU b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_IOMMU new file mode 100644 index 0000000..b7e99b8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_IOMMU @@ -0,0 +1 @@ +CONFIG_QCOM_IOMMU=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL index b749a7d..18d8fb7 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL @@ -1 +1 @@ -# CONFIG_QCOM_Q6V5_PIL is not set +CONFIG_QCOM_Q6V5_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD deleted file mode 100644 index d43fecf..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_SMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM new file mode 100644 index 0000000..7155372 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM @@ -0,0 +1 @@ +CONFIG_QCOM_SPMI_TEMP_ALARM=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL index bb8c24d..b13cefb 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL @@ -1 +1 @@ -# CONFIG_QCOM_WCNSS_PIL is not set +CONFIG_QCOM_WCNSS_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RADIO_WL128X b/baseconfig/arm/armv7/armv7/CONFIG_RADIO_WL128X deleted file mode 100644 index 88b42f8..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_RADIO_WL128X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RADIO_WL128X=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI b/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI new file mode 100644 index 0000000..0c31959 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI @@ -0,0 +1 @@ +CONFIG_REGMAP_SPMI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 deleted file mode 100644 index 5534cc4..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG new file mode 100644 index 0000000..7cc8785 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG @@ -0,0 +1 @@ +CONFIG_RPMSG=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD new file mode 100644 index 0000000..f65af3d --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_SMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS b/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS new file mode 100644 index 0000000..3716108 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS @@ -0,0 +1 @@ +CONFIG_SERIAL_UARTLITE_NR_UARTS=1 diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG new file mode 100644 index 0000000..f862f05 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_ANALOg=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL new file mode 100644 index 0000000..db12f03 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX deleted file mode 100644 index a11bb69..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SOC_DRA7XX is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SPMI b/baseconfig/arm/armv7/armv7/CONFIG_SPMI new file mode 100644 index 0000000..b340c89 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SPMI @@ -0,0 +1 @@ +CONFIG_SPMI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_TI_ST b/baseconfig/arm/armv7/armv7/CONFIG_TI_ST deleted file mode 100644 index e6d0d44..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_TI_ST +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI new file mode 100644 index 0000000..d1a5cf9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX deleted file mode 100644 index a11bb69..0000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SOC_DRA7XX is not set diff --git a/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM b/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM new file mode 100644 index 0000000..eb0464d --- /dev/null +++ b/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM @@ -0,0 +1 @@ +CONFIG_CRYPTO_CRCT10DIF_VPMSUM=m diff --git a/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER b/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER new file mode 100644 index 0000000..a3acefe --- /dev/null +++ b/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER @@ -0,0 +1 @@ +# CONFIG_CRYPTO_VPMSUM_TESTER is not set diff --git a/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE b/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE index e7fe50c..bbbf7d3 100644 --- a/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE +++ b/baseconfig/powerpc/CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE @@ -1 +1 @@ -# CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set +CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y diff --git a/baseconfig/powerpc/CONFIG_NR_DEV_DAX b/baseconfig/powerpc/CONFIG_NR_DEV_DAX deleted file mode 100644 index 3fd0f86..0000000 --- a/baseconfig/powerpc/CONFIG_NR_DEV_DAX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NR_DEV_DAX=32768 diff --git a/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 0000000..2d1ad5b --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +# CONFIG_PCI_MSI_IRQ_DOMAIN is not set diff --git a/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN b/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN new file mode 100644 index 0000000..46354e6 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN @@ -0,0 +1 @@ +CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN=y diff --git a/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS b/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS new file mode 100644 index 0000000..aa61b1f --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS @@ -0,0 +1 @@ +CONFIG_PPC_DT_CPU_FTRS=y diff --git a/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU b/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU index da6fd28..ffe8303 100644 --- a/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU +++ b/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU @@ -1 +1 @@ -# CONFIG_SPAPR_TCE_IOMMU is not set +CONFIG_SPAPR_TCE_IOMMU=y diff --git a/baseconfig/powerpc/CONFIG_TWL4030_CORE b/baseconfig/powerpc/CONFIG_TWL4030_CORE deleted file mode 100644 index 1f5b927..0000000 --- a/baseconfig/powerpc/CONFIG_TWL4030_CORE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_TWL4030_CORE is not set diff --git a/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI b/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI deleted file mode 100644 index a78b62c..0000000 --- a/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_OHCI_HCD_PCI=y diff --git a/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 b/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 new file mode 100644 index 0000000..9f1df8c --- /dev/null +++ b/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 @@ -0,0 +1 @@ +# CONFIG_VFIO_IOMMU_TYPE1 is not set diff --git a/baseconfig/s390x/CONFIG_ARCH_RANDOM b/baseconfig/s390x/CONFIG_ARCH_RANDOM new file mode 100644 index 0000000..51658fe --- /dev/null +++ b/baseconfig/s390x/CONFIG_ARCH_RANDOM @@ -0,0 +1 @@ +CONFIG_ARCH_RANDOM=y diff --git a/baseconfig/s390x/CONFIG_CRASH_DUMP b/baseconfig/s390x/CONFIG_CRASH_DUMP deleted file mode 100644 index 84bb04c..0000000 --- a/baseconfig/s390x/CONFIG_CRASH_DUMP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CRASH_DUMP=y diff --git a/baseconfig/s390x/CONFIG_GENERIC_PHY b/baseconfig/s390x/CONFIG_GENERIC_PHY new file mode 100644 index 0000000..40cd1a4 --- /dev/null +++ b/baseconfig/s390x/CONFIG_GENERIC_PHY @@ -0,0 +1 @@ +CONFIG_GENERIC_PHY=y diff --git a/baseconfig/s390x/CONFIG_HW_RANDOM_S390 b/baseconfig/s390x/CONFIG_HW_RANDOM_S390 new file mode 100644 index 0000000..7108db8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_HW_RANDOM_S390 @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_S390=m diff --git a/baseconfig/s390x/CONFIG_MARCH_Z900 b/baseconfig/s390x/CONFIG_MARCH_Z900 deleted file mode 100644 index 6fa9110..0000000 --- a/baseconfig/s390x/CONFIG_MARCH_Z900 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MARCH_Z900 is not set diff --git a/baseconfig/s390x/CONFIG_MARCH_Z990 b/baseconfig/s390x/CONFIG_MARCH_Z990 deleted file mode 100644 index b0c3638..0000000 --- a/baseconfig/s390x/CONFIG_MARCH_Z990 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MARCH_Z990 is not set diff --git a/baseconfig/s390x/CONFIG_MARCH_Z9_109 b/baseconfig/s390x/CONFIG_MARCH_Z9_109 deleted file mode 100644 index e19e966..0000000 --- a/baseconfig/s390x/CONFIG_MARCH_Z9_109 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MARCH_Z9_109=y diff --git a/baseconfig/s390x/CONFIG_MARCH_ZEC12 b/baseconfig/s390x/CONFIG_MARCH_ZEC12 new file mode 100644 index 0000000..7dbcbb3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MARCH_ZEC12 @@ -0,0 +1 @@ +CONFIG_MARCH_ZEC12=y diff --git a/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS b/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS new file mode 100644 index 0000000..6ace7a1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS @@ -0,0 +1 @@ +CONFIG_MAX_PHYSMEM_BITS=46 diff --git a/baseconfig/s390x/CONFIG_MDIO_DEVICE b/baseconfig/s390x/CONFIG_MDIO_DEVICE new file mode 100644 index 0000000..67ac6ba --- /dev/null +++ b/baseconfig/s390x/CONFIG_MDIO_DEVICE @@ -0,0 +1 @@ +CONFIG_MDIO_DEVICE=m diff --git a/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 0000000..2d1ad5b --- /dev/null +++ b/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +# CONFIG_PCI_MSI_IRQ_DOMAIN is not set diff --git a/baseconfig/s390x/CONFIG_S390_CCW_IOMMU b/baseconfig/s390x/CONFIG_S390_CCW_IOMMU new file mode 100644 index 0000000..7dd58df --- /dev/null +++ b/baseconfig/s390x/CONFIG_S390_CCW_IOMMU @@ -0,0 +1 @@ +CONFIG_S390_CCW_IOMMU=y diff --git a/baseconfig/s390x/CONFIG_VFIO_CCW b/baseconfig/s390x/CONFIG_VFIO_CCW new file mode 100644 index 0000000..15f7493 --- /dev/null +++ b/baseconfig/s390x/CONFIG_VFIO_CCW @@ -0,0 +1 @@ +CONFIG_VFIO_CCW=m diff --git a/baseconfig/x86/CONFIG_DELL_WMI_LED b/baseconfig/x86/CONFIG_DELL_WMI_LED new file mode 100644 index 0000000..23d945e --- /dev/null +++ b/baseconfig/x86/CONFIG_DELL_WMI_LED @@ -0,0 +1 @@ +CONFIG_DELL_WMI_LED=m diff --git a/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE b/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE new file mode 100644 index 0000000..d48518a --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE @@ -0,0 +1 @@ +# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL b/baseconfig/x86/CONFIG_DRM_PANEL new file mode 100644 index 0000000..de8a9c2 --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_PANEL @@ -0,0 +1 @@ +CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 deleted file mode 100644 index 35ecd6e..0000000 --- a/baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_LG_LG4573 is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_LVDS b/baseconfig/x86/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 0000000..6d4d3c7 --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_LVDS=m diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 deleted file mode 100644 index 5b25d75..0000000 --- a/baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 deleted file mode 100644 index 8aae098..0000000 --- a/baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set diff --git a/baseconfig/x86/CONFIG_EDAC_AMD76X b/baseconfig/x86/CONFIG_EDAC_AMD76X deleted file mode 100644 index fe5952e..0000000 --- a/baseconfig/x86/CONFIG_EDAC_AMD76X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_AMD76X=m diff --git a/baseconfig/x86/CONFIG_EDAC_E7XXX b/baseconfig/x86/CONFIG_EDAC_E7XXX deleted file mode 100644 index 0322ddb..0000000 --- a/baseconfig/x86/CONFIG_EDAC_E7XXX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_E7XXX=m diff --git a/baseconfig/x86/CONFIG_EDAC_I82860 b/baseconfig/x86/CONFIG_EDAC_I82860 deleted file mode 100644 index 5e132db..0000000 --- a/baseconfig/x86/CONFIG_EDAC_I82860 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_I82860=m diff --git a/baseconfig/x86/CONFIG_EDAC_I82875P b/baseconfig/x86/CONFIG_EDAC_I82875P deleted file mode 100644 index dbe32d4..0000000 --- a/baseconfig/x86/CONFIG_EDAC_I82875P +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_I82875P=m diff --git a/baseconfig/x86/CONFIG_EDAC_R82600 b/baseconfig/x86/CONFIG_EDAC_R82600 deleted file mode 100644 index 93a01e5..0000000 --- a/baseconfig/x86/CONFIG_EDAC_R82600 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_R82600=m diff --git a/baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 b/baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 new file mode 100644 index 0000000..3f6c5d6 --- /dev/null +++ b/baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 @@ -0,0 +1 @@ +CONFIG_EXTCON_INTEL_INT3496=m diff --git a/baseconfig/x86/CONFIG_INTEL_ATOMISP b/baseconfig/x86/CONFIG_INTEL_ATOMISP new file mode 100644 index 0000000..fde06c5 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_ATOMISP @@ -0,0 +1 @@ +# CONFIG_INTEL_ATOMISP is not set diff --git a/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE b/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE new file mode 100644 index 0000000..7657a9a --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE @@ -0,0 +1 @@ +CONFIG_INTEL_CHT_INT33FE=m diff --git a/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO b/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO new file mode 100644 index 0000000..f416f2d --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO @@ -0,0 +1 @@ +# CONFIG_INTEL_INT0002_VGPIO is not set diff --git a/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC b/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC new file mode 100644 index 0000000..2d14c03 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC @@ -0,0 +1 @@ +# CONFIG_INTEL_SOC_PMIC_CHTWC is not set diff --git a/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS b/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS new file mode 100644 index 0000000..22502e9 --- /dev/null +++ b/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS @@ -0,0 +1 @@ +CONFIG_LOAD_UEFI_KEYS=y diff --git a/baseconfig/x86/CONFIG_MODULE_SIG_UEFI b/baseconfig/x86/CONFIG_MODULE_SIG_UEFI deleted file mode 100644 index c2bb7ce..0000000 --- a/baseconfig/x86/CONFIG_MODULE_SIG_UEFI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MODULE_SIG_UEFI=y diff --git a/baseconfig/x86/CONFIG_SND_INTEL8X0 b/baseconfig/x86/CONFIG_SND_INTEL8X0 new file mode 100644 index 0000000..6d78f08 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_INTEL8X0 @@ -0,0 +1 @@ +CONFIG_SND_INTEL8X0=m diff --git a/baseconfig/x86/CONFIG_SND_INTEL8X0M b/baseconfig/x86/CONFIG_SND_INTEL8X0M new file mode 100644 index 0000000..24ac6ad --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_INTEL8X0M @@ -0,0 +1 @@ +CONFIG_SND_INTEL8X0M=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH new file mode 100644 index 0000000..0697694 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH new file mode 100644 index 0000000..db07e5f --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_VIA82XX b/baseconfig/x86/CONFIG_SND_VIA82XX new file mode 100644 index 0000000..129cf39 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_VIA82XX @@ -0,0 +1 @@ +CONFIG_SND_VIA82XX=m diff --git a/baseconfig/x86/CONFIG_SND_VIA82XX_MODEM b/baseconfig/x86/CONFIG_SND_VIA82XX_MODEM new file mode 100644 index 0000000..81e80f3 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_VIA82XX_MODEM @@ -0,0 +1 @@ +CONFIG_SND_VIA82XX_MODEM=m diff --git a/baseconfig/x86/CONFIG_SPI_ROCKCHIP b/baseconfig/x86/CONFIG_SPI_ROCKCHIP deleted file mode 100644 index bf067a3..0000000 --- a/baseconfig/x86/CONFIG_SPI_ROCKCHIP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SPI_ROCKCHIP is not set diff --git a/baseconfig/x86/CONFIG_TCG_CRB b/baseconfig/x86/CONFIG_TCG_CRB deleted file mode 100644 index 07a62ca..0000000 --- a/baseconfig/x86/CONFIG_TCG_CRB +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TCG_CRB=m diff --git a/baseconfig/x86/CONFIG_XEN_DOM0 b/baseconfig/x86/CONFIG_XEN_DOM0 new file mode 100644 index 0000000..c5cb5d2 --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_DOM0 @@ -0,0 +1 @@ +CONFIG_XEN_DOM0=y diff --git a/baseconfig/x86/CONFIG_XEN_PV b/baseconfig/x86/CONFIG_XEN_PV new file mode 100644 index 0000000..89203e8 --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PV @@ -0,0 +1 @@ +CONFIG_XEN_PV=y diff --git a/baseconfig/x86/CONFIG_XEN_PVHVM b/baseconfig/x86/CONFIG_XEN_PVHVM new file mode 100644 index 0000000..be722d2 --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PVHVM @@ -0,0 +1 @@ +CONFIG_XEN_PVHVM=y diff --git a/baseconfig/x86/i686/CONFIG_COMMON_CLK_SI570 b/baseconfig/x86/i686/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index aa74641..0000000 --- a/baseconfig/x86/i686/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_SI570 is not set diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL b/baseconfig/x86/i686/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c2..0000000 --- a/baseconfig/x86/i686/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index 9d584f6..0000000 --- a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index 64dedb0..0000000 --- a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set diff --git a/baseconfig/x86/i686/CONFIG_EDAC_AMD76X b/baseconfig/x86/i686/CONFIG_EDAC_AMD76X new file mode 100644 index 0000000..fe5952e --- /dev/null +++ b/baseconfig/x86/i686/CONFIG_EDAC_AMD76X @@ -0,0 +1 @@ +CONFIG_EDAC_AMD76X=m diff --git a/baseconfig/x86/i686/CONFIG_EDAC_E7XXX b/baseconfig/x86/i686/CONFIG_EDAC_E7XXX new file mode 100644 index 0000000..0322ddb --- /dev/null +++ b/baseconfig/x86/i686/CONFIG_EDAC_E7XXX @@ -0,0 +1 @@ +CONFIG_EDAC_E7XXX=m diff --git a/baseconfig/x86/i686/CONFIG_EDAC_I82860 b/baseconfig/x86/i686/CONFIG_EDAC_I82860 new file mode 100644 index 0000000..5e132db --- /dev/null +++ b/baseconfig/x86/i686/CONFIG_EDAC_I82860 @@ -0,0 +1 @@ +CONFIG_EDAC_I82860=m diff --git a/baseconfig/x86/i686/CONFIG_EDAC_I82875P b/baseconfig/x86/i686/CONFIG_EDAC_I82875P new file mode 100644 index 0000000..dbe32d4 --- /dev/null +++ b/baseconfig/x86/i686/CONFIG_EDAC_I82875P @@ -0,0 +1 @@ +CONFIG_EDAC_I82875P=m diff --git a/baseconfig/x86/i686/CONFIG_EDAC_R82600 b/baseconfig/x86/i686/CONFIG_EDAC_R82600 new file mode 100644 index 0000000..93a01e5 --- /dev/null +++ b/baseconfig/x86/i686/CONFIG_EDAC_R82600 @@ -0,0 +1 @@ +CONFIG_EDAC_R82600=m diff --git a/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE b/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE deleted file mode 100644 index 8ffe20d..0000000 --- a/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EDAC_SBRIDGE is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_COMMON_CLK_SI570 b/baseconfig/x86/i686PAE/CONFIG_COMMON_CLK_SI570 deleted file mode 100644 index aa74641..0000000 --- a/baseconfig/x86/i686PAE/CONFIG_COMMON_CLK_SI570 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_SI570 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c2..0000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index 9d584f6..0000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index 64dedb0..0000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X b/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X new file mode 100644 index 0000000..fe5952e --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X @@ -0,0 +1 @@ +CONFIG_EDAC_AMD76X=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX b/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX new file mode 100644 index 0000000..0322ddb --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX @@ -0,0 +1 @@ +CONFIG_EDAC_E7XXX=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 new file mode 100644 index 0000000..5e132db --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 @@ -0,0 +1 @@ +CONFIG_EDAC_I82860=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P new file mode 100644 index 0000000..dbe32d4 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P @@ -0,0 +1 @@ +CONFIG_EDAC_I82875P=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 b/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 new file mode 100644 index 0000000..93a01e5 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 @@ -0,0 +1 @@ +CONFIG_EDAC_R82600=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE b/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE deleted file mode 100644 index 8ffe20d..0000000 --- a/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EDAC_SBRIDGE is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AK8975 b/baseconfig/x86/x86_64/CONFIG_AK8975 new file mode 100644 index 0000000..547c21a --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AK8975 @@ -0,0 +1 @@ +CONFIG_AK8975=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC new file mode 100644 index 0000000..0960ee6 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +# CONFIG_AXP20X_ADC is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER new file mode 100644 index 0000000..e02cee7 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER @@ -0,0 +1 @@ +# CONFIG_AXP20X_POWER is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_ADC b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC new file mode 100644 index 0000000..e138f36 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC @@ -0,0 +1 @@ +CONFIG_AXP288_ADC=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER new file mode 100644 index 0000000..0418f96 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER @@ -0,0 +1 @@ +CONFIG_AXP288_CHARGER=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE new file mode 100644 index 0000000..e171b95 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE @@ -0,0 +1 @@ +CONFIG_AXP288_FUEL_GAUGE=m diff --git a/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 new file mode 100644 index 0000000..669e6ac --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 @@ -0,0 +1 @@ +CONFIG_BATTERY_MAX17042=m diff --git a/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 new file mode 100644 index 0000000..3128bb6 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 @@ -0,0 +1 @@ +CONFIG_CHARGER_BQ24190=m diff --git a/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION new file mode 100644 index 0000000..3aa5a5f --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION @@ -0,0 +1 @@ +CONFIG_CHT_WC_PMIC_OPREGION=y diff --git a/baseconfig/x86/x86_64/CONFIG_DRM_PANEL b/baseconfig/x86/x86_64/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c2..0000000 --- a/baseconfig/x86/x86_64/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON b/baseconfig/x86/x86_64/CONFIG_EXTCON new file mode 100644 index 0000000..0a7190c --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON @@ -0,0 +1 @@ +CONFIG_EXTCON=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 new file mode 100644 index 0000000..7fadeb5 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 @@ -0,0 +1 @@ +CONFIG_EXTCON_AXP288=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO new file mode 100644 index 0000000..87ca2bd --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_GPIO is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC new file mode 100644 index 0000000..06e0472 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC @@ -0,0 +1 @@ +CONFIG_EXTCON_INTEL_CHT_WC=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 new file mode 100644 index 0000000..680b5a7 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 @@ -0,0 +1 @@ +# CONFIG_EXTCON_MAX3355 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A new file mode 100644 index 0000000..e5f7236 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A @@ -0,0 +1 @@ +# CONFIG_EXTCON_RT8973A is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 new file mode 100644 index 0000000..916994a --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 @@ -0,0 +1 @@ +# CONFIG_EXTCON_SM5502 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO new file mode 100644 index 0000000..7a0c9af --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_USB_GPIO is not set diff --git a/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 new file mode 100644 index 0000000..c716822 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 @@ -0,0 +1 @@ +# CONFIG_GPIO_AXP209 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC b/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC new file mode 100644 index 0000000..f656e03 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC @@ -0,0 +1 @@ +CONFIG_I2C_CHT_WC=m diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE new file mode 100644 index 0000000..f9cdc63 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_CORE=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI new file mode 100644 index 0000000..6103f94 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_PCI=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM new file mode 100644 index 0000000..3d50a3e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC b/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC new file mode 100644 index 0000000..d79565e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC @@ -0,0 +1 @@ +CONFIG_INFINIBAND_OPA_VNIC=m diff --git a/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK new file mode 100644 index 0000000..e2fbdf9 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK @@ -0,0 +1 @@ +CONFIG_INPUT_AXP20X_PEK=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO b/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO new file mode 100644 index 0000000..7ab08bb --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO @@ -0,0 +1 @@ +CONFIG_INTEL_INT0002_VGPIO=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC b/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC new file mode 100644 index 0000000..2f89205 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC @@ -0,0 +1 @@ +CONFIG_INTEL_SOC_PMIC_CHTWC=y diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C new file mode 100644 index 0000000..8ec049b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_I2C=m diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO new file mode 100644 index 0000000..ae4889d --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_IIO=m diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X new file mode 100644 index 0000000..ada79c0 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X @@ -0,0 +1 @@ +CONFIG_MFD_AXP20X=y diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C new file mode 100644 index 0000000..22c6029 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C @@ -0,0 +1 @@ +CONFIG_MFD_AXP20X_I2C=y diff --git a/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX b/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX deleted file mode 100644 index 3fd0f86..0000000 --- a/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NR_DEV_DAX=32768 diff --git a/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI new file mode 100644 index 0000000..25b0173 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI @@ -0,0 +1 @@ +CONFIG_SILEAD_DMI=y diff --git a/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM new file mode 100644 index 0000000..060ebfc --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM @@ -0,0 +1 @@ +CONFIG_USB_XHCI_PLATFORM=m diff --git a/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION new file mode 100644 index 0000000..8c98df1 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION @@ -0,0 +1 @@ +CONFIG_XPOWER_PMIC_OPREGION=y diff --git a/bcm2835-clk-audio-jitter-issues.patch b/bcm2835-clk-audio-jitter-issues.patch new file mode 100644 index 0000000..91304d6 --- /dev/null +++ b/bcm2835-clk-audio-jitter-issues.patch @@ -0,0 +1,206 @@ +From patchwork Thu Jun 1 14:14:16 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,1/2] clk: bcm2835: Limit PCM clock to OSC and PLLD_PER +From: Phil Elwell +X-Patchwork-Id: 9759641 +Message-Id: <8cc0ba82-d33e-127b-7b86-ac595ef416d1@raspberrypi.org> +To: Michael Turquette , + Stephen Boyd , Eric Anholt , + Stefan Wahren , + Florian Fainelli , + linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org +Date: Thu, 1 Jun 2017 15:14:16 +0100 + +Restrict clock sources for the PCM peripheral to the oscillator and +PLLD_PER because other source may have varying rates or be switched off. +Prevent other sources from being selected by replacing their names in +the list of potential parents with dummy entries (entry index is +significant). + +Signed-off-by: Phil Elwell +Reviewed-by: Eric Anholt +Acked-by: Stefan Wahren +--- + drivers/clk/bcm/clk-bcm2835.c | 27 ++++++++++++++++++++++++++- + 1 file changed, 26 insertions(+), 1 deletion(-) + +diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c +index 0258538..49867d2 100644 +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1516,6 +1516,31 @@ struct bcm2835_clk_desc { + .parents = bcm2835_clock_per_parents, \ + __VA_ARGS__) + ++/* ++ * Restrict clock sources for the PCM peripheral to the oscillator and ++ * PLLD_PER because other source may have varying rates or be switched ++ * off. ++ * ++ * Prevent other sources from being selected by replacing their names in ++ * the list of potential parents with dummy entries (entry index is ++ * significant). ++ */ ++static const char *const bcm2835_pcm_per_parents[] = { ++ "-", ++ "xosc", ++ "-", ++ "-", ++ "-", ++ "-", ++ "plld_per", ++ "-", ++}; ++ ++#define REGISTER_PCM_CLK(...) REGISTER_CLK( \ ++ .num_mux_parents = ARRAY_SIZE(bcm2835_pcm_per_parents), \ ++ .parents = bcm2835_pcm_per_parents, \ ++ __VA_ARGS__) ++ + /* main vpu parent mux */ + static const char *const bcm2835_clock_vpu_parents[] = { + "gnd", +@@ -1993,7 +2018,7 @@ struct bcm2835_clk_desc { + .int_bits = 4, + .frac_bits = 8, + .tcnt_mux = 22), +- [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK( ++ [BCM2835_CLOCK_PCM] = REGISTER_PCM_CLK( + .name = "pcm", + .ctl_reg = CM_PCMCTL, + .div_reg = CM_PCMDIV, +From patchwork Thu Jun 1 14:14:22 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,2/2] clk: bcm2835: Minimise clock jitter for PCM clock +From: Phil Elwell +X-Patchwork-Id: 9759643 +Message-Id: <9989244b-ca4d-9081-95d9-b24f51099222@raspberrypi.org> +To: Michael Turquette , + Stephen Boyd , Eric Anholt , + Stefan Wahren , + Florian Fainelli , + linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org +Date: Thu, 1 Jun 2017 15:14:22 +0100 + +Fractional clock dividers generate accurate average frequencies but +with jitter, particularly when the integer divisor is small. + +Introduce a new metric of clock accuracy to penalise clocks with a good +average but worse jitter compared to clocks with an average which is no +better but with lower jitter. The metric is the ideal rate minus the +worse deviation from that ideal using the nearest integer divisors. + +Use this metric for parent selection for clocks requiring low jitter +(currently just PCM). + +Signed-off-by: Phil Elwell +Reviewed-by: Eric Anholt +Acked-by: Stefan Wahren +--- + drivers/clk/bcm/clk-bcm2835.c | 34 +++++++++++++++++++++++++++++----- + 1 file changed, 29 insertions(+), 5 deletions(-) + +diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c +index 49867d2..0bc56a0 100644 +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -530,6 +530,7 @@ struct bcm2835_clock_data { + + bool is_vpu_clock; + bool is_mash_clock; ++ bool low_jitter; + + u32 tcnt_mux; + }; +@@ -1124,7 +1125,8 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, + int parent_idx, + unsigned long rate, + u32 *div, +- unsigned long *prate) ++ unsigned long *prate, ++ unsigned long *avgrate) + { + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); + struct bcm2835_cprman *cprman = clock->cprman; +@@ -1139,8 +1141,25 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, + *prate = clk_hw_get_rate(parent); + *div = bcm2835_clock_choose_div(hw, rate, *prate, true); + +- return bcm2835_clock_rate_from_divisor(clock, *prate, +- *div); ++ *avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div); ++ ++ if (data->low_jitter && (*div & CM_DIV_FRAC_MASK)) { ++ unsigned long high, low; ++ u32 int_div = *div & ~CM_DIV_FRAC_MASK; ++ ++ high = bcm2835_clock_rate_from_divisor(clock, *prate, ++ int_div); ++ int_div += CM_DIV_FRAC_MASK + 1; ++ low = bcm2835_clock_rate_from_divisor(clock, *prate, ++ int_div); ++ ++ /* ++ * Return a value which is the maximum deviation ++ * below the ideal rate, for use as a metric. ++ */ ++ return *avgrate - max(*avgrate - low, high - *avgrate); ++ } ++ return *avgrate; + } + + if (data->frac_bits) +@@ -1167,6 +1186,7 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, + + *div = curdiv << CM_DIV_FRAC_BITS; + *prate = curdiv * best_rate; ++ *avgrate = best_rate; + + return best_rate; + } +@@ -1178,6 +1198,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw, + bool current_parent_is_pllc; + unsigned long rate, best_rate = 0; + unsigned long prate, best_prate = 0; ++ unsigned long avgrate, best_avgrate = 0; + size_t i; + u32 div; + +@@ -1202,11 +1223,13 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw, + continue; + + rate = bcm2835_clock_choose_div_and_prate(hw, i, req->rate, +- &div, &prate); ++ &div, &prate, ++ &avgrate); + if (rate > best_rate && rate <= req->rate) { + best_parent = parent; + best_prate = prate; + best_rate = rate; ++ best_avgrate = avgrate; + } + } + +@@ -1216,7 +1239,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw, + req->best_parent_hw = best_parent; + req->best_parent_rate = best_prate; + +- req->rate = best_rate; ++ req->rate = best_avgrate; + + return 0; + } +@@ -2025,6 +2048,7 @@ struct bcm2835_clk_desc { + .int_bits = 12, + .frac_bits = 12, + .is_mash_clock = true, ++ .low_jitter = true, + .tcnt_mux = 23), + [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK( + .name = "pwm", diff --git a/bcm2835-fix-potential-null-pointer-dereferences.patch b/bcm2835-fix-potential-null-pointer-dereferences.patch new file mode 100644 index 0000000..862e77f --- /dev/null +++ b/bcm2835-fix-potential-null-pointer-dereferences.patch @@ -0,0 +1,70 @@ +From patchwork Thu May 25 17:04:55 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2] mmc: bcm2835: fix potential null pointer dereferences +From: "Gustavo A. R. Silva" +X-Patchwork-Id: 9748761 +Message-Id: <20170525170455.GA6904@embeddedgus> +To: Stefan Wahren , + Ulf Hansson , + Florian Fainelli , + Ray Jui , Scott Branden , + bcm-kernel-feedback-list@broadcom.com, Eric Anholt +Cc: "Gustavo A. R. Silva" , + linux-mmc@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, + linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org +Date: Thu, 25 May 2017 12:04:55 -0500 + +Null check at line 1165: if (mrq->cmd), implies that mrq->cmd might +be NULL. +Add null checks before dereferencing pointer mrq->cmd in order to avoid +any potential NULL pointer dereference. + +Addresses-Coverity-ID: 1408740 +Tested-by: Stefan Wahren +Signed-off-by: Gustavo A. R. Silva +--- +Changes in v2: + Change subject to make it clear the patch is bcm2835 related. + + drivers/mmc/host/bcm2835.c | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c +index 1f343a4..abba9a2 100644 +--- a/drivers/mmc/host/bcm2835.c ++++ b/drivers/mmc/host/bcm2835.c +@@ -1172,7 +1172,10 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) + if (mrq->data && !is_power_of_2(mrq->data->blksz)) { + dev_err(dev, "unsupported block size (%d bytes)\n", + mrq->data->blksz); +- mrq->cmd->error = -EINVAL; ++ ++ if (mrq->cmd) ++ mrq->cmd->error = -EINVAL; ++ + mmc_request_done(mmc, mrq); + return; + } +@@ -1194,7 +1197,10 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) + readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, + edm); + bcm2835_dumpregs(host); +- mrq->cmd->error = -EILSEQ; ++ ++ if (mrq->cmd) ++ mrq->cmd->error = -EILSEQ; ++ + bcm2835_finish_request(host); + mutex_unlock(&host->mutex); + return; +@@ -1207,7 +1213,7 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) + if (!host->use_busy) + bcm2835_finish_command(host); + } +- } else if (bcm2835_send_command(host, mrq->cmd)) { ++ } else if (mrq->cmd && bcm2835_send_command(host, mrq->cmd)) { + if (host->data && host->dma_desc) { + /* DMA transfer starts now, PIO starts after irq */ + bcm2835_start_dma(host); diff --git a/bcm2835-pinctrl-Avoid-warning-from-__irq_do_set_handler.patch b/bcm2835-pinctrl-Avoid-warning-from-__irq_do_set_handler.patch new file mode 100644 index 0000000..258d3b2 --- /dev/null +++ b/bcm2835-pinctrl-Avoid-warning-from-__irq_do_set_handler.patch @@ -0,0 +1,70 @@ +From patchwork Wed Jun 21 18:20:04 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: pinctrl: bcm2835: Avoid warning from __irq_do_set_handler +From: Stefan Wahren +X-Patchwork-Id: 9802555 +Message-Id: <1498069204-28154-1-git-send-email-stefan.wahren@i2se.com> +To: Linus Walleij , Eric Anholt +Cc: Stefan Wahren , linux-gpio@vger.kernel.org, + Phil Elwell , linux-rpi-kernel@lists.infradead.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 21 Jun 2017 20:20:04 +0200 + +We get a warning during boot with enabled EARLY_PRINTK that +we try to set a irq_chip without data. This is caused by ignoring +the return value of irq_of_parse_and_map(). So avoid calling +gpiochip_set_chained_irqchip() in error case. + +Signed-off-by: Stefan Wahren +Fixes: 85ae9e512f43 ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP") +--- + drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c +index 1eb7a1a..2308831 100644 +--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c ++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c +@@ -1048,6 +1048,10 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) + for (i = 0; i < BCM2835_NUM_IRQS; i++) { + pc->irq[i] = irq_of_parse_and_map(np, i); + pc->irq_group[i] = i; ++ ++ if (pc->irq[i] == 0) ++ continue; ++ + /* + * Use the same handler for all groups: this is necessary + * since we use one gpiochip to cover all lines - the +From 8aa99fe688734f249b07314cdd7c5e25651c9c6d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 27 Oct 2016 16:21:19 +0100 +Subject: irq-bcm2836: Prevent spurious interrupts, and trap them early + +The old arch-specific IRQ macros included a dsb to ensure the +write to clear the mailbox interrupt completed before returning +from the interrupt. The BCM2836 irqchip driver needs the same +precaution to avoid spurious interrupts. + +Signed-off-by: Phil Elwell +--- + drivers/irqchip/irq-bcm2836.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c +index e7463e3..a8db33b 100644 +--- a/drivers/irqchip/irq-bcm2836.c ++++ b/drivers/irqchip/irq-bcm2836.c +@@ -175,6 +175,7 @@ __exception_irq_entry bcm2836_arm_irqchip_handle_irq(struct pt_regs *regs) + u32 ipi = ffs(mbox_val) - 1; + + writel(1 << ipi, mailbox0); ++ dsb(sy); + handle_IPI(ipi, regs); + #endif + } else if (stat) { +-- +cgit v0.12 + diff --git a/bcm2837-arm32-support.patch b/bcm2837-arm32-support.patch new file mode 100644 index 0000000..021ae10 --- /dev/null +++ b/bcm2837-arm32-support.patch @@ -0,0 +1,48 @@ +From patchwork Tue Apr 25 16:45:08 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6) +From: Eric Anholt +X-Patchwork-Id: 9698781 +Message-Id: <20170425164508.32242-1-eric@anholt.net> +To: Lee Jones , Florian Fainelli , + Olof Johansson , Rob Herring , + Mark Rutland , devicetree@vger.kernel.org +Cc: Stefan Wahren , linux-kernel@vger.kernel.org, + Eric Anholt , bcm-kernel-feedback-list@broadcom.com, + Gerd Hoffmann , linux-arm-kernel@lists.infradead.org, + linux-rpi-kernel@lists.infradead.org +Date: Tue, 25 Apr 2017 09:45:08 -0700 + +Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for +now, so it's useful to be able to test that mode on an upstream +kernel. It's also been useful for me to use the same board for 32-bit +and 64-bit development. + +Signed-off-by: Eric Anholt +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + + 2 files changed, 2 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 011808490fed..eded842d9978 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2835-rpi-b-plus.dtb \ + bcm2835-rpi-a-plus.dtb \ + bcm2836-rpi-2-b.dtb \ ++ bcm2837-rpi-3-b.dtb \ + bcm2835-rpi-zero.dtb + dtb-$(CONFIG_ARCH_BCM_5301X) += \ + bcm4708-asus-rt-ac56u.dtb \ +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +new file mode 100644 +index 000000000000..c72a27d908b6 +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -0,0 +1 @@ ++#include "../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts" diff --git a/bcm2837-initial-support.patch b/bcm2837-initial-support.patch deleted file mode 100644 index d18446d..0000000 --- a/bcm2837-initial-support.patch +++ /dev/null @@ -1,66 +0,0 @@ -From patchwork Wed Feb 8 22:40:24 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v3) -From: Eric Anholt -X-Patchwork-Id: 9563699 -Message-Id: <20170208224024.30415-1-eric@anholt.net> -To: Florian Fainelli , Rob Herring , - Mark Rutland , devicetree@vger.kernel.org -Cc: Stephen Warren , Lee Jones , - linux-kernel@vger.kernel.org, Eric Anholt , - bcm-kernel-feedback-list@broadcom.com, - linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org, Gerd Hoffmann -Date: Wed, 8 Feb 2017 14:40:24 -0800 - -Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for -now, so it's useful to be able to test that mode on an upstream -kernel. It's also been useful for me to use the same board for 32-bit -and 64-bit development. - -Signed-off-by: Eric Anholt ---- - -v1: Gerd's patch that put the ../../../arm64/... link in the Makefile -v2: Michael's patch that #included from ../../../arm64/... in a new - bcm2837-rpi-3-b.dts. -v3: Mine, using symlinks to make sure that we don't break the split DT - tree. - - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + - arch/arm/boot/dts/bcm2837.dtsi | 1 + - 3 files changed, 3 insertions(+) - create mode 120000 arch/arm/boot/dts/bcm2837-rpi-3-b.dts - create mode 120000 arch/arm/boot/dts/bcm2837.dtsi - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 6576e3f000c9..416fdcedf5a1 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -70,6 +70,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ - bcm2836-rpi-2-b.dtb \ -+ bcm2837-rpi-3-b.dtb \ - bcm2835-rpi-zero.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -new file mode 120000 -index 000000000000..ceebc0e163fb ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -0,0 +1 @@ -+../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -\ No newline at end of file -diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi -new file mode 120000 -index 000000000000..53f1cd2bba47 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837.dtsi -@@ -0,0 +1 @@ -+../../../arm64/boot/dts/broadcom/bcm2837.dtsi -\ No newline at end of file diff --git a/bcm2837-sdhost-fixes.patch b/bcm2837-sdhost-fixes.patch new file mode 100644 index 0000000..9b81005 --- /dev/null +++ b/bcm2837-sdhost-fixes.patch @@ -0,0 +1,83 @@ +From e199a012a0fb0be11ccd26b4a502ae830eb10db0 Mon Sep 17 00:00:00 2001 +From: Gerd Hoffmann +Date: Tue, 21 Jun 2016 11:47:56 +0200 +Subject: arm64: dts: bcm2837: add &sdhci and &sdhost + +For the raspberry pi 3 we'll need both sdhci (handles sdio wifi) and +sdhost (handles sdcard). + +Signed-off-by: Gerd Hoffmann +Acked-by: Eric Anholt +--- + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +index c309633..972f14d 100644 +--- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +@@ -22,3 +22,20 @@ + &uart1 { + status = "okay"; + }; ++ ++/* SDHCI is used to control the SDIO for wireless */ ++&sdhci { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_gpio34>; ++ status = "okay"; ++ bus-width = <4>; ++ non-removable; ++}; ++ ++/* SDHOST is used to drive the SD card */ ++&sdhost { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdhost_gpio48>; ++ status = "okay"; ++ bus-width = <4>; ++}; +-- +cgit v0.12 + +From 0c1759bc4fc8884d790d4ab99b5276132559b5a1 Mon Sep 17 00:00:00 2001 +From: Gerd Hoffmann +Date: Tue, 21 Jun 2016 10:00:58 +0200 +Subject: arm: dts: bcm283x: switch from &sdhci to &sdhost + +sdcard access with the sdhost controller is faster. + +Read access (dd with 64k blocks on rpi2): + CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s + CONFIG_MMC_BCM2835: 19-20 MB/s + +Differences on write access are pretty much in the noise. + +Signed-off-by: Gerd Hoffmann +Acked-by: Eric Anholt +--- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index 8b95832..e36c392 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -65,13 +65,13 @@ + &sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio48>; +- status = "okay"; + bus-width = <4>; + }; + + &sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; ++ status = "okay"; + bus-width = <4>; + }; + +-- +cgit v0.12 + diff --git a/bcm283x-Define-UART-pinmuxing-on-board-level.patch b/bcm283x-Define-UART-pinmuxing-on-board-level.patch new file mode 100644 index 0000000..26efe90 --- /dev/null +++ b/bcm283x-Define-UART-pinmuxing-on-board-level.patch @@ -0,0 +1,171 @@ +From patchwork Thu Jul 20 19:37:07 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/3] ARM: bcm283x: Define UART pinmuxing on board level +From: Stefan Wahren +X-Patchwork-Id: 9855625 +Message-Id: <1500579429-9101-2-git-send-email-stefan.wahren@i2se.com> +To: Eric Anholt , Rob Herring , + Mark Rutland +Cc: Stefan Wahren , devicetree@vger.kernel.org, + Florian Fainelli , + Scott Branden , + linux-rpi-kernel@lists.infradead.org, + linux-arm-kernel@lists.infradead.org, Gerd Hoffmann +Date: Thu, 20 Jul 2017 21:37:07 +0200 + +Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in +order to take care of them and other boards in the future, +we need to define UART pinmuxing on board level. + +This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011 +onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign +uart0 to BT and uart1 to pin headers". + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-zero.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++ + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 10 ++++++++++ + 9 files changed, 53 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +index d070454..9f86649 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +@@ -99,3 +99,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts +index 46d078e..4b1af06 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts +@@ -94,3 +94,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +index 432088e..a846f1e 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +@@ -101,3 +101,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +index 4133bc2..e860964 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +@@ -94,3 +94,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts +index 4d56fe3..5d77f3f 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts +@@ -89,3 +89,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +index 79a20d5..7036240 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +@@ -103,3 +103,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index e55b362..e36c392 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -39,7 +39,7 @@ + }; + + alt0: alt0 { +- brcm,pins = <4 5 7 8 9 10 11 14 15>; ++ brcm,pins = <4 5 7 8 9 10 11>; + brcm,function = ; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +index bf19e8c..e8de414 100644 +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -39,3 +39,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +index 972f14d..20725ca 100644 +--- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +@@ -19,7 +19,17 @@ + }; + }; + ++/* uart0 communicates with the BT module */ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ctsrts_gpio30 &gpclk2_gpio43>; ++ status = "okay"; ++}; ++ ++/* uart1 is mapped to the pin header */ + &uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_gpio14>; + status = "okay"; + }; + diff --git a/bcm283x-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch b/bcm283x-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch new file mode 100644 index 0000000..70a5282 --- /dev/null +++ b/bcm283x-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch @@ -0,0 +1,42 @@ +From patchwork Thu Feb 9 18:16:00 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: drm/vc4: Fix OOPSes from trying to cache a partially constructed BO. +From: Eric Anholt +X-Patchwork-Id: 138087 +Message-Id: <20170209181600.24048-1-eric@anholt.net> +To: dri-devel@lists.freedesktop.org +Cc: linux-kernel@vger.kernel.org, pbrobinson@gmail.com +Date: Thu, 9 Feb 2017 10:16:00 -0800 + +If a CMA allocation failed, the partially constructed BO would be +unreferenced through the normal path, and we might choose to put it in +the BO cache. If we then reused it before it expired from the cache, +the kernel would OOPS. + +Signed-off-by: Eric Anholt +Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") +--- + drivers/gpu/drm/vc4/vc4_bo.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c +index 5ec14f25625d..fd83a2807656 100644 +--- a/drivers/gpu/drm/vc4/vc4_bo.c ++++ b/drivers/gpu/drm/vc4/vc4_bo.c +@@ -314,6 +314,14 @@ void vc4_free_object(struct drm_gem_object *gem_bo) + goto out; + } + ++ /* If this object was partially constructed but CMA allocation ++ * had failed, just free it. ++ */ ++ if (!bo->base.vaddr) { ++ vc4_bo_destroy(bo); ++ goto out; ++ } ++ + cache_list = vc4_get_cache_list_for_size(dev, gem_bo->size); + if (!cache_list) { + vc4_bo_destroy(bo); diff --git a/bcm283x-fixes.patch b/bcm283x-fixes.patch deleted file mode 100644 index fcddac5..0000000 --- a/bcm283x-fixes.patch +++ /dev/null @@ -1,218 +0,0 @@ -From patchwork Sun Jan 29 18:40:59 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2] ARM: bcm2835: dts: fix uart0 pinctrl node names -From: Baruch Siach -X-Patchwork-Id: 9544261 -Message-Id: -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 20:40:59 +0200 - -Downstream kernel uses pins 32, 33 as UART0 (PL011) Rx/Tx to communicate with -the Bluetooth chip. So ALT3 of these pins is most likely not CTS/RTS. Change -the node name to reflect that. This matches section 6.2 "Alternative Function -Assignments" in the BCM2835 ARM Peripherals document. - -With this change in place, adding - - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; - status = "okay"; - }; - -to bcm2837-rpi-3-b.dts does the right thing on my Raspberry Pi 3. - -Pins 30, 31 are CTS/RTS of UART0 in alternate function 3. Rename uart0_gpio30 -as well. - -While at it, fix a little typo in a nearby comment. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Acked-by: Stefan Wahren -Signed-off-by: Baruch Siach -Reviewed-by: Eric Anholt ---- -v2: - * Reference the ARM Peripherals document - * Fix subject typo (Stefan) - * Rename also uart0_gpio30 (Stefan) - * Add comment typo fix (Stefan) - * Add Stefan's ack ---- - arch/arm/boot/dts/bcm283x.dtsi | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9a44da190897..bc8ad417c8a3 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -292,17 +292,17 @@ - /* Separate from the uart0_gpio14 group - * because it conflicts with spi1_gpio16, and - * people often run uart0 on the two pins -- * without flow contrl. -+ * without flow control. - */ - uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { - brcm,pins = <16 17>; - brcm,function = ; - }; -- uart0_gpio30: uart0_gpio30 { -+ uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 { - brcm,pins = <30 31>; - brcm,function = ; - }; -- uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { -+ uart0_gpio32: uart0_gpio32 { - brcm,pins = <32 33>; - brcm,function = ; - }; -From patchwork Sun Jan 29 19:53:10 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] ARM: bcm2835: dts: fix i2c0 pins -From: Baruch Siach -X-Patchwork-Id: 9544275 -Message-Id: <9290fa9eed6b5ff1c5c96b9dac41eca286b7eef9.1485719591.git.baruch@tkos.co.il> -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 21:53:10 +0200 - -According to the BCM2835 ARM Peripherals document i2c0 doesn't map to pins 32, -34 but to 28, 29. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Signed-off-by: Baruch Siach ---- - arch/arm/boot/dts/bcm283x.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index bc8ad417c8a3..2ae842921250 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -195,8 +195,8 @@ - brcm,pins = <0 1>; - brcm,function = ; - }; -- i2c0_gpio32: i2c0_gpio32 { -- brcm,pins = <32 34>; -+ i2c0_gpio28: i2c0_gpio28 { -+ brcm,pins = <28 29>; - brcm,function = ; - }; - i2c0_gpio44: i2c0_gpio44 { -From patchwork Sun Jan 29 19:53:11 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/2] ARM: bcm2835: dts: fix uart0/uart1 pins -From: Baruch Siach -X-Patchwork-Id: 9544277 -Message-Id: -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 21:53:11 +0200 - -According to the BCM2835 ARM Peripherals document uart1 doesn't map to pins -36-39, but uart0 does. - -Also, split into separate Rx/Tx and CST/RTS groups to match other uart nodes. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Signed-off-by: Baruch Siach ---- - arch/arm/boot/dts/bcm283x.dtsi | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 2ae842921250..9ee8346b8b19 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -306,6 +306,14 @@ - brcm,pins = <32 33>; - brcm,function = ; - }; -+ uart0_gpio36: uart0_gpio36 { -+ brcm,pins = <36 37>; -+ brcm,function = ; -+ }; -+ uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 { -+ brcm,pins = <38 39>; -+ brcm,function = ; -+ }; - - uart1_gpio14: uart1_gpio14 { - brcm,pins = <14 15>; -@@ -323,10 +331,6 @@ - brcm,pins = <30 31>; - brcm,function = ; - }; -- uart1_gpio36: uart1_gpio36 { -- brcm,pins = <36 37 38 39>; -- brcm,function = ; -- }; - uart1_gpio40: uart1_gpio40 { - brcm,pins = <40 41>; - brcm,function = ; -From patchwork Mon Jan 30 18:44:39 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: bcm2835: dt: add index to the ethernet alias -From: Baruch Siach -X-Patchwork-Id: 9545945 -Message-Id: <5942321c5d0bfea54eac64ace2b217e8e0b6220d.1485801879.git.baruch@tkos.co.il> -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Lubomir Rintel , Baruch Siach , - linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 30 Jan 2017 20:44:39 +0200 - -An alias name should have an index number even when it is the only of its type. -This allows U-Boot to add the local-mac-address property. Otherwise U-Boot -skips the alias. - -Cc: Lubomir Rintel -Fixes: 6a93792774 ("ARM: bcm2835: dt: Add the ethernet to the device trees") -Signed-off-by: Baruch Siach -Acked-by: Lubomir Rintel ---- - arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi | 2 +- - arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi b/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -index 12c981e51134..9a0599f711ff 100644 ---- a/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -@@ -1,6 +1,6 @@ - / { - aliases { -- ethernet = ðernet; -+ ethernet0 = ðernet; - }; - }; - -diff --git a/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi b/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -index 3f0a56ebcf1f..dc7ae776db5f 100644 ---- a/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -@@ -1,6 +1,6 @@ - / { - aliases { -- ethernet = ðernet; -+ ethernet0 = ðernet; - }; - }; - diff --git a/bcm283x-hdmi-audio.patch b/bcm283x-hdmi-audio.patch deleted file mode 100644 index 3ed3d2d..0000000 --- a/bcm283x-hdmi-audio.patch +++ /dev/null @@ -1,836 +0,0 @@ -From bbcb8aacb871edf0360e808180162591b11c6a35 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:01 -0800 -Subject: [PATCH 1/3] dt-bindings: Document the dmas and dma-names properties - for VC4 HDMI - -These are optional, but necessary for HDMI audio support. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt -Acked-by: Rob Herring -Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-1-eric@anholt.net ---- - Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -index 34c7fddcea39..ca02d3e4db91 100644 ---- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -+++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -@@ -34,6 +34,9 @@ Optional properties for HDMI: - - hpd-gpios: The GPIO pin for HDMI hotplug detect (if it doesn't appear - as an interrupt/status bit in the HDMI controller - itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt -+- dmas: Should contain one entry pointing to the DMA channel used to -+ transfer audio data -+- dma-names: Should contain "audio-rx" - - Required properties for DPI: - - compatible: Should be "brcm,bcm2835-dpi" --- -2.12.0 - -From 8e13e0d8ecf2202c707225a612d10c9534d849f7 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 27 Feb 2017 12:28:02 -0800 -Subject: [PATCH 2/3] drm/vc4: Add HDMI audio support - -The HDMI encoder IP embeds all needed blocks to output audio, with a -custom DAI called MAI moving audio between the two parts of the HDMI -core. This driver now exposes a sound card to let users stream audio -to their display. - -Using the hdmi-codec driver has been considered here, but MAI meant -having to significantly rework hdmi-codec, and it would have left -little shared code with the I2S mode anyway. - -The encoder requires that the audio be SPDIF-formatted frames only, -which alsalib will format-convert for us. - -This patch is the combined work of Eric Anholt (initial register setup -with a separate dmaengine driver and using simple-audio-card) and -Boris Brezillon (moving it all into HDMI, massive debug to get it -actually working), and which Eric has the permission to release. - -v2: Drop "-audio" from sound card name, since that's already implied - (suggestion by Boris) - -Signed-off-by: Eric Anholt -Acked-by: Boris Brezillon -Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-2-eric@anholt.net ---- - drivers/gpu/drm/vc4/Kconfig | 4 + - drivers/gpu/drm/vc4/vc4_hdmi.c | 494 ++++++++++++++++++++++++++++++++++++++++- - drivers/gpu/drm/vc4/vc4_regs.h | 107 ++++++++- - 3 files changed, 603 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig -index e1517d07cb7d..973b4203c0b2 100644 ---- a/drivers/gpu/drm/vc4/Kconfig -+++ b/drivers/gpu/drm/vc4/Kconfig -@@ -2,11 +2,15 @@ config DRM_VC4 - tristate "Broadcom VC4 Graphics" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on DRM -+ depends on SND && SND_SOC - depends on COMMON_CLK - select DRM_KMS_HELPER - select DRM_KMS_CMA_HELPER - select DRM_GEM_CMA_HELPER - select DRM_PANEL -+ select SND_PCM -+ select SND_PCM_ELD -+ select SND_SOC_GENERIC_DMAENGINE_PCM - select DRM_MIPI_DSI - help - Choose this option if you have a system that has a Broadcom -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 93d5994f3a04..e4abf4bfc464 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -31,11 +31,27 @@ - #include "linux/clk.h" - #include "linux/component.h" - #include "linux/i2c.h" -+#include "linux/of_address.h" - #include "linux/of_gpio.h" - #include "linux/of_platform.h" -+#include "linux/rational.h" -+#include "sound/dmaengine_pcm.h" -+#include "sound/pcm_drm_eld.h" -+#include "sound/pcm_params.h" -+#include "sound/soc.h" - #include "vc4_drv.h" - #include "vc4_regs.h" - -+/* HDMI audio information */ -+struct vc4_hdmi_audio { -+ struct snd_soc_card card; -+ struct snd_soc_dai_link link; -+ int samplerate; -+ int channels; -+ struct snd_dmaengine_dai_dma_data dma_data; -+ struct snd_pcm_substream *substream; -+}; -+ - /* General HDMI hardware state. */ - struct vc4_hdmi { - struct platform_device *pdev; -@@ -43,6 +59,8 @@ struct vc4_hdmi { - struct drm_encoder *encoder; - struct drm_connector *connector; - -+ struct vc4_hdmi_audio audio; -+ - struct i2c_adapter *ddc; - void __iomem *hdmicore_regs; - void __iomem *hd_regs; -@@ -98,6 +116,10 @@ static const struct { - HDMI_REG(VC4_HDMI_SW_RESET_CONTROL), - HDMI_REG(VC4_HDMI_HOTPLUG_INT), - HDMI_REG(VC4_HDMI_HOTPLUG), -+ HDMI_REG(VC4_HDMI_MAI_CHANNEL_MAP), -+ HDMI_REG(VC4_HDMI_MAI_CONFIG), -+ HDMI_REG(VC4_HDMI_MAI_FORMAT), -+ HDMI_REG(VC4_HDMI_AUDIO_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_HORZA), - HDMI_REG(VC4_HDMI_HORZB), -@@ -108,6 +130,7 @@ static const struct { - HDMI_REG(VC4_HDMI_VERTB0), - HDMI_REG(VC4_HDMI_VERTB1), - HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL), -+ HDMI_REG(VC4_HDMI_TX_PHY_CTL0), - }; - - static const struct { -@@ -116,6 +139,9 @@ static const struct { - } hd_regs[] = { - HDMI_REG(VC4_HD_M_CTL), - HDMI_REG(VC4_HD_MAI_CTL), -+ HDMI_REG(VC4_HD_MAI_THR), -+ HDMI_REG(VC4_HD_MAI_FMT), -+ HDMI_REG(VC4_HD_MAI_SMP), - HDMI_REG(VC4_HD_VID_CTL), - HDMI_REG(VC4_HD_CSC_CTL), - HDMI_REG(VC4_HD_FRAME_COUNT), -@@ -215,6 +241,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) - - drm_mode_connector_update_edid_property(connector, edid); - ret = drm_add_edid_modes(connector, edid); -+ drm_edid_to_eld(connector, edid); - - return ret; - } -@@ -300,7 +327,7 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder, - struct drm_device *dev = encoder->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); - u32 packet_id = frame->any.type - 0x80; -- u32 packet_reg = VC4_HDMI_GCP_0 + VC4_HDMI_PACKET_STRIDE * packet_id; -+ u32 packet_reg = VC4_HDMI_RAM_PACKET(packet_id); - uint8_t buffer[VC4_HDMI_PACKET_STRIDE]; - ssize_t len, i; - int ret; -@@ -381,6 +408,24 @@ static void vc4_hdmi_set_spd_infoframe(struct drm_encoder *encoder) - vc4_hdmi_write_infoframe(encoder, &frame); - } - -+static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder) -+{ -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = drm->dev_private; -+ struct vc4_hdmi *hdmi = vc4->hdmi; -+ union hdmi_infoframe frame; -+ int ret; -+ -+ ret = hdmi_audio_infoframe_init(&frame.audio); -+ -+ frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; -+ frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; -+ frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; -+ frame.audio.channels = hdmi->audio.channels; -+ -+ vc4_hdmi_write_infoframe(encoder, &frame); -+} -+ - static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder) - { - vc4_hdmi_set_avi_infoframe(encoder); -@@ -589,6 +634,447 @@ static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = { - .enable = vc4_hdmi_encoder_enable, - }; - -+/* HDMI audio codec callbacks */ -+static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *hdmi) -+{ -+ struct drm_device *drm = hdmi->encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ u32 hsm_clock = clk_get_rate(hdmi->hsm_clock); -+ unsigned long n, m; -+ -+ rational_best_approximation(hsm_clock, hdmi->audio.samplerate, -+ VC4_HD_MAI_SMP_N_MASK >> -+ VC4_HD_MAI_SMP_N_SHIFT, -+ (VC4_HD_MAI_SMP_M_MASK >> -+ VC4_HD_MAI_SMP_M_SHIFT) + 1, -+ &n, &m); -+ -+ HD_WRITE(VC4_HD_MAI_SMP, -+ VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) | -+ VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M)); -+} -+ -+static void vc4_hdmi_set_n_cts(struct vc4_hdmi *hdmi) -+{ -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_crtc *crtc = encoder->crtc; -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ const struct drm_display_mode *mode = &crtc->state->adjusted_mode; -+ u32 samplerate = hdmi->audio.samplerate; -+ u32 n, cts; -+ u64 tmp; -+ -+ n = 128 * samplerate / 1000; -+ tmp = (u64)(mode->clock * 1000) * n; -+ do_div(tmp, 128 * samplerate); -+ cts = tmp; -+ -+ HDMI_WRITE(VC4_HDMI_CRP_CFG, -+ VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN | -+ VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N)); -+ -+ /* -+ * We could get slightly more accurate clocks in some cases by -+ * providing a CTS_1 value. The two CTS values are alternated -+ * between based on the period fields -+ */ -+ HDMI_WRITE(VC4_HDMI_CTS_0, cts); -+ HDMI_WRITE(VC4_HDMI_CTS_1, cts); -+} -+ -+static inline struct vc4_hdmi *dai_to_hdmi(struct snd_soc_dai *dai) -+{ -+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai); -+ -+ return snd_soc_card_get_drvdata(card); -+} -+ -+static int vc4_hdmi_audio_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct vc4_dev *vc4 = to_vc4_dev(encoder->dev); -+ int ret; -+ -+ if (hdmi->audio.substream && hdmi->audio.substream != substream) -+ return -EINVAL; -+ -+ hdmi->audio.substream = substream; -+ -+ /* -+ * If the HDMI encoder hasn't probed, or the encoder is -+ * currently in DVI mode, treat the codec dai as missing. -+ */ -+ if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & -+ VC4_HDMI_RAM_PACKET_ENABLE)) -+ return -ENODEV; -+ -+ ret = snd_pcm_hw_constraint_eld(substream->runtime, -+ hdmi->connector->eld); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) -+{ -+ return 0; -+} -+ -+static void vc4_hdmi_audio_reset(struct vc4_hdmi *hdmi) -+{ -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct device *dev = &hdmi->pdev->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ int ret; -+ -+ ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO); -+ if (ret) -+ dev_err(dev, "Failed to stop audio infoframe: %d\n", ret); -+ -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_RESET); -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_ERRORF); -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_FLUSH); -+} -+ -+static void vc4_hdmi_audio_shutdown(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ -+ if (substream != hdmi->audio.substream) -+ return; -+ -+ vc4_hdmi_audio_reset(hdmi); -+ -+ hdmi->audio.substream = NULL; -+} -+ -+/* HDMI audio codec callbacks */ -+static int vc4_hdmi_audio_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct device *dev = &hdmi->pdev->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ u32 audio_packet_config, channel_mask; -+ u32 channel_map, i; -+ -+ if (substream != hdmi->audio.substream) -+ return -EINVAL; -+ -+ dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__, -+ params_rate(params), params_width(params), -+ params_channels(params)); -+ -+ hdmi->audio.channels = params_channels(params); -+ hdmi->audio.samplerate = params_rate(params); -+ -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_HD_MAI_CTL_RESET | -+ VC4_HD_MAI_CTL_FLUSH | -+ VC4_HD_MAI_CTL_DLATE | -+ VC4_HD_MAI_CTL_ERRORE | -+ VC4_HD_MAI_CTL_ERRORF); -+ -+ vc4_hdmi_audio_set_mai_clock(hdmi); -+ -+ audio_packet_config = -+ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT | -+ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS | -+ VC4_SET_FIELD(0xf, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER); -+ -+ channel_mask = GENMASK(hdmi->audio.channels - 1, 0); -+ audio_packet_config |= VC4_SET_FIELD(channel_mask, -+ VC4_HDMI_AUDIO_PACKET_CEA_MASK); -+ -+ /* Set the MAI threshold. This logic mimics the firmware's. */ -+ if (hdmi->audio.samplerate > 96000) { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); -+ } else if (hdmi->audio.samplerate > 48000) { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); -+ } else { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW)); -+ } -+ -+ HDMI_WRITE(VC4_HDMI_MAI_CONFIG, -+ VC4_HDMI_MAI_CONFIG_BIT_REVERSE | -+ VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK)); -+ -+ channel_map = 0; -+ for (i = 0; i < 8; i++) { -+ if (channel_mask & BIT(i)) -+ channel_map |= i << (3 * i); -+ } -+ -+ HDMI_WRITE(VC4_HDMI_MAI_CHANNEL_MAP, channel_map); -+ HDMI_WRITE(VC4_HDMI_AUDIO_PACKET_CONFIG, audio_packet_config); -+ vc4_hdmi_set_n_cts(hdmi); -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_trigger(struct snd_pcm_substream *substream, int cmd, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ vc4_hdmi_set_audio_infoframe(encoder); -+ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, -+ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) & -+ ~VC4_HDMI_TX_PHY_RNG_PWRDN); -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_SET_FIELD(hdmi->audio.channels, -+ VC4_HD_MAI_CTL_CHNUM) | -+ VC4_HD_MAI_CTL_ENABLE); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_HD_MAI_CTL_DLATE | -+ VC4_HD_MAI_CTL_ERRORE | -+ VC4_HD_MAI_CTL_ERRORF); -+ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, -+ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) | -+ VC4_HDMI_TX_PHY_RNG_PWRDN); -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static inline struct vc4_hdmi * -+snd_component_to_hdmi(struct snd_soc_component *component) -+{ -+ struct snd_soc_card *card = snd_soc_component_get_drvdata(component); -+ -+ return snd_soc_card_get_drvdata(card); -+} -+ -+static int vc4_hdmi_audio_eld_ctl_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); -+ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); -+ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; -+ uinfo->count = sizeof(hdmi->connector->eld); -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_eld_ctl_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); -+ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); -+ -+ memcpy(ucontrol->value.bytes.data, hdmi->connector->eld, -+ sizeof(hdmi->connector->eld)); -+ -+ return 0; -+} -+ -+static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = { -+ { -+ .access = SNDRV_CTL_ELEM_ACCESS_READ | -+ SNDRV_CTL_ELEM_ACCESS_VOLATILE, -+ .iface = SNDRV_CTL_ELEM_IFACE_PCM, -+ .name = "ELD", -+ .info = vc4_hdmi_audio_eld_ctl_info, -+ .get = vc4_hdmi_audio_eld_ctl_get, -+ }, -+}; -+ -+static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = { -+ SND_SOC_DAPM_OUTPUT("TX"), -+}; -+ -+static const struct snd_soc_dapm_route vc4_hdmi_audio_routes[] = { -+ { "TX", NULL, "Playback" }, -+}; -+ -+static const struct snd_soc_codec_driver vc4_hdmi_audio_codec_drv = { -+ .component_driver = { -+ .controls = vc4_hdmi_audio_controls, -+ .num_controls = ARRAY_SIZE(vc4_hdmi_audio_controls), -+ .dapm_widgets = vc4_hdmi_audio_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(vc4_hdmi_audio_widgets), -+ .dapm_routes = vc4_hdmi_audio_routes, -+ .num_dapm_routes = ARRAY_SIZE(vc4_hdmi_audio_routes), -+ }, -+}; -+ -+static const struct snd_soc_dai_ops vc4_hdmi_audio_dai_ops = { -+ .startup = vc4_hdmi_audio_startup, -+ .shutdown = vc4_hdmi_audio_shutdown, -+ .hw_params = vc4_hdmi_audio_hw_params, -+ .set_fmt = vc4_hdmi_audio_set_fmt, -+ .trigger = vc4_hdmi_audio_trigger, -+}; -+ -+static struct snd_soc_dai_driver vc4_hdmi_audio_codec_dai_drv = { -+ .name = "vc4-hdmi-hifi", -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 2, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | -+ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | -+ SNDRV_PCM_RATE_192000, -+ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, -+ }, -+}; -+ -+static const struct snd_soc_component_driver vc4_hdmi_audio_cpu_dai_comp = { -+ .name = "vc4-hdmi-cpu-dai-component", -+}; -+ -+static int vc4_hdmi_audio_cpu_dai_probe(struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ -+ snd_soc_dai_init_dma_data(dai, &hdmi->audio.dma_data, NULL); -+ -+ return 0; -+} -+ -+static struct snd_soc_dai_driver vc4_hdmi_audio_cpu_dai_drv = { -+ .name = "vc4-hdmi-cpu-dai", -+ .probe = vc4_hdmi_audio_cpu_dai_probe, -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 1, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | -+ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | -+ SNDRV_PCM_RATE_192000, -+ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, -+ }, -+ .ops = &vc4_hdmi_audio_dai_ops, -+}; -+ -+static const struct snd_dmaengine_pcm_config pcm_conf = { -+ .chan_names[SNDRV_PCM_STREAM_PLAYBACK] = "audio-rx", -+ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, -+}; -+ -+static int vc4_hdmi_audio_init(struct vc4_hdmi *hdmi) -+{ -+ struct snd_soc_dai_link *dai_link = &hdmi->audio.link; -+ struct snd_soc_card *card = &hdmi->audio.card; -+ struct device *dev = &hdmi->pdev->dev; -+ const __be32 *addr; -+ int ret; -+ -+ if (!of_find_property(dev->of_node, "dmas", NULL)) { -+ dev_warn(dev, -+ "'dmas' DT property is missing, no HDMI audio\n"); -+ return 0; -+ } -+ -+ /* -+ * Get the physical address of VC4_HD_MAI_DATA. We need to retrieve -+ * the bus address specified in the DT, because the physical address -+ * (the one returned by platform_get_resource()) is not appropriate -+ * for DMA transfers. -+ * This VC/MMU should probably be exposed to avoid this kind of hacks. -+ */ -+ addr = of_get_address(dev->of_node, 1, NULL, NULL); -+ hdmi->audio.dma_data.addr = be32_to_cpup(addr) + VC4_HD_MAI_DATA; -+ hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ hdmi->audio.dma_data.maxburst = 2; -+ -+ ret = devm_snd_dmaengine_pcm_register(dev, &pcm_conf, 0); -+ if (ret) { -+ dev_err(dev, "Could not register PCM component: %d\n", ret); -+ return ret; -+ } -+ -+ ret = devm_snd_soc_register_component(dev, &vc4_hdmi_audio_cpu_dai_comp, -+ &vc4_hdmi_audio_cpu_dai_drv, 1); -+ if (ret) { -+ dev_err(dev, "Could not register CPU DAI: %d\n", ret); -+ return ret; -+ } -+ -+ /* register codec and codec dai */ -+ ret = snd_soc_register_codec(dev, &vc4_hdmi_audio_codec_drv, -+ &vc4_hdmi_audio_codec_dai_drv, 1); -+ if (ret) { -+ dev_err(dev, "Could not register codec: %d\n", ret); -+ return ret; -+ } -+ -+ dai_link->name = "MAI"; -+ dai_link->stream_name = "MAI PCM"; -+ dai_link->codec_dai_name = vc4_hdmi_audio_codec_dai_drv.name; -+ dai_link->cpu_dai_name = dev_name(dev); -+ dai_link->codec_name = dev_name(dev); -+ dai_link->platform_name = dev_name(dev); -+ -+ card->dai_link = dai_link; -+ card->num_links = 1; -+ card->name = "vc4-hdmi"; -+ card->dev = dev; -+ -+ /* -+ * Be careful, snd_soc_register_card() calls dev_set_drvdata() and -+ * stores a pointer to the snd card object in dev->driver_data. This -+ * means we cannot use it for something else. The hdmi back-pointer is -+ * now stored in card->drvdata and should be retrieved with -+ * snd_soc_card_get_drvdata() if needed. -+ */ -+ snd_soc_card_set_drvdata(card, hdmi); -+ ret = devm_snd_soc_register_card(dev, card); -+ if (ret) { -+ dev_err(dev, "Could not register sound card: %d\n", ret); -+ goto unregister_codec; -+ } -+ -+ return 0; -+ -+unregister_codec: -+ snd_soc_unregister_codec(dev); -+ -+ return ret; -+} -+ -+static void vc4_hdmi_audio_cleanup(struct vc4_hdmi *hdmi) -+{ -+ struct device *dev = &hdmi->pdev->dev; -+ -+ /* -+ * If drvdata is not set this means the audio card was not -+ * registered, just skip codec unregistration in this case. -+ */ -+ if (dev_get_drvdata(dev)) -+ snd_soc_unregister_codec(dev); -+} -+ - static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - { - struct platform_device *pdev = to_platform_device(dev); -@@ -720,6 +1206,10 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - goto err_destroy_encoder; - } - -+ ret = vc4_hdmi_audio_init(hdmi); -+ if (ret) -+ goto err_destroy_encoder; -+ - return 0; - - err_destroy_encoder: -@@ -741,6 +1231,8 @@ static void vc4_hdmi_unbind(struct device *dev, struct device *master, - struct vc4_dev *vc4 = drm->dev_private; - struct vc4_hdmi *hdmi = vc4->hdmi; - -+ vc4_hdmi_audio_cleanup(hdmi); -+ - vc4_hdmi_connector_destroy(hdmi->connector); - vc4_hdmi_encoder_destroy(hdmi->encoder); - -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index 385405a2df05..932093936178 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -446,11 +446,62 @@ - #define VC4_HDMI_HOTPLUG 0x00c - # define VC4_HDMI_HOTPLUG_CONNECTED BIT(0) - -+/* 3 bits per field, where each field maps from that corresponding MAI -+ * bus channel to the given HDMI channel. -+ */ -+#define VC4_HDMI_MAI_CHANNEL_MAP 0x090 -+ -+#define VC4_HDMI_MAI_CONFIG 0x094 -+# define VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE BIT(27) -+# define VC4_HDMI_MAI_CONFIG_BIT_REVERSE BIT(26) -+# define VC4_HDMI_MAI_CHANNEL_MASK_MASK VC4_MASK(15, 0) -+# define VC4_HDMI_MAI_CHANNEL_MASK_SHIFT 0 -+ -+/* Last received format word on the MAI bus. */ -+#define VC4_HDMI_MAI_FORMAT 0x098 -+ -+#define VC4_HDMI_AUDIO_PACKET_CONFIG 0x09c -+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT BIT(29) -+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS BIT(24) -+# define VC4_HDMI_AUDIO_PACKET_FORCE_SAMPLE_PRESENT BIT(19) -+# define VC4_HDMI_AUDIO_PACKET_FORCE_B_FRAME BIT(18) -+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_MASK VC4_MASK(13, 10) -+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_SHIFT 10 -+/* If set, then multichannel, otherwise 2 channel. */ -+# define VC4_HDMI_AUDIO_PACKET_AUDIO_LAYOUT BIT(9) -+/* If set, then AUDIO_LAYOUT overrides audio_cea_mask */ -+# define VC4_HDMI_AUDIO_PACKET_FORCE_AUDIO_LAYOUT BIT(8) -+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_MASK VC4_MASK(7, 0) -+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_SHIFT 0 -+ - #define VC4_HDMI_RAM_PACKET_CONFIG 0x0a0 - # define VC4_HDMI_RAM_PACKET_ENABLE BIT(16) - - #define VC4_HDMI_RAM_PACKET_STATUS 0x0a4 - -+#define VC4_HDMI_CRP_CFG 0x0a8 -+/* When set, the CTS_PERIOD counts based on MAI bus sync pulse instead -+ * of pixel clock. -+ */ -+# define VC4_HDMI_CRP_USE_MAI_BUS_SYNC_FOR_CTS BIT(26) -+/* When set, no CRP packets will be sent. */ -+# define VC4_HDMI_CRP_CFG_DISABLE BIT(25) -+/* If set, generates CTS values based on N, audio clock, and video -+ * clock. N must be divisible by 128. -+ */ -+# define VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN BIT(24) -+# define VC4_HDMI_CRP_CFG_N_MASK VC4_MASK(19, 0) -+# define VC4_HDMI_CRP_CFG_N_SHIFT 0 -+ -+/* 20-bit fields containing CTS values to be transmitted if !EXTERNAL_CTS_EN */ -+#define VC4_HDMI_CTS_0 0x0ac -+#define VC4_HDMI_CTS_1 0x0b0 -+/* 20-bit fields containing number of clocks to send CTS0/1 before -+ * switching to the other one. -+ */ -+#define VC4_HDMI_CTS_PERIOD_0 0x0b4 -+#define VC4_HDMI_CTS_PERIOD_1 0x0b8 -+ - #define VC4_HDMI_HORZA 0x0c4 - # define VC4_HDMI_HORZA_VPOS BIT(14) - # define VC4_HDMI_HORZA_HPOS BIT(13) -@@ -512,7 +563,11 @@ - - #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0 - --#define VC4_HDMI_GCP_0 0x400 -+#define VC4_HDMI_TX_PHY_CTL0 0x2c4 -+# define VC4_HDMI_TX_PHY_RNG_PWRDN BIT(25) -+ -+#define VC4_HDMI_GCP(x) (0x400 + ((x) * 0x4)) -+#define VC4_HDMI_RAM_PACKET(x) (0x400 + ((x) * 0x24)) - #define VC4_HDMI_PACKET_STRIDE 0x24 - - #define VC4_HD_M_CTL 0x00c -@@ -522,6 +577,56 @@ - # define VC4_HD_M_ENABLE BIT(0) - - #define VC4_HD_MAI_CTL 0x014 -+/* Set when audio stream is received at a slower rate than the -+ * sampling period, so MAI fifo goes empty. Write 1 to clear. -+ */ -+# define VC4_HD_MAI_CTL_DLATE BIT(15) -+# define VC4_HD_MAI_CTL_BUSY BIT(14) -+# define VC4_HD_MAI_CTL_CHALIGN BIT(13) -+# define VC4_HD_MAI_CTL_WHOLSMP BIT(12) -+# define VC4_HD_MAI_CTL_FULL BIT(11) -+# define VC4_HD_MAI_CTL_EMPTY BIT(10) -+# define VC4_HD_MAI_CTL_FLUSH BIT(9) -+/* If set, MAI bus generates SPDIF (bit 31) parity instead of passing -+ * through. -+ */ -+# define VC4_HD_MAI_CTL_PAREN BIT(8) -+# define VC4_HD_MAI_CTL_CHNUM_MASK VC4_MASK(7, 4) -+# define VC4_HD_MAI_CTL_CHNUM_SHIFT 4 -+# define VC4_HD_MAI_CTL_ENABLE BIT(3) -+/* Underflow error status bit, write 1 to clear. */ -+# define VC4_HD_MAI_CTL_ERRORE BIT(2) -+/* Overflow error status bit, write 1 to clear. */ -+# define VC4_HD_MAI_CTL_ERRORF BIT(1) -+/* Single-shot reset bit. Read value is undefined. */ -+# define VC4_HD_MAI_CTL_RESET BIT(0) -+ -+#define VC4_HD_MAI_THR 0x018 -+# define VC4_HD_MAI_THR_PANICHIGH_MASK VC4_MASK(29, 24) -+# define VC4_HD_MAI_THR_PANICHIGH_SHIFT 24 -+# define VC4_HD_MAI_THR_PANICLOW_MASK VC4_MASK(21, 16) -+# define VC4_HD_MAI_THR_PANICLOW_SHIFT 16 -+# define VC4_HD_MAI_THR_DREQHIGH_MASK VC4_MASK(13, 8) -+# define VC4_HD_MAI_THR_DREQHIGH_SHIFT 8 -+# define VC4_HD_MAI_THR_DREQLOW_MASK VC4_MASK(5, 0) -+# define VC4_HD_MAI_THR_DREQLOW_SHIFT 0 -+ -+/* Format header to be placed on the MAI data. Unused. */ -+#define VC4_HD_MAI_FMT 0x01c -+ -+/* Register for DMAing in audio data to be transported over the MAI -+ * bus to the Falcon core. -+ */ -+#define VC4_HD_MAI_DATA 0x020 -+ -+/* Divider from HDMI HSM clock to MAI serial clock. Sampling period -+ * converges to N / (M + 1) cycles. -+ */ -+#define VC4_HD_MAI_SMP 0x02c -+# define VC4_HD_MAI_SMP_N_MASK VC4_MASK(31, 8) -+# define VC4_HD_MAI_SMP_N_SHIFT 8 -+# define VC4_HD_MAI_SMP_M_MASK VC4_MASK(7, 0) -+# define VC4_HD_MAI_SMP_M_SHIFT 0 - - #define VC4_HD_VID_CTL 0x038 - # define VC4_HD_VID_CTL_ENABLE BIT(31) --- -2.12.0 - -From 25ea82d7f7c869ff81ff8e64d24c5c4a896239fe Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:03 -0800 -Subject: [PATCH 3/3] ARM: dts: bcm283x: Add HDMI audio related properties - -Add the dmas and dma-names properties to support HDMI audio. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm283x.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index a3106aa446c6..a31b0b303ddc 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -499,6 +499,8 @@ - clocks = <&clocks BCM2835_PLLH_PIX>, - <&clocks BCM2835_CLOCK_HSM>; - clock-names = "pixel", "hdmi"; -+ dmas = <&dma 17>; -+ dma-names = "audio-rx"; - status = "disabled"; - }; - --- -2.12.0 - diff --git a/bcm283x-mmc-bcm2835.patch b/bcm283x-mmc-bcm2835.patch deleted file mode 100644 index f3b395d..0000000 --- a/bcm283x-mmc-bcm2835.patch +++ /dev/null @@ -1,1827 +0,0 @@ -From patchwork Wed Mar 8 09:19:01 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,1/7] dt-bindings: Add binding for brcm,bcm2835-sdhost. -From: Gerd Hoffmann -X-Patchwork-Id: 9610673 -Message-Id: <1488964751-22763-2-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:01 +0100 - -From: Eric Anholt - -This is the other SD controller on the platform, which can be swapped -to the role of SD card host using pin muxing. - -Signed-off-by: Eric Anholt -Signed-off-by: Gerd Hoffmann -Acked-by: Rob Herring ---- - .../bindings/mmc/brcm,bcm2835-sdhost.txt | 23 ++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt - -diff --git a/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt -new file mode 100644 -index 0000000..d876580 ---- /dev/null -+++ b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt -@@ -0,0 +1,23 @@ -+Broadcom BCM2835 SDHOST controller -+ -+This file documents differences between the core properties described -+by mmc.txt and the properties that represent the BCM2835 controller. -+ -+Required properties: -+- compatible: Should be "brcm,bcm2835-sdhost". -+- clocks: The clock feeding the SDHOST controller. -+ -+Optional properties: -+- dmas: DMA channel for read and write. -+ See Documentation/devicetree/bindings/dma/dma.txt for details -+ -+Example: -+ -+sdhost: mmc@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+}; -From patchwork Wed Mar 8 09:19:03 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,2/7] mmc: bcm2835: Add new driver for the sdhost controller. -From: Gerd Hoffmann -X-Patchwork-Id: 9610701 -Message-Id: <1488964751-22763-4-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:03 +0100 - -From: Eric Anholt - -The 2835 has two SD controllers: The Arasan sdhci controller (supported -by the iproc driver) and a custom sdhost controller. This patch adds a -driver for the latter. - -The sdhci controller supports both sdcard and sdio. The sdhost -controller supports the sdcard only, but has better performance. Also -note that the rpi3 has sdio wifi, so driving the sdcard with the sdhost -controller allows to use the sdhci controller for wifi support. - -The configuration is done by devicetree via pin muxing. Both SD -controller are available on the same pins (2 pin groups = pin 22 to 27 + -pin 48 to 53). So it's possible to use both SD controllers at the same -time with different pin groups. - -The code was originally written by Phil Elwell in the downstream -Rasbperry Pi tree. In preparation for the upstream merge it was -cleaned up and the code base was moderized by Eric Anholt, Stefan -Wahren and Gerd Hoffmann. - -Signed-off-by: Eric Anholt -Signed-off-by: Stefan Wahren -Signed-off-by: Gerd Hoffmann ---- - drivers/mmc/host/Kconfig | 14 + - drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/bcm2835.c | 1465 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 1480 insertions(+) - create mode 100644 drivers/mmc/host/bcm2835.c - -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index f08691a..a638cd0 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -799,6 +799,20 @@ config MMC_TOSHIBA_PCI - depends on PCI - help - -+config MMC_BCM2835 -+ tristate "Broadcom BCM2835 SDHOST MMC Controller support" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on HAS_DMA -+ help -+ This selects the BCM2835 SDHOST MMC controller. If you have -+ a BCM2835 platform with SD or MMC devices, say Y or M here. -+ -+ Note that the BCM2835 has two SD controllers: The Arasan -+ sdhci controller (supported by MMC_SDHCI_IPROC) and a custom -+ sdhost controller (supported by this driver). -+ -+ If unsure, say N. -+ - config MMC_MTK - tristate "MediaTek SD/MMC Card Interface support" - depends on HAS_DMA -diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6d548c4..bc2c2e2 100644 ---- a/drivers/mmc/host/Makefile -+++ b/drivers/mmc/host/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o - obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o - obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o - obj-$(CONFIG_MMC_TOSHIBA_PCI) += toshsd.o -+obj-$(CONFIG_MMC_BCM2835) += bcm2835.o - - obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o - obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -new file mode 100644 -index 0000000..7d1b0db7 ---- /dev/null -+++ b/drivers/mmc/host/bcm2835.c -@@ -0,0 +1,1465 @@ -+/* -+ * bcm2835 sdhost driver. -+ * -+ * The 2835 has two SD controllers: The Arasan sdhci controller -+ * (supported by the iproc driver) and a custom sdhost controller -+ * (supported by this driver). -+ * -+ * The sdhci controller supports both sdcard and sdio. The sdhost -+ * controller supports the sdcard only, but has better performance. -+ * Also note that the rpi3 has sdio wifi, so driving the sdcard with -+ * the sdhost controller allows to use the sdhci controller for wifi -+ * support. -+ * -+ * The configuration is done by devicetree via pin muxing. Both -+ * SD controller are available on the same pins (2 pin groups = pin 22 -+ * to 27 + pin 48 to 53). So it's possible to use both SD controllers -+ * at the same time with different pin groups. -+ * -+ * Author: Phil Elwell -+ * Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd. -+ * -+ * Based on -+ * mmc-bcm2835.c by Gellert Weisz -+ * which is, in turn, based on -+ * sdhci-bcm2708.c by Broadcom -+ * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko -+ * sdhci.c and sdhci-pci.c by Pierre Ossman -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms and conditions of the GNU General Public License, -+ * version 2, as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define SDCMD 0x00 /* Command to SD card - 16 R/W */ -+#define SDARG 0x04 /* Argument to SD card - 32 R/W */ -+#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */ -+#define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ -+#define SDRSP0 0x10 /* SD card response (31:0) - 32 R */ -+#define SDRSP1 0x14 /* SD card response (63:32) - 32 R */ -+#define SDRSP2 0x18 /* SD card response (95:64) - 32 R */ -+#define SDRSP3 0x1c /* SD card response (127:96) - 32 R */ -+#define SDHSTS 0x20 /* SD host status - 11 R/W */ -+#define SDVDD 0x30 /* SD card power control - 1 R/W */ -+#define SDEDM 0x34 /* Emergency Debug Mode - 13 R/W */ -+#define SDHCFG 0x38 /* Host configuration - 2 R/W */ -+#define SDHBCT 0x3c /* Host byte count (debug) - 32 R/W */ -+#define SDDATA 0x40 /* Data to/from SD card - 32 R/W */ -+#define SDHBLC 0x50 /* Host block count (SDIO/SDHC) - 9 R/W */ -+ -+#define SDCMD_NEW_FLAG 0x8000 -+#define SDCMD_FAIL_FLAG 0x4000 -+#define SDCMD_BUSYWAIT 0x800 -+#define SDCMD_NO_RESPONSE 0x400 -+#define SDCMD_LONG_RESPONSE 0x200 -+#define SDCMD_WRITE_CMD 0x80 -+#define SDCMD_READ_CMD 0x40 -+#define SDCMD_CMD_MASK 0x3f -+ -+#define SDCDIV_MAX_CDIV 0x7ff -+ -+#define SDHSTS_BUSY_IRPT 0x400 -+#define SDHSTS_BLOCK_IRPT 0x200 -+#define SDHSTS_SDIO_IRPT 0x100 -+#define SDHSTS_REW_TIME_OUT 0x80 -+#define SDHSTS_CMD_TIME_OUT 0x40 -+#define SDHSTS_CRC16_ERROR 0x20 -+#define SDHSTS_CRC7_ERROR 0x10 -+#define SDHSTS_FIFO_ERROR 0x08 -+/* Reserved */ -+/* Reserved */ -+#define SDHSTS_DATA_FLAG 0x01 -+ -+#define SDHSTS_TRANSFER_ERROR_MASK (SDHSTS_CRC7_ERROR | \ -+ SDHSTS_CRC16_ERROR | \ -+ SDHSTS_REW_TIME_OUT | \ -+ SDHSTS_FIFO_ERROR) -+ -+#define SDHSTS_ERROR_MASK (SDHSTS_CMD_TIME_OUT | \ -+ SDHSTS_TRANSFER_ERROR_MASK) -+ -+#define SDHCFG_BUSY_IRPT_EN BIT(10) -+#define SDHCFG_BLOCK_IRPT_EN BIT(8) -+#define SDHCFG_SDIO_IRPT_EN BIT(5) -+#define SDHCFG_DATA_IRPT_EN BIT(4) -+#define SDHCFG_SLOW_CARD BIT(3) -+#define SDHCFG_WIDE_EXT_BUS BIT(2) -+#define SDHCFG_WIDE_INT_BUS BIT(1) -+#define SDHCFG_REL_CMD_LINE BIT(0) -+ -+#define SDVDD_POWER_OFF 0 -+#define SDVDD_POWER_ON 1 -+ -+#define SDEDM_FORCE_DATA_MODE BIT(19) -+#define SDEDM_CLOCK_PULSE BIT(20) -+#define SDEDM_BYPASS BIT(21) -+ -+#define SDEDM_WRITE_THRESHOLD_SHIFT 9 -+#define SDEDM_READ_THRESHOLD_SHIFT 14 -+#define SDEDM_THRESHOLD_MASK 0x1f -+ -+#define SDEDM_FSM_MASK 0xf -+#define SDEDM_FSM_IDENTMODE 0x0 -+#define SDEDM_FSM_DATAMODE 0x1 -+#define SDEDM_FSM_READDATA 0x2 -+#define SDEDM_FSM_WRITEDATA 0x3 -+#define SDEDM_FSM_READWAIT 0x4 -+#define SDEDM_FSM_READCRC 0x5 -+#define SDEDM_FSM_WRITECRC 0x6 -+#define SDEDM_FSM_WRITEWAIT1 0x7 -+#define SDEDM_FSM_POWERDOWN 0x8 -+#define SDEDM_FSM_POWERUP 0x9 -+#define SDEDM_FSM_WRITESTART1 0xa -+#define SDEDM_FSM_WRITESTART2 0xb -+#define SDEDM_FSM_GENPULSES 0xc -+#define SDEDM_FSM_WRITEWAIT2 0xd -+#define SDEDM_FSM_STARTPOWDOWN 0xf -+ -+#define SDDATA_FIFO_WORDS 16 -+ -+#define FIFO_READ_THRESHOLD 4 -+#define FIFO_WRITE_THRESHOLD 4 -+#define SDDATA_FIFO_PIO_BURST 8 -+ -+#define PIO_THRESHOLD 1 /* Maximum block count for PIO (0 = always DMA) */ -+ -+struct bcm2835_host { -+ spinlock_t lock; -+ struct mutex mutex; -+ -+ void __iomem *ioaddr; -+ u32 phys_addr; -+ -+ struct mmc_host *mmc; -+ struct platform_device *pdev; -+ -+ int clock; /* Current clock speed */ -+ unsigned int max_clk; /* Max possible freq */ -+ struct work_struct dma_work; -+ struct delayed_work timeout_work; /* Timer for timeouts */ -+ struct sg_mapping_iter sg_miter; /* SG state for PIO */ -+ unsigned int blocks; /* remaining PIO blocks */ -+ int irq; /* Device IRQ */ -+ -+ u32 ns_per_fifo_word; -+ -+ /* cached registers */ -+ u32 hcfg; -+ u32 cdiv; -+ -+ struct mmc_request *mrq; /* Current request */ -+ struct mmc_command *cmd; /* Current command */ -+ struct mmc_data *data; /* Current data request */ -+ bool data_complete:1;/* Data finished before cmd */ -+ bool use_busy:1; /* Wait for busy interrupt */ -+ bool use_sbc:1; /* Send CMD23 */ -+ -+ /* for threaded irq handler */ -+ bool irq_block; -+ bool irq_busy; -+ bool irq_data; -+ -+ /* DMA part */ -+ struct dma_chan *dma_chan_rxtx; -+ struct dma_chan *dma_chan; -+ struct dma_slave_config dma_cfg_rx; -+ struct dma_slave_config dma_cfg_tx; -+ struct dma_async_tx_descriptor *dma_desc; -+ u32 dma_dir; -+ u32 drain_words; -+ struct page *drain_page; -+ u32 drain_offset; -+ bool use_dma; -+}; -+ -+static void bcm2835_dumpcmd(struct bcm2835_host *host, struct mmc_command *cmd, -+ const char *label) -+{ -+ struct device *dev = &host->pdev->dev; -+ -+ if (!cmd) -+ return; -+ -+ dev_dbg(dev, "%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n", -+ (cmd == host->cmd) ? '>' : ' ', -+ label, cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], -+ cmd->error); -+} -+ -+static void bcm2835_dumpregs(struct bcm2835_host *host) -+{ -+ struct mmc_request *mrq = host->mrq; -+ struct device *dev = &host->pdev->dev; -+ -+ if (mrq) { -+ bcm2835_dumpcmd(host, mrq->sbc, "sbc"); -+ bcm2835_dumpcmd(host, mrq->cmd, "cmd"); -+ if (mrq->data) { -+ dev_dbg(dev, "data blocks %x blksz %x - err %d\n", -+ mrq->data->blocks, -+ mrq->data->blksz, -+ mrq->data->error); -+ } -+ bcm2835_dumpcmd(host, mrq->stop, "stop"); -+ } -+ -+ dev_dbg(dev, "=========== REGISTER DUMP ===========\n"); -+ dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); -+ dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); -+ dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); -+ dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); -+ dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); -+ dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); -+ dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); -+ dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); -+ dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); -+ dev_dbg(dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD)); -+ dev_dbg(dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM)); -+ dev_dbg(dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG)); -+ dev_dbg(dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT)); -+ dev_dbg(dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC)); -+ dev_dbg(dev, "===========================================\n"); -+} -+ -+static void bcm2835_reset_internal(struct bcm2835_host *host) -+{ -+ u32 temp; -+ -+ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); -+ writel(0, host->ioaddr + SDCMD); -+ writel(0, host->ioaddr + SDARG); -+ writel(0xf00000, host->ioaddr + SDTOUT); -+ writel(0, host->ioaddr + SDCDIV); -+ writel(0x7f8, host->ioaddr + SDHSTS); /* Write 1s to clear */ -+ writel(0, host->ioaddr + SDHCFG); -+ writel(0, host->ioaddr + SDHBCT); -+ writel(0, host->ioaddr + SDHBLC); -+ -+ /* Limit fifo usage due to silicon bug */ -+ temp = readl(host->ioaddr + SDEDM); -+ temp &= ~((SDEDM_THRESHOLD_MASK << SDEDM_READ_THRESHOLD_SHIFT) | -+ (SDEDM_THRESHOLD_MASK << SDEDM_WRITE_THRESHOLD_SHIFT)); -+ temp |= (FIFO_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) | -+ (FIFO_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT); -+ writel(temp, host->ioaddr + SDEDM); -+ msleep(20); -+ writel(SDVDD_POWER_ON, host->ioaddr + SDVDD); -+ msleep(20); -+ host->clock = 0; -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+} -+ -+static void bcm2835_reset(struct mmc_host *mmc) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ -+ if (host->dma_chan) -+ dmaengine_terminate_sync(host->dma_chan); -+ bcm2835_reset_internal(host); -+} -+ -+static void bcm2835_finish_command(struct bcm2835_host *host); -+ -+static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) -+{ -+ int timediff; -+ u32 alternate_idle; -+ -+ alternate_idle = (host->mrq->data->flags & MMC_DATA_READ) ? -+ SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1; -+ -+ timediff = 0; -+ -+ while (1) { -+ u32 edm, fsm; -+ -+ edm = readl(host->ioaddr + SDEDM); -+ fsm = edm & SDEDM_FSM_MASK; -+ -+ if ((fsm == SDEDM_FSM_IDENTMODE) || -+ (fsm == SDEDM_FSM_DATAMODE)) -+ break; -+ if (fsm == alternate_idle) { -+ writel(edm | SDEDM_FORCE_DATA_MODE, -+ host->ioaddr + SDEDM); -+ break; -+ } -+ -+ timediff++; -+ if (timediff == 100000) { -+ dev_err(&host->pdev->dev, -+ "wait_transfer_complete - still waiting after %d retries\n", -+ timediff); -+ bcm2835_dumpregs(host); -+ host->mrq->data->error = -ETIMEDOUT; -+ return; -+ } -+ cpu_relax(); -+ } -+} -+ -+static void bcm2835_dma_complete(void *param) -+{ -+ struct bcm2835_host *host = param; -+ -+ schedule_work(&host->dma_work); -+} -+ -+static void bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read) -+{ -+ unsigned long flags; -+ size_t blksize; -+ unsigned long wait_max; -+ -+ blksize = host->data->blksz; -+ -+ wait_max = jiffies + msecs_to_jiffies(500); -+ -+ local_irq_save(flags); -+ -+ while (blksize) { -+ int copy_words; -+ u32 hsts = 0; -+ size_t len; -+ u32 *buf; -+ -+ if (!sg_miter_next(&host->sg_miter)) { -+ host->data->error = -EINVAL; -+ break; -+ } -+ -+ len = min(host->sg_miter.length, blksize); -+ if (len % 4) { -+ host->data->error = -EINVAL; -+ break; -+ } -+ -+ blksize -= len; -+ host->sg_miter.consumed = len; -+ -+ buf = (u32 *)host->sg_miter.addr; -+ -+ copy_words = len / 4; -+ -+ while (copy_words) { -+ int burst_words, words; -+ u32 edm; -+ -+ burst_words = min(SDDATA_FIFO_PIO_BURST, copy_words); -+ edm = readl(host->ioaddr + SDEDM); -+ if (is_read) -+ words = ((edm >> 4) & 0x1f); -+ else -+ words = SDDATA_FIFO_WORDS - ((edm >> 4) & 0x1f); -+ -+ if (words < burst_words) { -+ int fsm_state = (edm & SDEDM_FSM_MASK); -+ struct device *dev = &host->pdev->dev; -+ -+ if ((is_read && -+ (fsm_state != SDEDM_FSM_READDATA && -+ fsm_state != SDEDM_FSM_READWAIT && -+ fsm_state != SDEDM_FSM_READCRC)) || -+ (!is_read && -+ (fsm_state != SDEDM_FSM_WRITEDATA && -+ fsm_state != SDEDM_FSM_WRITESTART1 && -+ fsm_state != SDEDM_FSM_WRITESTART2))) { -+ hsts = readl(host->ioaddr + SDHSTS); -+ dev_err(dev, "fsm %x, hsts %08x\n", -+ fsm_state, hsts); -+ if (hsts & SDHSTS_ERROR_MASK) -+ break; -+ } -+ -+ if (time_after(jiffies, wait_max)) { -+ dev_err(dev, "PIO %s timeout - EDM %08x\n", -+ is_read ? "read" : "write", -+ edm); -+ hsts = SDHSTS_REW_TIME_OUT; -+ break; -+ } -+ ndelay((burst_words - words) * -+ host->ns_per_fifo_word); -+ continue; -+ } else if (words > copy_words) { -+ words = copy_words; -+ } -+ -+ copy_words -= words; -+ -+ while (words) { -+ if (is_read) -+ *(buf++) = readl(host->ioaddr + SDDATA); -+ else -+ writel(*(buf++), host->ioaddr + SDDATA); -+ words--; -+ } -+ } -+ -+ if (hsts & SDHSTS_ERROR_MASK) -+ break; -+ } -+ -+ sg_miter_stop(&host->sg_miter); -+ -+ local_irq_restore(flags); -+} -+ -+static void bcm2835_transfer_pio(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 sdhsts; -+ bool is_read; -+ -+ is_read = (host->data->flags & MMC_DATA_READ) != 0; -+ bcm2835_transfer_block_pio(host, is_read); -+ -+ sdhsts = readl(host->ioaddr + SDHSTS); -+ if (sdhsts & (SDHSTS_CRC16_ERROR | -+ SDHSTS_CRC7_ERROR | -+ SDHSTS_FIFO_ERROR)) { -+ dev_err(dev, "%s transfer error - HSTS %08x\n", -+ is_read ? "read" : "write", sdhsts); -+ host->data->error = -EILSEQ; -+ } else if ((sdhsts & (SDHSTS_CMD_TIME_OUT | -+ SDHSTS_REW_TIME_OUT))) { -+ dev_err(dev, "%s timeout error - HSTS %08x\n", -+ is_read ? "read" : "write", sdhsts); -+ host->data->error = -ETIMEDOUT; -+ } -+} -+ -+static -+void bcm2835_prepare_dma(struct bcm2835_host *host, struct mmc_data *data) -+{ -+ int len, dir_data, dir_slave; -+ struct dma_async_tx_descriptor *desc = NULL; -+ struct dma_chan *dma_chan; -+ -+ dma_chan = host->dma_chan_rxtx; -+ if (data->flags & MMC_DATA_READ) { -+ dir_data = DMA_FROM_DEVICE; -+ dir_slave = DMA_DEV_TO_MEM; -+ } else { -+ dir_data = DMA_TO_DEVICE; -+ dir_slave = DMA_MEM_TO_DEV; -+ } -+ -+ /* The block doesn't manage the FIFO DREQs properly for -+ * multi-block transfers, so don't attempt to DMA the final -+ * few words. Unfortunately this requires the final sg entry -+ * to be trimmed. N.B. This code demands that the overspill -+ * is contained in a single sg entry. -+ */ -+ -+ host->drain_words = 0; -+ if ((data->blocks > 1) && (dir_data == DMA_FROM_DEVICE)) { -+ struct scatterlist *sg; -+ u32 len; -+ int i; -+ -+ len = min((u32)(FIFO_READ_THRESHOLD - 1) * 4, -+ (u32)data->blocks * data->blksz); -+ -+ for_each_sg(data->sg, sg, data->sg_len, i) { -+ if (sg_is_last(sg)) { -+ WARN_ON(sg->length < len); -+ sg->length -= len; -+ host->drain_page = sg_page(sg); -+ host->drain_offset = sg->offset + sg->length; -+ } -+ } -+ host->drain_words = len / 4; -+ } -+ -+ /* The parameters have already been validated, so this will not fail */ -+ (void)dmaengine_slave_config(dma_chan, -+ (dir_data == DMA_FROM_DEVICE) ? -+ &host->dma_cfg_rx : -+ &host->dma_cfg_tx); -+ -+ len = dma_map_sg(dma_chan->device->dev, data->sg, data->sg_len, -+ dir_data); -+ -+ if (len > 0) { -+ desc = dmaengine_prep_slave_sg(dma_chan, data->sg, -+ len, dir_slave, -+ DMA_PREP_INTERRUPT | -+ DMA_CTRL_ACK); -+ } -+ -+ if (desc) { -+ desc->callback = bcm2835_dma_complete; -+ desc->callback_param = host; -+ host->dma_desc = desc; -+ host->dma_chan = dma_chan; -+ host->dma_dir = dir_data; -+ } -+} -+ -+static void bcm2835_start_dma(struct bcm2835_host *host) -+{ -+ dmaengine_submit(host->dma_desc); -+ dma_async_issue_pending(host->dma_chan); -+} -+ -+static void bcm2835_set_transfer_irqs(struct bcm2835_host *host) -+{ -+ u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN | -+ SDHCFG_BUSY_IRPT_EN; -+ -+ if (host->dma_desc) { -+ host->hcfg = (host->hcfg & ~all_irqs) | -+ SDHCFG_BUSY_IRPT_EN; -+ } else { -+ host->hcfg = (host->hcfg & ~all_irqs) | -+ SDHCFG_DATA_IRPT_EN | -+ SDHCFG_BUSY_IRPT_EN; -+ } -+ -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+} -+ -+static -+void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd) -+{ -+ struct mmc_data *data = cmd->data; -+ -+ WARN_ON(host->data); -+ -+ host->data = data; -+ if (!data) -+ return; -+ -+ host->data_complete = false; -+ host->data->bytes_xfered = 0; -+ -+ if (!host->dma_desc) { -+ /* Use PIO */ -+ int flags = SG_MITER_ATOMIC; -+ -+ if (data->flags & MMC_DATA_READ) -+ flags |= SG_MITER_TO_SG; -+ else -+ flags |= SG_MITER_FROM_SG; -+ sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); -+ host->blocks = data->blocks; -+ } -+ -+ bcm2835_set_transfer_irqs(host); -+ -+ writel(data->blksz, host->ioaddr + SDHBCT); -+ writel(data->blocks, host->ioaddr + SDHBLC); -+} -+ -+static u32 bcm2835_read_wait_sdcmd(struct bcm2835_host *host, u32 max_ms) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 value; -+ int ret; -+ -+ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, -+ !(value & SDCMD_NEW_FLAG), 1, 10); -+ if (ret == -ETIMEDOUT) -+ /* if it takes a while make poll interval bigger */ -+ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, -+ !(value & SDCMD_NEW_FLAG), -+ 10, max_ms * 1000); -+ if (ret == -ETIMEDOUT) -+ dev_err(dev, "%s: timeout (%d ms)\n", __func__, max_ms); -+ -+ return value; -+} -+ -+static void bcm2835_finish_request(struct bcm2835_host *host) -+{ -+ struct dma_chan *terminate_chan = NULL; -+ struct mmc_request *mrq; -+ -+ cancel_delayed_work(&host->timeout_work); -+ -+ mrq = host->mrq; -+ -+ host->mrq = NULL; -+ host->cmd = NULL; -+ host->data = NULL; -+ -+ host->dma_desc = NULL; -+ terminate_chan = host->dma_chan; -+ host->dma_chan = NULL; -+ -+ if (terminate_chan) { -+ int err = dmaengine_terminate_all(terminate_chan); -+ -+ if (err) -+ dev_err(&host->pdev->dev, -+ "failed to terminate DMA (%d)\n", err); -+ } -+ -+ mmc_request_done(host->mmc, mrq); -+} -+ -+static -+bool bcm2835_send_command(struct bcm2835_host *host, struct mmc_command *cmd) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 sdcmd, sdhsts; -+ unsigned long timeout; -+ -+ WARN_ON(host->cmd); -+ -+ sdcmd = bcm2835_read_wait_sdcmd(host, 100); -+ if (sdcmd & SDCMD_NEW_FLAG) { -+ dev_err(dev, "previous command never completed.\n"); -+ bcm2835_dumpregs(host); -+ cmd->error = -EILSEQ; -+ bcm2835_finish_request(host); -+ return false; -+ } -+ -+ if (!cmd->data && cmd->busy_timeout > 9000) -+ timeout = DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; -+ else -+ timeout = 10 * HZ; -+ schedule_delayed_work(&host->timeout_work, timeout); -+ -+ host->cmd = cmd; -+ -+ /* Clear any error flags */ -+ sdhsts = readl(host->ioaddr + SDHSTS); -+ if (sdhsts & SDHSTS_ERROR_MASK) -+ writel(sdhsts, host->ioaddr + SDHSTS); -+ -+ if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { -+ dev_err(dev, "unsupported response type!\n"); -+ cmd->error = -EINVAL; -+ bcm2835_finish_request(host); -+ return false; -+ } -+ -+ bcm2835_prepare_data(host, cmd); -+ -+ writel(cmd->arg, host->ioaddr + SDARG); -+ -+ sdcmd = cmd->opcode & SDCMD_CMD_MASK; -+ -+ host->use_busy = false; -+ if (!(cmd->flags & MMC_RSP_PRESENT)) { -+ sdcmd |= SDCMD_NO_RESPONSE; -+ } else { -+ if (cmd->flags & MMC_RSP_136) -+ sdcmd |= SDCMD_LONG_RESPONSE; -+ if (cmd->flags & MMC_RSP_BUSY) { -+ sdcmd |= SDCMD_BUSYWAIT; -+ host->use_busy = true; -+ } -+ } -+ -+ if (cmd->data) { -+ if (cmd->data->flags & MMC_DATA_WRITE) -+ sdcmd |= SDCMD_WRITE_CMD; -+ if (cmd->data->flags & MMC_DATA_READ) -+ sdcmd |= SDCMD_READ_CMD; -+ } -+ -+ writel(sdcmd | SDCMD_NEW_FLAG, host->ioaddr + SDCMD); -+ -+ return true; -+} -+ -+static void bcm2835_transfer_complete(struct bcm2835_host *host) -+{ -+ struct mmc_data *data; -+ -+ WARN_ON(!host->data_complete); -+ -+ data = host->data; -+ host->data = NULL; -+ -+ /* Need to send CMD12 if - -+ * a) open-ended multiblock transfer (no CMD23) -+ * b) error in multiblock transfer -+ */ -+ if (host->mrq->stop && (data->error || !host->use_sbc)) { -+ if (bcm2835_send_command(host, host->mrq->stop)) { -+ /* No busy, so poll for completion */ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else { -+ bcm2835_wait_transfer_complete(host); -+ bcm2835_finish_request(host); -+ } -+} -+ -+static void bcm2835_finish_data(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ struct mmc_data *data; -+ -+ data = host->data; -+ -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ -+ data->bytes_xfered = data->error ? 0 : (data->blksz * data->blocks); -+ -+ host->data_complete = true; -+ -+ if (host->cmd) { -+ /* Data managed to finish before the -+ * command completed. Make sure we do -+ * things in the proper order. -+ */ -+ dev_dbg(dev, "Finished early - HSTS %08x\n", -+ readl(host->ioaddr + SDHSTS)); -+ } else { -+ bcm2835_transfer_complete(host); -+ } -+} -+ -+static void bcm2835_finish_command(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ struct mmc_command *cmd = host->cmd; -+ u32 sdcmd; -+ -+ sdcmd = bcm2835_read_wait_sdcmd(host, 100); -+ -+ /* Check for errors */ -+ if (sdcmd & SDCMD_NEW_FLAG) { -+ dev_err(dev, "command never completed.\n"); -+ bcm2835_dumpregs(host); -+ host->cmd->error = -EIO; -+ bcm2835_finish_request(host); -+ return; -+ } else if (sdcmd & SDCMD_FAIL_FLAG) { -+ u32 sdhsts = readl(host->ioaddr + SDHSTS); -+ -+ /* Clear the errors */ -+ writel(SDHSTS_ERROR_MASK, host->ioaddr + SDHSTS); -+ -+ if (!(sdhsts & SDHSTS_CRC7_ERROR) || -+ (host->cmd->opcode != MMC_SEND_OP_COND)) { -+ if (sdhsts & SDHSTS_CMD_TIME_OUT) { -+ host->cmd->error = -ETIMEDOUT; -+ } else { -+ dev_err(dev, "unexpected command %d error\n", -+ host->cmd->opcode); -+ bcm2835_dumpregs(host); -+ host->cmd->error = -EILSEQ; -+ } -+ bcm2835_finish_request(host); -+ return; -+ } -+ } -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) { -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ cmd->resp[3 - i] = -+ readl(host->ioaddr + SDRSP0 + i * 4); -+ } -+ } else { -+ cmd->resp[0] = readl(host->ioaddr + SDRSP0); -+ } -+ } -+ -+ if (cmd == host->mrq->sbc) { -+ /* Finished CMD23, now send actual command. */ -+ host->cmd = NULL; -+ if (bcm2835_send_command(host, host->mrq->cmd)) { -+ if (host->data && host->dma_desc) -+ /* DMA transfer starts now, PIO starts -+ * after irq -+ */ -+ bcm2835_start_dma(host); -+ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else if (cmd == host->mrq->stop) { -+ /* Finished CMD12 */ -+ bcm2835_finish_request(host); -+ } else { -+ /* Processed actual command. */ -+ host->cmd = NULL; -+ if (!host->data) -+ bcm2835_finish_request(host); -+ else if (host->data_complete) -+ bcm2835_transfer_complete(host); -+ } -+} -+ -+static void bcm2835_timeout(struct work_struct *work) -+{ -+ struct delayed_work *d = to_delayed_work(work); -+ struct bcm2835_host *host = -+ container_of(d, struct bcm2835_host, timeout_work); -+ struct device *dev = &host->pdev->dev; -+ -+ mutex_lock(&host->mutex); -+ -+ if (host->mrq) { -+ dev_err(dev, "timeout waiting for hardware interrupt.\n"); -+ bcm2835_dumpregs(host); -+ -+ if (host->data) { -+ host->data->error = -ETIMEDOUT; -+ bcm2835_finish_data(host); -+ } else { -+ if (host->cmd) -+ host->cmd->error = -ETIMEDOUT; -+ else -+ host->mrq->cmd->error = -ETIMEDOUT; -+ -+ bcm2835_finish_request(host); -+ } -+ } -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static bool bcm2835_check_cmd_error(struct bcm2835_host *host, u32 intmask) -+{ -+ struct device *dev = &host->pdev->dev; -+ -+ if (!(intmask & SDHSTS_ERROR_MASK)) -+ return false; -+ -+ if (!host->cmd) -+ return true; -+ -+ dev_err(dev, "sdhost_busy_irq: intmask %08x\n", intmask); -+ if (intmask & SDHSTS_CRC7_ERROR) { -+ host->cmd->error = -EILSEQ; -+ } else if (intmask & (SDHSTS_CRC16_ERROR | -+ SDHSTS_FIFO_ERROR)) { -+ if (host->mrq->data) -+ host->mrq->data->error = -EILSEQ; -+ else -+ host->cmd->error = -EILSEQ; -+ } else if (intmask & SDHSTS_REW_TIME_OUT) { -+ if (host->mrq->data) -+ host->mrq->data->error = -ETIMEDOUT; -+ else -+ host->cmd->error = -ETIMEDOUT; -+ } else if (intmask & SDHSTS_CMD_TIME_OUT) { -+ host->cmd->error = -ETIMEDOUT; -+ } -+ bcm2835_dumpregs(host); -+ return true; -+} -+ -+static void bcm2835_check_data_error(struct bcm2835_host *host, u32 intmask) -+{ -+ if (!host->data) -+ return; -+ if (intmask & (SDHSTS_CRC16_ERROR | SDHSTS_FIFO_ERROR)) -+ host->data->error = -EILSEQ; -+ if (intmask & SDHSTS_REW_TIME_OUT) -+ host->data->error = -ETIMEDOUT; -+} -+ -+static void bcm2835_busy_irq(struct bcm2835_host *host) -+{ -+ if (WARN_ON(!host->cmd)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ -+ if (WARN_ON(!host->use_busy)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ host->use_busy = false; -+ -+ bcm2835_finish_command(host); -+} -+ -+static void bcm2835_data_irq(struct bcm2835_host *host, u32 intmask) -+{ -+ /* There are no dedicated data/space available interrupt -+ * status bits, so it is necessary to use the single shared -+ * data/space available FIFO status bits. It is therefore not -+ * an error to get here when there is no data transfer in -+ * progress. -+ */ -+ if (!host->data) -+ return; -+ -+ bcm2835_check_data_error(host, intmask); -+ if (host->data->error) -+ goto finished; -+ -+ if (host->data->flags & MMC_DATA_WRITE) { -+ /* Use the block interrupt for writes after the first block */ -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN); -+ host->hcfg |= SDHCFG_BLOCK_IRPT_EN; -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ bcm2835_transfer_pio(host); -+ } else { -+ bcm2835_transfer_pio(host); -+ host->blocks--; -+ if ((host->blocks == 0) || host->data->error) -+ goto finished; -+ } -+ return; -+ -+finished: -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+} -+ -+static void bcm2835_data_threaded_irq(struct bcm2835_host *host) -+{ -+ if (!host->data) -+ return; -+ if ((host->blocks == 0) || host->data->error) -+ bcm2835_finish_data(host); -+} -+ -+static void bcm2835_block_irq(struct bcm2835_host *host) -+{ -+ if (WARN_ON(!host->data)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ -+ if (!host->dma_desc) { -+ WARN_ON(!host->blocks); -+ if (host->data->error || (--host->blocks == 0)) -+ bcm2835_finish_data(host); -+ else -+ bcm2835_transfer_pio(host); -+ } else if (host->data->flags & MMC_DATA_WRITE) { -+ bcm2835_finish_data(host); -+ } -+} -+ -+static irqreturn_t bcm2835_irq(int irq, void *dev_id) -+{ -+ irqreturn_t result = IRQ_NONE; -+ struct bcm2835_host *host = dev_id; -+ u32 intmask; -+ -+ spin_lock(&host->lock); -+ -+ intmask = readl(host->ioaddr + SDHSTS); -+ -+ writel(SDHSTS_BUSY_IRPT | -+ SDHSTS_BLOCK_IRPT | -+ SDHSTS_SDIO_IRPT | -+ SDHSTS_DATA_FLAG, -+ host->ioaddr + SDHSTS); -+ -+ if (intmask & SDHSTS_BLOCK_IRPT) { -+ bcm2835_check_data_error(host, intmask); -+ host->irq_block = true; -+ result = IRQ_WAKE_THREAD; -+ } -+ -+ if (intmask & SDHSTS_BUSY_IRPT) { -+ if (!bcm2835_check_cmd_error(host, intmask)) { -+ host->irq_busy = true; -+ result = IRQ_WAKE_THREAD; -+ } else { -+ result = IRQ_HANDLED; -+ } -+ } -+ -+ /* There is no true data interrupt status bit, so it is -+ * necessary to qualify the data flag with the interrupt -+ * enable bit. -+ */ -+ if ((intmask & SDHSTS_DATA_FLAG) && -+ (host->hcfg & SDHCFG_DATA_IRPT_EN)) { -+ bcm2835_data_irq(host, intmask); -+ host->irq_data = true; -+ result = IRQ_WAKE_THREAD; -+ } -+ -+ spin_unlock(&host->lock); -+ -+ return result; -+} -+ -+static irqreturn_t bcm2835_threaded_irq(int irq, void *dev_id) -+{ -+ struct bcm2835_host *host = dev_id; -+ unsigned long flags; -+ bool block, busy, data; -+ -+ spin_lock_irqsave(&host->lock, flags); -+ -+ block = host->irq_block; -+ busy = host->irq_busy; -+ data = host->irq_data; -+ host->irq_block = false; -+ host->irq_busy = false; -+ host->irq_data = false; -+ -+ spin_unlock_irqrestore(&host->lock, flags); -+ -+ mutex_lock(&host->mutex); -+ -+ if (block) -+ bcm2835_block_irq(host); -+ if (busy) -+ bcm2835_busy_irq(host); -+ if (data) -+ bcm2835_data_threaded_irq(host); -+ -+ mutex_unlock(&host->mutex); -+ -+ return IRQ_HANDLED; -+} -+ -+static void bcm2835_dma_complete_work(struct work_struct *work) -+{ -+ struct bcm2835_host *host = -+ container_of(work, struct bcm2835_host, dma_work); -+ struct mmc_data *data = host->data; -+ -+ mutex_lock(&host->mutex); -+ -+ if (host->dma_chan) { -+ dma_unmap_sg(host->dma_chan->device->dev, -+ data->sg, data->sg_len, -+ host->dma_dir); -+ -+ host->dma_chan = NULL; -+ } -+ -+ if (host->drain_words) { -+ unsigned long flags; -+ void *page; -+ u32 *buf; -+ -+ if (host->drain_offset & PAGE_MASK) { -+ host->drain_page += host->drain_offset >> PAGE_SHIFT; -+ host->drain_offset &= ~PAGE_MASK; -+ } -+ local_irq_save(flags); -+ page = kmap_atomic(host->drain_page); -+ buf = page + host->drain_offset; -+ -+ while (host->drain_words) { -+ u32 edm = readl(host->ioaddr + SDEDM); -+ -+ if ((edm >> 4) & 0x1f) -+ *(buf++) = readl(host->ioaddr + SDDATA); -+ host->drain_words--; -+ } -+ -+ kunmap_atomic(page); -+ local_irq_restore(flags); -+ } -+ -+ bcm2835_finish_data(host); -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) -+{ -+ int div; -+ -+ /* The SDCDIV register has 11 bits, and holds (div - 2). But -+ * in data mode the max is 50MHz wihout a minimum, and only -+ * the bottom 3 bits are used. Since the switch over is -+ * automatic (unless we have marked the card as slow...), -+ * chosen values have to make sense in both modes. Ident mode -+ * must be 100-400KHz, so can range check the requested -+ * clock. CMD15 must be used to return to data mode, so this -+ * can be monitored. -+ * -+ * clock 250MHz -> 0->125MHz, 1->83.3MHz, 2->62.5MHz, 3->50.0MHz -+ * 4->41.7MHz, 5->35.7MHz, 6->31.3MHz, 7->27.8MHz -+ * -+ * 623->400KHz/27.8MHz -+ * reset value (507)->491159/50MHz -+ * -+ * BUT, the 3-bit clock divisor in data mode is too small if -+ * the core clock is higher than 250MHz, so instead use the -+ * SLOW_CARD configuration bit to force the use of the ident -+ * clock divisor at all times. -+ */ -+ -+ if (clock < 100000) { -+ /* Can't stop the clock, but make it as slow as possible -+ * to show willing -+ */ -+ host->cdiv = SDCDIV_MAX_CDIV; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ return; -+ } -+ -+ div = host->max_clk / clock; -+ if (div < 2) -+ div = 2; -+ if ((host->max_clk / div) > clock) -+ div++; -+ div -= 2; -+ -+ if (div > SDCDIV_MAX_CDIV) -+ div = SDCDIV_MAX_CDIV; -+ -+ clock = host->max_clk / (div + 2); -+ host->mmc->actual_clock = clock; -+ -+ /* Calibrate some delays */ -+ -+ host->ns_per_fifo_word = (1000000000 / clock) * -+ ((host->mmc->caps & MMC_CAP_4_BIT_DATA) ? 8 : 32); -+ -+ host->cdiv = div; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ -+ /* Set the timeout to 500ms */ -+ writel(host->mmc->actual_clock / 2, host->ioaddr + SDTOUT); -+} -+ -+static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ struct device *dev = &host->pdev->dev; -+ u32 edm, fsm; -+ -+ /* Reset the error statuses in case this is a retry */ -+ if (mrq->sbc) -+ mrq->sbc->error = 0; -+ if (mrq->cmd) -+ mrq->cmd->error = 0; -+ if (mrq->data) -+ mrq->data->error = 0; -+ if (mrq->stop) -+ mrq->stop->error = 0; -+ -+ if (mrq->data && !is_power_of_2(mrq->data->blksz)) { -+ dev_err(dev, "unsupported block size (%d bytes)\n", -+ mrq->data->blksz); -+ mrq->cmd->error = -EINVAL; -+ mmc_request_done(mmc, mrq); -+ return; -+ } -+ -+ if (host->use_dma && mrq->data && (mrq->data->blocks > PIO_THRESHOLD)) -+ bcm2835_prepare_dma(host, mrq->data); -+ -+ mutex_lock(&host->mutex); -+ -+ WARN_ON(host->mrq); -+ host->mrq = mrq; -+ -+ edm = readl(host->ioaddr + SDEDM); -+ fsm = edm & SDEDM_FSM_MASK; -+ -+ if ((fsm != SDEDM_FSM_IDENTMODE) && -+ (fsm != SDEDM_FSM_DATAMODE)) { -+ dev_err(dev, "previous command (%d) not complete (EDM %08x)\n", -+ readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, -+ edm); -+ bcm2835_dumpregs(host); -+ mrq->cmd->error = -EILSEQ; -+ bcm2835_finish_request(host); -+ mutex_unlock(&host->mutex); -+ return; -+ } -+ -+ host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); -+ if (host->use_sbc) { -+ if (bcm2835_send_command(host, mrq->sbc)) { -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else if (bcm2835_send_command(host, mrq->cmd)) { -+ if (host->data && host->dma_desc) { -+ /* DMA transfer starts now, PIO starts after irq */ -+ bcm2835_start_dma(host); -+ } -+ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static void bcm2835_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ -+ mutex_lock(&host->mutex); -+ -+ if (!ios->clock || ios->clock != host->clock) { -+ bcm2835_set_clock(host, ios->clock); -+ host->clock = ios->clock; -+ } -+ -+ /* set bus width */ -+ host->hcfg &= ~SDHCFG_WIDE_EXT_BUS; -+ if (ios->bus_width == MMC_BUS_WIDTH_4) -+ host->hcfg |= SDHCFG_WIDE_EXT_BUS; -+ -+ host->hcfg |= SDHCFG_WIDE_INT_BUS; -+ -+ /* Disable clever clock switching, to cope with fast core clocks */ -+ host->hcfg |= SDHCFG_SLOW_CARD; -+ -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static struct mmc_host_ops bcm2835_ops = { -+ .request = bcm2835_request, -+ .set_ios = bcm2835_set_ios, -+ .hw_reset = bcm2835_reset, -+}; -+ -+static int bcm2835_add_host(struct bcm2835_host *host) -+{ -+ struct mmc_host *mmc = host->mmc; -+ struct device *dev = &host->pdev->dev; -+ char pio_limit_string[20]; -+ int ret; -+ -+ mmc->f_max = host->max_clk; -+ mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV; -+ -+ mmc->max_busy_timeout = ~0 / (mmc->f_max / 1000); -+ -+ dev_dbg(dev, "f_max %d, f_min %d, max_busy_timeout %d\n", -+ mmc->f_max, mmc->f_min, mmc->max_busy_timeout); -+ -+ /* host controller capabilities */ -+ mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | -+ MMC_CAP_NEEDS_POLL | MMC_CAP_HW_RESET | MMC_CAP_ERASE | -+ MMC_CAP_CMD23; -+ -+ spin_lock_init(&host->lock); -+ mutex_init(&host->mutex); -+ -+ if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) { -+ dev_warn(dev, "unable to initialise DMA channel. Falling back to PIO\n"); -+ host->use_dma = false; -+ } else { -+ host->use_dma = true; -+ -+ host->dma_cfg_tx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_tx.slave_id = 13; /* DREQ channel */ -+ host->dma_cfg_tx.direction = DMA_MEM_TO_DEV; -+ host->dma_cfg_tx.src_addr = 0; -+ host->dma_cfg_tx.dst_addr = host->phys_addr + SDDATA; -+ -+ host->dma_cfg_rx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_rx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_rx.slave_id = 13; /* DREQ channel */ -+ host->dma_cfg_rx.direction = DMA_DEV_TO_MEM; -+ host->dma_cfg_rx.src_addr = host->phys_addr + SDDATA; -+ host->dma_cfg_rx.dst_addr = 0; -+ -+ if (dmaengine_slave_config(host->dma_chan_rxtx, -+ &host->dma_cfg_tx) != 0 || -+ dmaengine_slave_config(host->dma_chan_rxtx, -+ &host->dma_cfg_rx) != 0) -+ host->use_dma = false; -+ } -+ -+ mmc->max_segs = 128; -+ mmc->max_req_size = 524288; -+ mmc->max_seg_size = mmc->max_req_size; -+ mmc->max_blk_size = 1024; -+ mmc->max_blk_count = 65535; -+ -+ /* report supported voltage ranges */ -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -+ -+ INIT_WORK(&host->dma_work, bcm2835_dma_complete_work); -+ INIT_DELAYED_WORK(&host->timeout_work, bcm2835_timeout); -+ -+ /* Set interrupt enables */ -+ host->hcfg = SDHCFG_BUSY_IRPT_EN; -+ -+ bcm2835_reset_internal(host); -+ -+ ret = request_threaded_irq(host->irq, bcm2835_irq, -+ bcm2835_threaded_irq, -+ 0, mmc_hostname(mmc), host); -+ if (ret) { -+ dev_err(dev, "failed to request IRQ %d: %d\n", host->irq, ret); -+ return ret; -+ } -+ -+ ret = mmc_add_host(mmc); -+ if (ret) { -+ free_irq(host->irq, host); -+ return ret; -+ } -+ -+ pio_limit_string[0] = '\0'; -+ if (host->use_dma && (PIO_THRESHOLD > 0)) -+ sprintf(pio_limit_string, " (>%d)", PIO_THRESHOLD); -+ dev_info(dev, "loaded - DMA %s%s\n", -+ host->use_dma ? "enabled" : "disabled", pio_limit_string); -+ -+ return 0; -+} -+ -+static int bcm2835_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct clk *clk; -+ struct resource *iomem; -+ struct bcm2835_host *host; -+ struct mmc_host *mmc; -+ const __be32 *regaddr_p; -+ int ret; -+ -+ dev_dbg(dev, "%s\n", __func__); -+ mmc = mmc_alloc_host(sizeof(*host), dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ mmc->ops = &bcm2835_ops; -+ host = mmc_priv(mmc); -+ host->mmc = mmc; -+ host->pdev = pdev; -+ spin_lock_init(&host->lock); -+ -+ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ host->ioaddr = devm_ioremap_resource(dev, iomem); -+ if (IS_ERR(host->ioaddr)) { -+ ret = PTR_ERR(host->ioaddr); -+ goto err; -+ } -+ -+ /* Parse OF address directly to get the physical address for -+ * DMA to our registers. -+ */ -+ regaddr_p = of_get_address(pdev->dev.of_node, 0, NULL, NULL); -+ if (!regaddr_p) { -+ dev_err(dev, "Can't get phys address\n"); -+ ret = -EINVAL; -+ goto err; -+ } -+ -+ host->phys_addr = be32_to_cpup(regaddr_p); -+ -+ host->dma_chan = NULL; -+ host->dma_desc = NULL; -+ -+ host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx"); -+ -+ clk = devm_clk_get(dev, NULL); -+ if (IS_ERR(clk)) { -+ ret = PTR_ERR(clk); -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "could not get clk: %d\n", ret); -+ goto err; -+ } -+ -+ host->max_clk = clk_get_rate(clk); -+ -+ host->irq = platform_get_irq(pdev, 0); -+ if (host->irq <= 0) { -+ dev_err(dev, "get IRQ failed\n"); -+ ret = -EINVAL; -+ goto err; -+ } -+ -+ ret = mmc_of_parse(mmc); -+ if (ret) -+ goto err; -+ -+ ret = bcm2835_add_host(host); -+ if (ret) -+ goto err; -+ -+ platform_set_drvdata(pdev, host); -+ -+ dev_dbg(dev, "%s -> OK\n", __func__); -+ -+ return 0; -+ -+err: -+ dev_dbg(dev, "%s -> err %d\n", __func__, ret); -+ mmc_free_host(mmc); -+ -+ return ret; -+} -+ -+static int bcm2835_remove(struct platform_device *pdev) -+{ -+ struct bcm2835_host *host = platform_get_drvdata(pdev); -+ -+ mmc_remove_host(host->mmc); -+ -+ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); -+ -+ free_irq(host->irq, host); -+ -+ cancel_work_sync(&host->dma_work); -+ cancel_delayed_work_sync(&host->timeout_work); -+ -+ mmc_free_host(host->mmc); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm2835_match[] = { -+ { .compatible = "brcm,bcm2835-sdhost" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, bcm2835_match); -+ -+static struct platform_driver bcm2835_driver = { -+ .probe = bcm2835_probe, -+ .remove = bcm2835_remove, -+ .driver = { -+ .name = "sdhost-bcm2835", -+ .of_match_table = bcm2835_match, -+ }, -+}; -+module_platform_driver(bcm2835_driver); -+ -+MODULE_ALIAS("platform:sdhost-bcm2835"); -+MODULE_DESCRIPTION("BCM2835 SDHost driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Phil Elwell"); -From patchwork Wed Mar 8 09:19:05 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,3/7] mmc: bcm2835: add sdhost controller to devicetree -From: Gerd Hoffmann -X-Patchwork-Id: 9610693 -Message-Id: <1488964751-22763-6-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:05 +0100 - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 6 ++++++ - arch/arm/boot/dts/bcm283x.dtsi | 10 ++++++++++ - 2 files changed, 16 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 1e00a28..8b95832 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -69,6 +69,12 @@ - bus-width = <4>; - }; - -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ bus-width = <4>; -+}; -+ - &pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9798bc9..19099a5 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -350,6 +350,16 @@ - arm,primecell-periphid = <0x00241011>; - }; - -+ sdhost: mmc@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+ status = "disabled"; -+ }; -+ - i2s: i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; - reg = <0x7e203000 0x20>, -From patchwork Wed Mar 8 09:19:07 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4, 4/7] arm: set CONFIG_MMC_BCM2835=y in bcm2835_defconfig and - multi_v7_defconfig -From: Gerd Hoffmann -X-Patchwork-Id: 9610689 -Message-Id: <1488964751-22763-8-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:07 +0100 - -We need to enable this controller so that we can switch the SD card's -pinmux over to it by default, which will improve storage performance. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann ---- - arch/arm/configs/bcm2835_defconfig | 1 + - arch/arm/configs/multi_v7_defconfig | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig -index 4b89f4e..3767c24 100644 ---- a/arch/arm/configs/bcm2835_defconfig -+++ b/arch/arm/configs/bcm2835_defconfig -@@ -92,6 +92,7 @@ CONFIG_MMC=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_PLTFM=y - CONFIG_MMC_SDHCI_IPROC=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_GPIO=y -diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig -index a94126f..63b94d0 100644 ---- a/arch/arm/configs/multi_v7_defconfig -+++ b/arch/arm/configs/multi_v7_defconfig -@@ -730,6 +730,7 @@ CONFIG_MMC_DW_EXYNOS=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SH_MMCIF=y - CONFIG_MMC_SUNXI=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_CLASS_FLASH=m -From patchwork Wed Mar 8 09:19:09 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,5/7] arm64: set CONFIG_MMC_BCM2835=y in defconfig -From: Gerd Hoffmann -X-Patchwork-Id: 9610647 -Message-Id: <1488964751-22763-10-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:09 +0100 - -We need to enable this controller so that we can switch the SD card's -pinmux over to it by default, which will improve storage performance. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann ---- - arch/arm64/configs/defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index 7c48028..519a55c 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -398,6 +398,7 @@ CONFIG_MMC_DW_EXYNOS=y - CONFIG_MMC_DW_K3=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SUNXI=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_GPIO=y -From patchwork Sat Mar 25 13:17:00 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: mmc: bcm2835: Fix possible NULL ptr dereference in bcm2835_request -From: Stefan Wahren -X-Patchwork-Id: 9644591 -Message-Id: <1490447820-751-1-git-send-email-stefan.wahren@i2se.com> -To: Ulf Hansson , Eric Anholt , - Gerd Hoffmann -Cc: Jaehoon Chung , - Dan Carpenter , - linux-rpi-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, - Stefan Wahren -Date: Sat, 25 Mar 2017 13:17:00 +0000 - -This fixes a NULL pointer dereference in case of a MMC request with a -set block count command and no data. - -Reported-by: Dan Carpenter -Signed-off-by: Stefan Wahren ---- - drivers/mmc/host/bcm2835.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -index 7d1b0db..1f343a4 100644 ---- a/drivers/mmc/host/bcm2835.c -+++ b/drivers/mmc/host/bcm2835.c -@@ -1200,7 +1200,8 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) - return; - } - -- host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); -+ host->use_sbc = !!mrq->sbc && host->mrq->data && -+ (host->mrq->data->flags & MMC_DATA_READ); - if (host->use_sbc) { - if (bcm2835_send_command(host, mrq->sbc)) { - if (!host->use_busy) diff --git a/bcm283x-vc4-fix-vblank.patch b/bcm283x-vc4-fix-vblank.patch new file mode 100644 index 0000000..ce4f8b1 --- /dev/null +++ b/bcm283x-vc4-fix-vblank.patch @@ -0,0 +1,123 @@ +From d40a5938a10a3ba73bce6395729fefd8b8bb1c07 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 29 Jun 2017 10:05:05 +0100 +Subject: [PATCH] drm/vc4: Fix VBLANK handling in crtc->enable() path + +When we are enabling a CRTC, drm_crtc_vblank_get() is called before +drm_crtc_vblank_on(), which is not supposed to happen (hence the +WARN_ON() in the code). To solve the problem, we delay the 'update +display list' operation after the CRTC is actually enabled. + +Signed-off-by: Boris Brezillon +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 66 +++++++++++++++++++++++++++--------------- + 1 file changed, 43 insertions(+), 23 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c +index d86c8cce3182..316bd6210d69 100644 +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -530,6 +530,34 @@ static void vc4_crtc_disable(struct drm_crtc *crtc) + SCALER_DISPSTATX_EMPTY); + } + ++static void vc4_crtc_update_dlist(struct drm_crtc *crtc) ++{ ++ struct drm_device *dev = crtc->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(dev); ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); ++ ++ if (crtc->state->event) { ++ unsigned long flags; ++ ++ crtc->state->event->pipe = drm_crtc_index(crtc); ++ ++ WARN_ON(drm_crtc_vblank_get(crtc) != 0); ++ ++ spin_lock_irqsave(&dev->event_lock, flags); ++ vc4_crtc->event = crtc->state->event; ++ crtc->state->event = NULL; ++ ++ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), ++ vc4_state->mm.start); ++ ++ spin_unlock_irqrestore(&dev->event_lock, flags); ++ } else { ++ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), ++ vc4_state->mm.start); ++ } ++} ++ + static void vc4_crtc_enable(struct drm_crtc *crtc) + { + struct drm_device *dev = crtc->dev; +@@ -540,6 +568,12 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) + + require_hvs_enabled(dev); + ++ /* Enable vblank irq handling before crtc is started otherwise ++ * drm_crtc_get_vblank() fails in vc4_crtc_update_dlist(). ++ */ ++ drm_crtc_vblank_on(crtc); ++ vc4_crtc_update_dlist(crtc); ++ + /* Turn on the scaler, which will wait for vstart to start + * compositing. + */ +@@ -551,9 +585,6 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) + /* Turn on the pixel valve, which will emit the vstart signal. */ + CRTC_WRITE(PV_V_CONTROL, + CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN); +- +- /* Enable vblank irq handling after crtc is started. */ +- drm_crtc_vblank_on(crtc); + } + + static bool vc4_crtc_mode_fixup(struct drm_crtc *crtc, +@@ -608,7 +639,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, + { + struct drm_device *dev = crtc->dev; + struct vc4_dev *vc4 = to_vc4_dev(dev); +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); + struct drm_plane *plane; + bool debug_dump_regs = false; +@@ -630,25 +660,15 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, + + WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); + +- if (crtc->state->event) { +- unsigned long flags; +- +- crtc->state->event->pipe = drm_crtc_index(crtc); +- +- WARN_ON(drm_crtc_vblank_get(crtc) != 0); +- +- spin_lock_irqsave(&dev->event_lock, flags); +- vc4_crtc->event = crtc->state->event; +- crtc->state->event = NULL; +- +- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), +- vc4_state->mm.start); +- +- spin_unlock_irqrestore(&dev->event_lock, flags); +- } else { +- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), +- vc4_state->mm.start); +- } ++ /* Only update DISPLIST if the CRTC was already running and is not ++ * being disabled. ++ * vc4_crtc_enable() takes care of updating the dlist just after ++ * re-enabling VBLANK interrupts and before enabling the engine. ++ * If the CRTC is being disabled, there's no point in updating this ++ * information. ++ */ ++ if (crtc->state->active && old_state->active) ++ vc4_crtc_update_dlist(crtc); + + if (debug_dump_regs) { + DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); +-- +2.13.0 + diff --git a/bt-bcm.patch b/bt-bcm.patch new file mode 100644 index 0000000..aa5334b --- /dev/null +++ b/bt-bcm.patch @@ -0,0 +1,32 @@ +From feb16722b5d5f05b7ae1278a43e717c3d35cd512 Mon Sep 17 00:00:00 2001 +From: Ian Molton +Date: Wed, 28 Jun 2017 20:10:55 +0100 +Subject: Bluetooth: btbcm: Add entry for BCM43430 UART bluetooth + +This patch adds the device ID for the bluetooth chip used in the +Broadcom BCM43430 SDIO WiFi / UART BT chip. + +Successfully tested using Firmware version 0x0182 + +Signed-off-by: Ian Molton +Reported-by: Loic Poulain +Signed-off-by: Marcel Holtmann +--- + drivers/bluetooth/btbcm.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/bluetooth/btbcm.c b/drivers/bluetooth/btbcm.c +index 24f8c4e..9ab6cfb 100644 +--- a/drivers/bluetooth/btbcm.c ++++ b/drivers/bluetooth/btbcm.c +@@ -295,6 +295,7 @@ static const struct { + { 0x410e, "BCM43341B0" }, /* 002.001.014 */ + { 0x4406, "BCM4324B3" }, /* 002.004.006 */ + { 0x610c, "BCM4354" }, /* 003.001.012 */ ++ { 0x2209, "BCM43430A1" }, /* 001.002.009 */ + { } + }; + +-- +cgit v1.1 + diff --git a/bz1471302.patch b/bz1471302.patch new file mode 100644 index 0000000..0a1325e --- /dev/null +++ b/bz1471302.patch @@ -0,0 +1,81 @@ +From: Johannes Thumshirn +Subject: Re: [REGRESSION] 28676d869bbb (scsi: sg: check for valid direction + before starting the request) breaks mtx tape library control +To: Jason L Tibbitts III +Cc: Doug Gilbert , linux-scsi@vger.kernel.org, + linux-kernel@vger.kernel.org, dvyukov@google.com, hare@suse.com, + hch@lst.de, martin.petersen@oracle.com +Date: Wed, 26 Jul 2017 09:39:34 +0200 (6 hours, 57 minutes ago) + +On Tue, Jul 25, 2017 at 01:25:07PM -0500, Jason L Tibbitts III wrote: +> >>>>> "JT" == Johannes Thumshirn writes: +> ioctl(3, SG_IO, {interface_id='S', dxfer_direction=SG_DXFER_TO_DEV, cmd_len=12, cmdp="\xa5\x00\x00\x00\x00\x01\x03\xe9\x00\x00\x00\x00", mx_sb_len=20, iovec_count=0, dxfer_len=0, timeout=300000, flags=0, dxferp=NULL, status=0, masked_status=0, msg_status=0, sb_len_wr=0, sbp="", host_status=0, driver_status=0, resid=0, duration=0, info=0}) = -1 EINVAL (Invalid argument) + +[...] + case SG_DXFER_TO_DEV: + case SG_DXFER_TO_FROM_DEV: + if (!hp->dxferp) + return false; + return true; + +So here we go, dxfer_direction is SG_DXFER_TO_DEV, dxfer_len is 0 and dxferp +is NULL. We bail out because dxferp is NULL here. + +I only looked at sg_write() and not sg_new_write() which is called by the +SG_IO path not the fops->write() path. + +It's probably best to just check for dxfer_len <= 2^28 to be valid as Doug +suggested: + +diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c +index 4fe606b000b4..d7ff71e0c85c 100644 +--- a/drivers/scsi/sg.c ++++ b/drivers/scsi/sg.c +@@ -751,29 +751,6 @@ sg_new_write(Sg_fd *sfp, struct file *file, const char __user *buf, + return count; + } + +-static bool sg_is_valid_dxfer(sg_io_hdr_t *hp) +-{ +- switch (hp->dxfer_direction) { +- case SG_DXFER_NONE: +- if (hp->dxferp || hp->dxfer_len > 0) +- return false; +- return true; +- case SG_DXFER_TO_DEV: +- case SG_DXFER_FROM_DEV: +- case SG_DXFER_TO_FROM_DEV: +- if (!hp->dxferp || hp->dxfer_len == 0) +- return false; +- return true; +- case SG_DXFER_UNKNOWN: +- if ((!hp->dxferp && hp->dxfer_len) || +- (hp->dxferp && hp->dxfer_len == 0)) +- return false; +- return true; +- default: +- return false; +- } +-} +- + static int + sg_common_write(Sg_fd * sfp, Sg_request * srp, + unsigned char *cmnd, int timeout, int blocking) +@@ -800,7 +771,7 @@ sg_common_write(Sg_fd * sfp, Sg_request * srp, + "sg_common_write: scsi opcode=0x%02x, cmd_size=%d\n", + (int) cmnd[0], (int) hp->cmd_len)); + +- if (!sg_is_valid_dxfer(hp)) ++ if (hp->dxfer_len >= SZ_256M) + return -EINVAL; + + k = sg_start_req(srp, cmnd); + +-- +Johannes Thumshirn Storage +jthumshirn@suse.de +49 911 74053 689 +SUSE LINUX GmbH, Maxfeldstr. 5, 90409 N�rnberg +GF: Felix Imend�rffer, Jane Smithard, Graham Norton +HRB 21284 (AG N�rnberg) +Key fingerprint = EC38 9CAB C2C4 F25D 8600 D0D0 0393 969D 2D76 0850 + diff --git a/dccp-fix-freeing-skb-too-early-for-IPV6_RECVPKTINFO.patch b/dccp-fix-freeing-skb-too-early-for-IPV6_RECVPKTINFO.patch deleted file mode 100644 index 433fd4b..0000000 --- a/dccp-fix-freeing-skb-too-early-for-IPV6_RECVPKTINFO.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 5edabca9d4cff7f1f2b68f0bac55ef99d9798ba4 Mon Sep 17 00:00:00 2001 -From: Andrey Konovalov -Date: Thu, 16 Feb 2017 17:22:46 +0100 -Subject: dccp: fix freeing skb too early for IPV6_RECVPKTINFO - -In the current DCCP implementation an skb for a DCCP_PKT_REQUEST packet -is forcibly freed via __kfree_skb in dccp_rcv_state_process if -dccp_v6_conn_request successfully returns. - -However, if IPV6_RECVPKTINFO is set on a socket, the address of the skb -is saved to ireq->pktopts and the ref count for skb is incremented in -dccp_v6_conn_request, so skb is still in use. Nevertheless, it gets freed -in dccp_rcv_state_process. - -Fix by calling consume_skb instead of doing goto discard and therefore -calling __kfree_skb. - -Similar fixes for TCP: - -fb7e2399ec17f1004c0e0ccfd17439f8759ede01 [TCP]: skb is unexpectedly freed. -0aea76d35c9651d55bbaf746e7914e5f9ae5a25d tcp: SYN packets are now -simply consumed - -Signed-off-by: Andrey Konovalov -Acked-by: Eric Dumazet -Signed-off-by: David S. Miller ---- - net/dccp/input.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/net/dccp/input.c b/net/dccp/input.c -index ba34718..8fedc2d 100644 ---- a/net/dccp/input.c -+++ b/net/dccp/input.c -@@ -606,7 +606,8 @@ int dccp_rcv_state_process(struct sock *sk, struct sk_buff *skb, - if (inet_csk(sk)->icsk_af_ops->conn_request(sk, - skb) < 0) - return 1; -- goto discard; -+ consume_skb(skb); -+ return 0; - } - if (dh->dccph_type == DCCP_PKT_RESET) - goto discard; --- -cgit v0.12 - diff --git a/dell-laptop-Adds-support-for-keyboard-backlight-timeout-AC-settings.patch b/dell-laptop-Adds-support-for-keyboard-backlight-timeout-AC-settings.patch deleted file mode 100644 index bf370c6..0000000 --- a/dell-laptop-Adds-support-for-keyboard-backlight-timeout-AC-settings.patch +++ /dev/null @@ -1,197 +0,0 @@ -From patchwork Sun Apr 23 19:40:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Subject: dell-laptop: Adds support for keyboard backlight timeout AC settings -From: =?utf-8?q?Pali_Roh=C3=A1r?= -X-Patchwork-Id: 9695273 -Message-Id: <1492976447-10339-1-git-send-email-pali.rohar@gmail.com> -To: Matthew Garrett , - Darren Hart , Andy Shevchenko , - Arcadiy Ivanov , - Mario Limonciello -Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, - =?UTF-8?q?Pali=20Roh=C3=A1r?= -Date: Sun, 23 Apr 2017 21:40:47 +0200 - -When changing keyboard backlight state on new Dell laptops, firmware -expects a new timeout AC value filled in Set New State SMBIOS call. - -Without it any change of keyboard backlight state on new Dell laptops -fails. And user can see following error message in dmesg: - - dell_laptop: Setting old previous keyboard state failed - leds dell::kbd_backlight: Setting an LED's brightness failed (-6) - -This patch adds support for retrieving current timeout AC values and also -updating them. Current timeout value in sysfs is displayed based on current -AC status, like current display brightness value. - -Detection if Dell laptop supports or not new timeout AC settings is done by -checking existence of Keyboard Backlight with AC SMBIOS token (0x0451). - -Signed-off-by: Pali Rohár -Acked-by: Mario Limonciello ---- -I have not tested this patch yet as I do not have affected machine. I would -appreciate some testing of this patch on more new Dell laptops. Without -this patch changing keyboard backlight is not possible on affected machines. ---- - drivers/platform/x86/dell-laptop.c | 59 ++++++++++++++++++++++++++++++++---- - 1 file changed, 53 insertions(+), 6 deletions(-) - -diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c -index f57dd28..cddf3c2 100644 ---- a/drivers/platform/x86/dell-laptop.c -+++ b/drivers/platform/x86/dell-laptop.c -@@ -42,6 +42,7 @@ - #define KBD_LED_AUTO_50_TOKEN 0x02EB - #define KBD_LED_AUTO_75_TOKEN 0x02EC - #define KBD_LED_AUTO_100_TOKEN 0x02F6 -+#define KBD_LED_AC_TOKEN 0x0451 - - struct quirk_entry { - u8 touchpad_led; -@@ -1024,7 +1025,7 @@ static void touchpad_led_exit(void) - * bit 2 Pointing stick - * bit 3 Any mouse - * bits 4-7 Reserved for future use -- * cbRES2, byte3 Current Timeout -+ * cbRES2, byte3 Current Timeout on battery - * bits 7:6 Timeout units indicator: - * 00b Seconds - * 01b Minutes -@@ -1036,6 +1037,15 @@ static void touchpad_led_exit(void) - * cbRES3, byte0 Current setting of ALS value that turns the light on or off. - * cbRES3, byte1 Current ALS reading - * cbRES3, byte2 Current keyboard light level. -+ * cbRES3, byte3 Current timeout on AC Power -+ * bits 7:6 Timeout units indicator: -+ * 00b Seconds -+ * 01b Minutes -+ * 10b Hours -+ * 11b Days -+ * Bits 5:0 Timeout value (0-63) in sec/min/hr/day -+ * NOTE: A value of 0 means always on (no timeout) if any bits of RES3 byte2 -+ * are set upon return from the upon return from the [Get Feature information] call. - * - * cbArg1 0x2 = Set New State - * cbRES1 Standard return codes (0, -1, -2) -@@ -1058,7 +1068,7 @@ static void touchpad_led_exit(void) - * bit 2 Pointing stick - * bit 3 Any mouse - * bits 4-7 Reserved for future use -- * cbArg2, byte3 Desired Timeout -+ * cbArg2, byte3 Desired Timeout on battery - * bits 7:6 Timeout units indicator: - * 00b Seconds - * 01b Minutes -@@ -1067,6 +1077,13 @@ static void touchpad_led_exit(void) - * bits 5:0 Timeout value (0-63) in sec/min/hr/day - * cbArg3, byte0 Desired setting of ALS value that turns the light on or off. - * cbArg3, byte2 Desired keyboard light level. -+ * cbArg3, byte3 Desired Timeout on AC power -+ * bits 7:6 Timeout units indicator: -+ * 00b Seconds -+ * 01b Minutes -+ * 10b Hours -+ * 11b Days -+ * bits 5:0 Timeout value (0-63) in sec/min/hr/day - */ - - -@@ -1112,6 +1129,8 @@ struct kbd_state { - u8 triggers; - u8 timeout_value; - u8 timeout_unit; -+ u8 timeout_value_ac; -+ u8 timeout_unit_ac; - u8 als_setting; - u8 als_value; - u8 level; -@@ -1131,6 +1150,7 @@ struct kbd_state { - static struct kbd_info kbd_info; - static bool kbd_als_supported; - static bool kbd_triggers_supported; -+static bool kbd_timeout_ac_supported; - - static u8 kbd_mode_levels[16]; - static int kbd_mode_levels_count; -@@ -1269,6 +1289,8 @@ static int kbd_get_state(struct kbd_state *state) - state->als_setting = buffer->output[2] & 0xFF; - state->als_value = (buffer->output[2] >> 8) & 0xFF; - state->level = (buffer->output[2] >> 16) & 0xFF; -+ state->timeout_value_ac = (buffer->output[2] >> 24) & 0x3F; -+ state->timeout_unit_ac = (buffer->output[2] >> 30) & 0x3; - - out: - dell_smbios_release_buffer(); -@@ -1288,6 +1310,8 @@ static int kbd_set_state(struct kbd_state *state) - buffer->input[1] |= (state->timeout_unit & 0x3) << 30; - buffer->input[2] = state->als_setting & 0xFF; - buffer->input[2] |= (state->level & 0xFF) << 16; -+ buffer->input[2] |= (state->timeout_value_ac & 0x3F) << 24; -+ buffer->input[2] |= (state->timeout_unit_ac & 0x3) << 30; - dell_smbios_send_request(4, 11); - ret = buffer->output[0]; - dell_smbios_release_buffer(); -@@ -1394,6 +1418,13 @@ static inline int kbd_init_info(void) - if (ret) - return ret; - -+ /* NOTE: Old models without KBD_LED_AC_TOKEN token supports only one -+ * timeout value which is shared for both battery and AC power -+ * settings. So do not try to set AC values on old models. -+ */ -+ if (dell_smbios_find_token(KBD_LED_AC_TOKEN)) -+ kbd_timeout_ac_supported = true; -+ - kbd_get_state(&state); - - /* NOTE: timeout value is stored in 6 bits so max value is 63 */ -@@ -1573,8 +1604,14 @@ static ssize_t kbd_led_timeout_store(struct device *dev, - return ret; - - new_state = state; -- new_state.timeout_value = value; -- new_state.timeout_unit = unit; -+ -+ if (kbd_timeout_ac_supported && power_supply_is_system_supplied() > 0) { -+ new_state.timeout_value_ac = value; -+ new_state.timeout_unit_ac = unit; -+ } else { -+ new_state.timeout_value = value; -+ new_state.timeout_unit = unit; -+ } - - ret = kbd_set_state_safe(&new_state, &state); - if (ret) -@@ -1587,16 +1624,26 @@ static ssize_t kbd_led_timeout_show(struct device *dev, - struct device_attribute *attr, char *buf) - { - struct kbd_state state; -+ int value; - int ret; - int len; -+ u8 unit; - - ret = kbd_get_state(&state); - if (ret) - return ret; - -- len = sprintf(buf, "%d", state.timeout_value); -+ if (kbd_timeout_ac_supported && power_supply_is_system_supplied() > 0) { -+ value = state.timeout_value_ac; -+ unit = state.timeout_unit_ac; -+ } else { -+ value = state.timeout_value; -+ unit = state.timeout_unit; -+ } -+ -+ len = sprintf(buf, "%d", value); - -- switch (state.timeout_unit) { -+ switch (unit) { - case KBD_TIMEOUT_SECONDS: - return len + sprintf(buf+len, "s\n"); - case KBD_TIMEOUT_MINUTES: diff --git a/drm-i915-turn-off-wc-mmaps.patch b/drm-i915-turn-off-wc-mmaps.patch deleted file mode 100644 index c81b892..0000000 --- a/drm-i915-turn-off-wc-mmaps.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Dave Airlie -Date: Thu, 4 Jun 2015 07:12:20 -0400 -Subject: [PATCH] drm: i915: turn off wc mmaps - ---- - drivers/gpu/drm/i915/i915_dma.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c -index d2df321ba634..775a5b11a366 100644 ---- a/drivers/gpu/drm/i915/i915_dma.c -+++ b/drivers/gpu/drm/i915/i915_dma.c -@@ -151,7 +151,7 @@ static int i915_getparam(struct drm_device *dev, void *data, - value = 1; - break; - case I915_PARAM_MMAP_VERSION: -- value = 1; -+ value = 0; - break; - case I915_PARAM_SUBSLICE_TOTAL: - value = INTEL_INFO(dev)->subslice_total; diff --git a/efi-lockdown.patch b/efi-lockdown.patch index 7803d6d..e048784 100644 --- a/efi-lockdown.patch +++ b/efi-lockdown.patch @@ -1,4 +1,4 @@ -From 85255f3885abdd1d2e5dc9f6e51f2fc9db075843 Mon Sep 17 00:00:00 2001 +From df7d76ae50f18d4465e59fdf7f19d3df44906cb5 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Mon, 21 Nov 2016 23:55:55 +0000 Subject: [PATCH 07/32] efi: Add EFI_SECURE_BOOT bit @@ -18,10 +18,10 @@ Signed-off-by: David Howells 2 files changed, 2 insertions(+) diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 4bf0c89..396285b 100644 +index 69780ed..447905e 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c -@@ -1184,6 +1184,7 @@ void __init setup_arch(char **cmdline_p) +@@ -1182,6 +1182,7 @@ void __init setup_arch(char **cmdline_p) pr_info("Secure boot disabled\n"); break; case efi_secureboot_mode_enabled: @@ -42,13 +42,13 @@ index 94d34e0..6049600 100644 #ifdef CONFIG_EFI /* -- -2.7.5 +2.7.4 -From 341507e80b888b5b587bdb60f0d95275dbbcad89 Mon Sep 17 00:00:00 2001 +From f05a90c19a9613d8d50597319ed91f691e25b689 Mon Sep 17 00:00:00 2001 From: David Howells Date: Mon, 21 Nov 2016 23:36:17 +0000 -Subject: [PATCH 09/32] Add the ability to lock down access to the running kernel - image +Subject: [PATCH 09/32] Add the ability to lock down access to the running + kernel image Provide a single call to allow kernel code to determine whether the system should be locked down, thereby disallowing various accesses that might @@ -67,10 +67,10 @@ Signed-off-by: David Howells create mode 100644 security/lock_down.c diff --git a/include/linux/kernel.h b/include/linux/kernel.h -index 4c26dc3..b820a80 100644 +index cb09238..3cd3be9 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h -@@ -275,6 +275,15 @@ extern int oops_may_print(void); +@@ -273,6 +273,15 @@ extern int oops_may_print(void); void do_exit(long error_code) __noreturn; void complete_and_exit(struct completion *, long) __noreturn; @@ -87,10 +87,10 @@ index 4c26dc3..b820a80 100644 int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res); int __must_check _kstrtol(const char *s, unsigned int base, long *res); diff --git a/include/linux/security.h b/include/linux/security.h -index 96899fa..5808570 100644 +index d3868f2..187b74b 100644 --- a/include/linux/security.h +++ b/include/linux/security.h -@@ -1678,5 +1678,16 @@ static inline void free_secdata(void *secdata) +@@ -1679,5 +1679,16 @@ static inline void free_secdata(void *secdata) { } #endif /* CONFIG_SECURITY */ @@ -191,9 +191,9 @@ index 0000000..5788c60 +} +EXPORT_SYMBOL(kernel_is_locked_down); -- -2.7.5 +2.7.4 -From dfabd5c5acc95a2de69d44f794e6f1ce894fd3ff Mon Sep 17 00:00:00 2001 +From fb6feb38e297260d050fc477c72683ac51d07ae3 Mon Sep 17 00:00:00 2001 From: David Howells Date: Mon, 21 Nov 2016 23:55:55 +0000 Subject: [PATCH 10/32] efi: Lock down the kernel if booted in secure boot mode @@ -211,10 +211,10 @@ Signed-off-by: David Howells 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index cc98d5a..21f3985 100644 +index 874c123..a315974 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig -@@ -1817,6 +1817,18 @@ config EFI_MIXED +@@ -1816,6 +1816,18 @@ config EFI_MIXED If unsure, say N. @@ -234,7 +234,7 @@ index cc98d5a..21f3985 100644 def_bool y prompt "Enable seccomp to safely compute untrusted bytecode" diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 396285b..85dfa74 100644 +index 447905e..d44e60e 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -69,6 +69,7 @@ @@ -243,9 +243,9 @@ index 396285b..85dfa74 100644 #include +#include + #include #include